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2021-12-17dt-bindings: usb: tegra-xudc: Document interconnects and iommus propertiesThierry Reding
Add the interconnects, interconnect-names and iommus properties to the device tree bindings for the Tegra XUDC controller. These are used to describe the device's paths to and from memory. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: serial: Document Tegra234 TCUThierry Reding
Add the compatible string for the TCU found on the Tegra234 SoC. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: serial: tegra-tcu: Convert to json-schemaThierry Reding
Convert the Tegra TCU device tree bindings to json-schema. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: thermal: tegra186-bpmp: Convert to json-schemaThierry Reding
Convert the Tegra186 (and later) BPMP thermal device tree bindings from the free-form text format to json-schema. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: firmware: tegra: Convert to json-schemaThierry Reding
Convert the NVIDIA Tegra186 (and later) BPMP bindings from the free-form text format to json-schema. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: tegra: pmc: Convert to json-schemaThierry Reding
Convert the NVIDIA Tegra186 (and later) PMC bindings from the free-form text format to json-schema. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: serial: 8250: Document Tegra234 UARTThierry Reding
Add the compatible string for the UART found on the Tegra234 SoC. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: mmc: tegra: Document Tegra234 SDHCIThierry Reding
Add the compatible string for the SDHCI block found on the Tegra234 SoC. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: fuse: tegra: Document Tegra234 FUSEThierry Reding
Add the compatible string for the FUSE block found on the Tegra234 SoC. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: fuse: tegra: Convert to json-schemaThierry Reding
Convert the NVIDIA Tegra FUSE bindings from the free-form text format to json-schema. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: rtc: tegra: Document Tegra234 RTCThierry Reding
Add the compatible string for the RTC block found on the Tegra234 SoC. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: rtc: tegra: Convert to json-schemaThierry Reding
Convert the NVIDIA Tegra RTC bindings from the free-form text format to json-schema. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: mailbox: tegra: Document Tegra234 HSPThierry Reding
Add the compatible string for the HSP block found on the Tegra234 SoC. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: mailbox: tegra: Convert to json-schemaThierry Reding
Convert the NVIDIA Tegra HSP bindings from the free-form text format to json-schema. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17dt-bindings: mmc: tegra: Convert to json-schemaThierry Reding
Convert the NVIDIA Tegra SDHCI bindings from the free-form text format to json-schema. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17ARM: tegra: Add host1x hotflush reset on Tegra124Thierry Reding
Add the host1x memory client hotflush reset on Tegra124. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17ARM: tegra: Add memory client hotflush resets on Tegra114Thierry Reding
Add the host1x, gr2d and gr3d memory client hotflush resets on Tegra114. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-17arm64: dts: renesas: Fix pin controller node namesGeert Uytterhoeven
Align all pin controller node names with the expectations of the DT bindings in Documentation/devicetree/bindings/pinctrl/pinctrl.yaml. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/09a09c8ac9cb1a11b859c1ab9d9eae84cfefb1bb.1639666967.git.geert+renesas@glider.be
2021-12-17dt-bindings: soc: add binding for i.MX8MN DISP blk-ctrlAdam Ford
Add the DT binding for the i.MX8MN DISP blk-ctrl. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-17ARM: dts: imx6: phytec: Add PEB-WLBT-05 supportYunus Bas
The PEB-WLBT-05 is equipped with a Sterling-LWB radio module, which is capable of Wi-Fi 802.11 b/g/n and Bluetooth 4.2. Signed-off-by: Yunus Bas <y.bas@phytec.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-16ARM: tegra: Add back gpio-ranges propertiesStefan Agner
The properties have been commented out to prevent a regression a while ago. The first regression should be resolved by commit 44af7927316e ("spi: Map SPI OF client IRQ at probe time"). The second regression is probably addressed by commit 494fd7b7ad10 ("PM / core: fix deferred probe breaking suspend resume order") and/or maybe others. Readd the gpio-ranges properties to see whether regressions still get reported. This reverts commit 4f1d841475e1 ("ARM: tegra: Comment out gpio-ranges properties"). Signed-off-by: Stefan Agner <stefan@agner.ch> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Tested-by: Dmitry Osipenko <digetx@gmail.com> [treding@nvidia.com: drop redundant gpio-ranges from Ouya DTS file] Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16ARM: tegra: paz00: Enable S/PDIF and HDMI audioDmitry Osipenko
Enable S/PDIF controller to enable HDMI audio support on Toshiba AC100. Use nvidia,fixed-parent-rate property that prevents audio rate conflict between S/PDIF and I2S. Tested-by: Agneli <poczt@protonmail.ch> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16ARM: tegra: acer-a500: Enable S/PDIF and HDMI audioDmitry Osipenko
Enable S/PDIF controller to enable HDMI audio support on Acer A500. Use nvidia,fixed-parent-rate property that prevents audio rate conflict between S/PDIF and I2S. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16ARM: tegra: Add HDMI audio graph to Tegra20 device-treeDmitry Osipenko
Add HDMI audio graph to Tegra20 device-tree to enable HDMI audio on Tegra20 devices. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16ARM: tegra: Add S/PDIF node to Tegra20 device-treeDmitry Osipenko
Add S/PDIF node to Tegra20 device-tree. It's needed for enabling HDMI audio support. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16ARM: tegra20/30: Disable unused host1x hardwareDmitry Osipenko
MPE, VI, EPP and ISP were never used and we don't have drivers for them. Since these modules are enabled by default in a device-tree, a device is created for them, blocking voltage scaling because there is no driver to bind, and thus, state of PMC driver is never synced. Disable them. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16ARM: tegra: Add Memory Client resets to Tegra30 GR2D, GR3D and Host1xDmitry Osipenko
Memory access must be blocked before hardware reset is asserted and before power is gated, otherwise a serious hardware fault is inevitable. Add reset for memory clients to the GR2D, GR3D and Host1x nodes. Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30 Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30 Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16ARM: tegra: Add Memory Client resets to Tegra20 GR2D, GR3D and Host1xDmitry Osipenko
Memory access must be blocked before hardware reset is asserted and before power is gated, otherwise a serious hardware fault is inevitable. Add reset for memory clients to the GR2D, GR3D and Host1x nodes. Tested-by: Paul Fertser <fercerpav@gmail.com> # PAZ00 T20 Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16ARM: tegra: Add OPP tables and power domains to Tegra30 device-treesDmitry Osipenko
Add OPP tables and power domains to all peripheral devices which support power management on Tegra30 SoC. Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30 Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30 Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Hook up MMC and BPMP to memory controllerThierry Reding
Use the interconnects property to hook up the MMC and BPMP to the memory controller. This is needed to set the correct bus-level DMA mask, which is a prerequisite for adding IOMMU support. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Add memory controller on Tegra234Thierry Reding
This adds the memory controller and the embedded external memory controller found on the Tegra234 SoC. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Add EMC general interrupt on Tegra194Thierry Reding
Add the missing EMC general interrupt for the external memory controller on Tegra194. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Update SDMMC4 speeds for Tegra194Prathamesh Shete
Add required device-tree properties to populate all speed modes supported by SDMMC4 instance of Tegra194 SDHCI controller. Signed-off-by: Prathamesh Shete <pshete@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Add dma-coherent for Tegra194 VICJon Hunter
DMA operations for the Tegra194 Video Image Compositor (VIC) are coherent and so populate the 'dma-coherent' property. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Rename Ethernet PHY nodesThierry Reding
Name the Ethernet PHY device tree nodes as expected by the DT schema. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Remove unused only-1-8-v propertiesThierry Reding
The only-1-8-v property is not support by an DT schema, so drop it. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Sort Tegra210 XUSB clocks correctlyThierry Reding
Make the order of the clocks and clock-names properties match the order in the device tree bindings. This isn't strictly necessary from a point of view of the operating system because matching will be done based on the clock-names, but it makes it easier to validate the device trees against the DT schema. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Add missing TSEC properties on Tegra210Thierry Reding
Add missing interrupts, clocks, clock-names, reset and reset-names properties for the TSEC blocks found on Tegra210. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: jetson-nano: Remove extra PLL power supplies for PCIe and XUSBThierry Reding
The XUSB pad controller handles the various PLL power supplies, so remove any references to them from the PCIe and XUSB controller device tree nodes. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: smaug: Remove extra PLL power supplies for XUSBThierry Reding
The XUSB pad controller handles the various PLL power supplies, so remove any references to them from the XUSB controller device tree node. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: jetson-tx1: Remove extra PLL power supplies for PCIe and XUSBThierry Reding
The XUSB pad controller handles the various PLL power supplies, so remove any references to them from the PCIe and XUSB controller device tree nodes. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Rename GPIO hog nodes to match schemaThierry Reding
GPIO hog nodes must have a "hog-" prefix or "-hog" suffix according to the DT schema. Rename all such nodes to allow validation to pass. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Remove unsupported regulator propertiesThierry Reding
Remove the unsupported "regulator-disable-ramp-delay" properties which ended up in various DTS files for some reason. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Rename TCU node to "serial"Thierry Reding
The TCU is basically a serial port (albeit a fancy one), so it should be named "serial". Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Remove undocumented Tegra194 PCIe "core_m" clockThierry Reding
The "core_m" clock is not documented in the Tegra194 PCIe device tree bindings, so remove it. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Drop unused properties for Tegra194 PCIeThierry Reding
The num-viewport property is never used and can be dropped, whereas the "iommus" property is not needed since we use "iommu-map-mask" and "iommu-map" already. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Fix Tegra194 HSP compatible stringThierry Reding
The HSP instances on Tegra194 are not fully compatible with the version found on Tegra186, so drop the fallback compatible string from the list. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Drop unsupported nvidia,lpdr propertyThierry Reding
The Tegra194 pinmux DT bindings do not define the nvidia,lpdr property, so drop them from the device trees that have listed them. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Use JEDEC vendor prefix for SPI NOR flash chipsThierry Reding
The standard "jedec," vendor prefix should be used for SPI NOR flash chips. This allows the right DT schema to be picked for validation. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Drop unit-address for audio card graph endpointsThierry Reding
Audio graph endpoints don't have a "reg" property, so they shouldn't have a unit-address either. Signed-off-by: Thierry Reding <treding@nvidia.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-08-02 17:08:45 +0000