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Use tabs where possible and remove multiple blanks lines.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
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Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
If both the HTTP and HTTPS versions
return 200 OK and serve the same content:
Replace HTTP with HTTPS.
Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
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The Bananapi M2 Plus H5 v1.2 can work with the standard H5 OPPs.
Tie them in to enable CPU frequency scaling.
The original Bananapi M2 Plus H5 is left out for now, as adding
the fixed regulator along with the enable pin seemed to cause some
glitching in Linux.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200717160053.31191-9-wens@kernel.org
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The Libre Computer ALL-H3-CC H5 variant can work with the standard H5
OPPs. Tie them in to enable CPU frequency scaling.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200717160053.31191-8-wens@kernel.org
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Add an OPP (Operating Performance Points) table for the CPU cores for
boards to include to DVFS (Dynamic Voltage & Frequency Scaling) on the
H5. The table originates from Armbian, but the maximum voltage is raised
slightly to account for boards using slightly higher voltages.
The table and tie in to the CPU cores are put in a separate dtsi file
that board files can include to opt in. Or they can define their own
tables if the standard one does not fit.
This has been tested on the Libre Computer ALL-H3-CC-H5 and the Bananapi
M2+ v1.2 H5, both with adequate cooling. The former has a fixed 1.2V
regulator, while the latter has a GPIO controlled regulator switchable
between 1.1V and 1.3V.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200717160053.31191-7-wens@kernel.org
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This enables passive cooling by down-regulating CPU voltage and frequency.
The trip points were copied from the H3.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200717160053.31191-6-wens@kernel.org
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The ARM CPU cores are fed by the CPU clock from the CCU. Add a
reference to the clock for each CPU core, along with the clock
transition latency.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200717160053.31191-5-wens@kernel.org
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The Bananapi M2+ uses a GPIO line to change the effective resistance of
the CPU supply regulator's feedback resistor network. The voltages
described in the device tree were given directly by the vendor. This
turns out to be slightly off compared to the real values.
The updated voltages are based on calculations of the feedback resistor
network, and verified down to three decimal places with a multi-meter.
Fixes: 6eeb4180d4b9 ("ARM: dts: sunxi: h3-h5: Add Bananapi M2+ v1.2 device trees")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200717160053.31191-4-wens@kernel.org
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The device tree currently only assigns the a supply for the first CPU
core, when in reality the regulator supply is shared by all four cores.
This might cause an issue if the implementation does not realize the
sharing of the supply.
Assign the same regulator supply to the remaining CPU cores to address
this.
Fixes: 6eeb4180d4b9 ("ARM: dts: sunxi: h3-h5: Add Bananapi M2+ v1.2 device trees")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200717160053.31191-3-wens@kernel.org
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The device tree currently only assigns the a supply for the first CPU
core, when in reality the regulator supply is shared by all four cores.
This might cause an issue if the implementation does not realize the
sharing of the supply.
Assign the same regulator supply to the remaining CPU cores to address
this.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200717160053.31191-2-wens@kernel.org
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This corrects the mounting matrix for the BMA254
accelerometer to what makes PostmarketOS actually
orient the screen the right way on this device.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20200719201603.3610389-1-linus.walleij@linaro.org
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Commit 1019fe2c7280 ("ARM: dts: exynos: Adjust bus related OPPs to the
values correct for Exynos5422 Odroids") changed the parameters of the
OPPs for the FSYS bus. Besides the frequency adjustments, it also removed
the 'shared-opp' property from the OPP table used for FSYS_APB and FSYS
busses.
This revealed that in fact the FSYS bus frequency scaling never worked.
When one OPP table is marked as 'opp-shared', only the first bus which
selects the OPP sets the rate of its clock. Then OPP core assumes that
the other busses have been changed to that OPP and no change to their
clock rates are needed. Thus when FSYS_APB bus, which was registered
first, set the rate for its clock, the OPP core did not change the FSYS
bus clock later.
The mentioned commit removed that behavior, what introduced a regression
on some Odroid XU3 boards. Frequency scaling of the FSYS bus causes
instability of the USB host operation, what can be observed as network
hangs. To restore old behavior, simply disable frequency scaling for the
FSYS bus.
Reported-by: Willy Wolff <willy.mh.wolff.ml@gmail.com>
Fixes: 1019fe2c7280 ("ARM: dts: exynos: Adjust bus related OPPs to the values correct for Exynos5422 Odroids")
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
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Add I2C child node for switch watchdog present on SPU3
Signed-off-by: Chris Healy <cphealy@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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esdhc0 is connected to an eMMC, so it is safe to pass the "no-sdio"/"no-sd"
properties.
esdhc1 is wired to a standard SD socket, so pass the "no-sdio" property.
Signed-off-by: Chris Healy <cphealy@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Fix value of shunt-resistor property.
The LX2160A-RDB has 500 uOhm shunt for
the INA220, not 1000 uOhm. Unless
it will get wrong power consumption(1/2)
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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According to the AR8035 datasheet:
"When using crystal, the clock is generated internally after power is
stable. For a reliable power on reset, suggest to keep asserting the reset
low long enough (10ms) to ensure the clock is stable and clock-to-reset 1ms
requirement is satisfied."
Pass the 'reset-assert-us' property to describe such requirement.
While at it, use the 'reset-gpios' property inside the the mdio
node instead of the deprecated usage of 'phy-reset-gpios'.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Soeren Moch <smoch@web.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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imx6q-tbs2910 has an Atheros AR8035 Ethernet PHY at address 4.
The AR8035 provides a 125MHz clock to the ENET_REF_CLK i.MX6 pin.
Improve the Ethernet representation by adding an mdio node with such
information.
This fixes an Ethernet regression in U-Boot as U-Boot AR803X driver now
expects the 'qca,clk-out-frequency' property to be passed via
device tree.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Soeren Moch <smoch@web.de>
Tested-by: Soeren Moch <smoch@web.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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According to the AR8031 datasheet:
"When using crystal, clock is generated internally after the power is
stable. In order to get reliable power-on-reset, it is recommended to
keep asserting the reset low signal long enough (10 ms) to ensure the
clock is stable and clock-to-reset (1 ms) requirement is satisfied."
Pass the 'reset-assert-us' property to describe such requirement.
While at it, use the 'reset-gpios' property inside the the mdio
node instead of the deprecated usage of 'phy-reset-gpios'.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Soeren Moch <smoch@web.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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imx6qdl-sabresd has an Atheros AR8031 Ethernet PHY at address 1.
The AR8031 provides a 125MHz clock to the ENET_REF_CLK i.MX6 pin.
Improve the Ethernet representation by adding an mdio node with such
information.
An advantage of adding the mdio node is that the AR8031 initialization
code in the mx6sabresd board file in U-Boot can totally be removed.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Soeren Moch <smoch@web.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add entries for MYiR Tech imx6ULL eval boards.
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add Gateworks System Controller support to Gateworks Ventana boards:
- add dt bindings for GSC mfd driver and hwmon driver for ADC's and
fan controllers.
- add dt bindings for gpio-keys driver for push-button and interrupt events
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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This patch adds devicetree nodes for LAB and IBB regulators.
Signed-off-by: Nisha Kumari <nishakumari@codeaurora.org>
[sumits: Updated for better compatible strings and names]
Signed-off-by: Sumit Semwal <sumit.semwal@linaro.org>
Link: https://lore.kernel.org/r/20200622124110.20971-4-sumit.semwal@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Add the Maxim max1619 temp sensor that is on the Arria10 devkit.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
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Add reset-names = "spi" to spi dts nodes.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
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Add the clock properties for the NAND dts node.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
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Add clock dts entries to the Intel SoCFPGA Agilex platform.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
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Connect the voltage regulator of vbus to the otg connector.
Depending on the current mode this is enabled (in "host" mode")
or disabled (in "peripheral" mode). The regulator must be updated
if the controller is configured in "otg" mode and the status changes
between "host" and "peripheral".
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200707101214.2301768-1-michael@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Rock Pi N8 is a Rockchip RK3288 based SBC, which has
- VMARC RK3288 SOM (as per SMARC standard) from Vamrs.
- Compatible carrier board from Radxa.
VAMRC RK3288 SOM need to mount on top of radxa dalang
carrier board for making Rock Pi N8 SBC.
So, add initial support for Rock Pi N8 by including rk3288,
rk3288 vamrc-som and raxda dalang carrier board dtsi files.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200715083418.112003-8-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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VMARC RK3288 SOM is a standard SMARC SOM design with
Rockchip RK3288 SoC, which is designed by Vamrs.
Specification:
- Rockchip RK3288
- PMIC: RK808
- eMMC: 16GB/32GB/64GB
- SD slot
- 2xUSB-2.0, 1xUSB3.0
- USB-C for power supply
- Ethernet
- HDMI, MIPI-DSI/CSI, eDP
Add initial support for VMARC RK3288 SOM, this would use
with associated carrier board.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200715083418.112003-7-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Rock Pi N8 is a Rockchip RK3288 based SBC, which has
- VMARC RK3288 SOM (as per SMARC standard) from Vamrs.
- Compatible carrier board from Radxa.
VMARC RK3288 SOM need to mount on top of dalang carrier
board for making Rock PI N8 SBC.
Add dt-bindings for it.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200715083418.112003-6-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Some of gmac, sdmmc node properties are common across rk3288 and
rk3399pro SOM's so move them into Carrier dtsi.
Chosen node is specific to rk3399pro configure SBC, so move it into
RockPI N10 dts.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200715083418.112003-5-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Supply regulators are common across different variants of vmarc SOM's
since the Type C power controller IC is part of the carrier board.
So, move the supply regulators into carrier board dtsi.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200715083418.112003-4-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Fix node, properties sorting on RockPI N10 board dts(i) files.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200715083418.112003-3-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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I2C nodes and associated slave devices defined in Carrier board
are specific to rk3399pro vmrac SOM.
So, move them into SOM dtsi.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200715083418.112003-2-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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This patch Add the quirk to specify to use burst transfer
for better compatible and higher performance.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Link: https://lore.kernel.org/r/1593439866-68459-1-git-send-email-sugar.zhang@rock-chips.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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This patch Add the quirk to specify to use burst transfer
for better compatible and higher performance.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Link: https://lore.kernel.org/r/1593439935-68540-1-git-send-email-sugar.zhang@rock-chips.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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'bus-width' has been added to px30.dtsi mmc nodes, so now it can be
removed from the dts files that include it.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200715070954.1992-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Add the OPP tables for DSI and MDP based on the perf state/clk
requirements, and add the power-domains property to specify the
scalable power domain.
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Link: https://lore.kernel.org/r/1594292674-15632-5-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Add the OPP tables for DSI and MDP based on the perf state/clk
requirements, and add the power-domains property to specify the
scalable power domain.
Tested-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Link: https://lore.kernel.org/r/1594292674-15632-4-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
arm64: tegra: Device tree changes for v5.9-rc1
This contains a slew of fixes in preparation for validating device trees
against json-schema bindings. In addition, this enables the CPU complex
(for CPU frequency scaling) and GPU on Tegra194.
* tag 'tegra-for-5.9-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (56 commits)
arm64: tegra: Add the GPU on Tegra194
arm64: tegra: Add compatible string for Tegra194 CPU complex
arm64: tegra: Add HDMI supplies on Norrin
arm64: tegra: Add #{address,size}-cells for VI I2C on Tegra210
arm64: tegra: Add missing clocks and power-domains to Tegra210 VI I2C
arm64: tegra: Add clocks and resets for ISP on Tegra210
arm64: tegra: Fix compatible string for DPAUX on Tegra210
arm64: tegra: Add i2c-bus subnode for DPAUX controllers
arm64: tegra: Sort aliases alphabetically
arm64: tegra: Remove spurious tabs
arm64: tegra: Populate VBUS for USB3 on Jetson TX2
arm64: tegra: Enable DFLL support on Jetson Nano
arm64: tegra: Add support for Jetson Xavier NX
arm64: tegra: Re-order PCIe aperture mappings
arm64: tegra: Enable Tegra VI CSI support for Jetson Nano
arm64: tegra: jetson-tx1: Add camera supplies
arm64: tegra: Fix order of XUSB controller clocks
arm64: tegra: Rename cbb@0 to bus@0 on Tegra194
arm64: tegra: Sort nodes by unit-address on Jetson Nano
arm64: tegra: Various fixes for PMICs
...
Link: https://lore.kernel.org/r/20200717161300.1661002-7-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
ARM: tegra: Device tree changes for v5.9-rc1
This adds device trees for the ASUS Google Nexus 7 and Acer Iconia Tab
A500. In addition there are a slew of fixes to existing device trees in
preparation for validating the DTBs against json-schema.
* tag 'tegra-for-5.9-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (38 commits)
ARM: tegra: Add device-tree for ASUS Google Nexus 7
ARM: tegra: Add device-tree for Acer Iconia Tab A500
ARM: tegra: Add HDMI supplies on Nyan boards
ARM: tegra: Add missing DSI controller on Tegra30
ARM: tegra: Add i2c-bus subnode for DPAUX controllers
ARM: tegra: The Tegra30 SDHCI is not backwards-compatible
ARM: tegra: The Tegra30 DC is not backwards-compatible
ARM: tegra: Remove spurious comma from node name
ARM: tegra: Add parent clock to DSI output
ARM: tegra: Use standard names for SRAM nodes
ARM: tegra: seaboard: Use standard battery bindings
ARM: tegra: Use standard names for LED nodes
ARM: tegra: Use numeric unit-addresses
ARM: tegra: medcom-wide: Remove extra panel power supply
ARM: tegra: Use proper unit-addresses for OPPs
ARM: tegra: Add missing clock-names for SDHCI controllers
ARM: tegra: Fix order of XUSB controller clocks
ARM: tegra: Add #reset-cells to Tegra124 memory controller
ARM: tegra: Add missing panel power supplies
ARM: tegra: Add micro-USB A/B port on Jetson TK1
...
Link: https://lore.kernel.org/r/20200717161300.1661002-5-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
dt-bindings: Changes for v5.9-rc1
This adds compatible strings for some new devices as well as updates and
fixes existing bindings.
* tag 'tegra-for-5.9-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: fuse: tegra: Add missing compatible strings
dt-bindings: i2c: tegra: Document Tegra210 VI I2C clocks and power-domains
dt-bindings: Add documentation for GV11B GPU
dt-bindings: ARM: tegra: Add ASUS Google Nexus 7
dt-bindings: ARM: tegra: Add Acer Iconia Tab A500
dt-bindings: Add vendor prefix for Acer Inc.
dt-bindings: tegra: Document Jetson Xavier NX (and devkit)
Link: https://lore.kernel.org/r/20200717161300.1661002-1-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt
arm64: dts: amlogic updates for v5.9
- meson-gx: Switch to the meson-ee-pwrc bindings
- add Khadas MCU nodes
* tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
arm64: dts: amlogic: Add the Ethernet "timing-adjustment" clock
arm64: dts: meson-gx: Switch to the meson-ee-pwrc bindings
arm64: dts: meson-khadas-vim3: add Khadas MCU nodes
Link: https://lore.kernel.org/r/7h8sfif2na.fsf@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt
ARM: dts: amlogic updates for v5.9
- power-domain and MMC updates
* tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM: dts: meson8b: odroidc1: enable the SDHC controller
ARM: dts: meson8b: ec100: enable the SDHC controller
ARM: dts: meson: add the SDHC MMC controller
ARM: dts: meson8b: add power domain controller
ARM: dts: meson8m2: add resets for the power domain controller
ARM: dts: meson8: add power domain controller
Link: https://lore.kernel.org/r/7hd04uf2o8.fsf@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The GPU found on NVIDIA Tegra194 SoCs is a Volta generation GPU called
GV11B.
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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The Tegra FUSE device tree bindings haven't been updated in a while. Add
compatible strings for the SoC generations that were released since the
last update.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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This patch documents missing clocks and power-domains of Tegra210 VI I2C.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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The GV11B's device tree bindings are the same as for GP10B, though the
GPU is not completely compatible, so all that is needed is a different
compatible string.
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas DT binding updates for v5.9
- Document core support for the RZ/G2H SoC,
- Document support for the HopeRun HiHope RZ/G2H, and Beacon
EmbeddedWorks RZ/G2M boards.
* tag 'renesas-dt-bindings-for-v5.9-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
dt-bindings: arm: renesas: Document beacon-rzg2m
dt-bindings: reset: renesas,rst: Document r8a774e1 reset module
dt-bindings: power: renesas,rcar-sysc: Document r8a774e1 SYSC binding
dt-bindings: arm: renesas: Add HopeRun RZ/G2H boards
dt-bindings: arm: renesas: Document RZ/G2H SoC DT bindings
Link: https://lore.kernel.org/r/20200717112427.26032-4-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.9 (take two)
- SPI Multi I/O Bus Controller (RPC-IF) support for R-Car V3H and V3M,
including QSPI support for the Condor, Eagle, V3HSK, and V3MSK
boards,
- Initial support for the RZ/G2H SoC on the HopeRun HiHope RZ/G2H
board,
- Initial support for the Beacon EmbeddedWorks RZ/G2M board,
- Minor fixes and improvements.
* tag 'renesas-arm-dt-for-v5.9-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (34 commits)
ARM: dts: sh73a0: Add missing clocks to sound node
arm64: dts: renesas: r8a774e1: Add CAN[FD] support
arm64: dts: renesas: r8a774e1: Add RWDT node
arm64: dts: renesas: r8a774e1: Add MSIOF nodes
arm64: dts: renesas: r8a774e1: Add I2C and IIC-DVFS support
arm64: dts: renesas: r8a774e1: Add SDHI nodes
arm64: dts: renesas: r8a774e1: Add SCIF and HSCIF nodes
arm64: dts: renesas: r8a774e1: Add TMU device nodes
arm64: dts: renesas: r8a774e1: Add CMT device nodes
arm64: dts: renesas: r8a774e1: Add RZ/G2H thermal support
arm64: dts: renesas: r8a774e1: Add operating points
arm64: dts: renesas: Introduce r8a774a1-beacon-rzg2m-kit
arm64: dts: renesas: r8a774e1: Add Ethernet AVB node
arm64: dts: renesas: r8a774e1: Add GPIO device nodes
arm64: dts: renesas: r8a774e1: Add SYS-DMAC device nodes
arm64: dts: renesas: r8a774e1: Add IPMMU device nodes
ARM: dts: gose: Fix ports node name for adv7612
ARM: dts: renesas: Fix SD Card/eMMC interface device node names
arm64: dts: renesas: Fix SD Card/eMMC interface device node names
arm64: dts: renesas: add full-pwr-cycle-in-suspend into eMMC nodes
...
Link: https://lore.kernel.org/r/20200717112427.26032-2-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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