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2023-03-27arm64: dts: colibri-imx8x: Add atmel pinctrl groupsPhilippe Schenker
Add pinctrl groups for enabling atmel touchscreen support. Remove the pads out of pinctrl_hog0 as they now can be enabled more specific using pinctrl_atmel_conn label. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: colibri-imx8x: Use new bracket formatPhilippe Schenker
Use the new bracket format as described by Rob since this seems the format that we're heading in the future. https://lore.kernel.org/all/CAL_JsqKqQdRZC08-BGJqTjzJZ8aWA41LHMbv0QyyVePVm0co7A@mail.gmail.com/ Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: colibri-imx8x: Update spdx licensePhilippe Schenker
GPL-2.0+ is deprecated, update it to GPL-2.0-or-later. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: colibri-imx8x: Prepare for qxp and dx variantsPhilippe Schenker
Toradex sells the Colibri iMX8X module in variants with the i.MX 8QXP and i.MX8DX SoC. Prepare for this by moving majority of stuff from imx8qxp-colibri.dtsi into imx8x-colibri.dtsi. Remove DX from the model string. This commit intends no functional change. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: imx8mq-librem5: Add 166MHz to DDRC OPP tableSebastian Krzyszkowiak
This is the lowest frequency supported by older iMX8MQ SoC revisions. Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: imx8mq-librem5: Reduce I2C frequency to 384kHzSebastian Krzyszkowiak
According to imx8mq errata (ERR007805): > To meet the clock low period requirement in fast speed mode, > SCL must be configured to 384KHz or less. Note that the imx i2c driver already implements this erratum and works around it. This is only for the description to reflect reality. Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: imx8mq-librem5: Bump BUCK1 suspend voltage to 0.81VSebastian Krzyszkowiak
0.8V is outside of the operating voltage specified for imx8mq, see chapter 3.1.4 "Operating ranges" of the IMX8MDQLQCEC document. Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: imx8mq-librem5: Remove dis_u3_susphy_quirk from usb_dwc3_0Sebastian Krzyszkowiak
This reduces power consumption in system suspend by about 10%. Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: imx8mq-librem5: Adjust proximity sensor's near levelsSebastian Krzyszkowiak
Based on tests with my left ear (which appears to require lower levels than the right one), one Birch, one Dogwood and three Evergreens. It seems that the sensor reacts very weakly to hair, so let's make the thresholds rather generous to compensate. Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: imx8mq-librem5: Bump usdhc2 frequency to 100MHzSebastian Krzyszkowiak
RS9116 card already limits itself to 50MHz by being a high-speed card, while AP6275S can work at 100MHz just fine (technically it should work at 200MHz as well since it's a SDR104 card, but it doesn't appear to be the case in practice and further research will be needed to find out why). Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: imx8mq-librem5: add the magnetometer mount matrixAngus Ainslie
Userland needs the mount matrix to know the correct orientation of the part. Signed-off-by: Angus Ainslie <angus@akkea.ca> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: imx8mq-librem5: Set the DVS voltages lowerSebastian Krzyszkowiak
They're still in the operating range according to i.MX 8M Quad datasheet. There's some headroom added over minimal values to account for voltage drop. Operational ranges (min - typ - max [selected]): - VDD_SOC (BUCK1): 0.81 - 0.9 - 0.99 [0.88] - VDD_ARM (BUCK2): 0.81 - 0.9 - 1.05 [0.84] (1000MHz) 0.90 - 1.0 - 1.05 [0.93] (1500MHz) - VDD_GPU (BUCK3): 0.81 - 0.9 - 1.05 [0.85] (800MHz) 0.90 - 1.0 - 1.05 [ -- ] (1000MHz) - VDD_VPU (BUCK4): 0.81 - 0.9 - 1.05 [ -- ] (550/500/588MHz) 0.90 - 1.0 - 1.05 [0.93] (660/600/800MHz) Idle power consumption doesn't appear to be influenced much, but a simple load test (`cat /dev/urandom | pigz - > /dev/null` combined with running Animatch) seems to show about 0.3W of difference. Care is advised, as there may be differences between each units in how low can they be undervolted - in my experience, reaching that point usually makes the phone fail to boot. In my case, it appears that my Birch phone can go down the most. This is a somewhat conservative set of values that I've seen working well on all my devices; I haven't tried very hard to optimize it, so more experiments are welcome. Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: imx8mq-librem5: Set charger parameters for each batchSebastian Krzyszkowiak
Correctly set regulation-voltage, termination-current and charge-current for the different librem 5 board revisions. Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: imx8mq-librem5: add brightness levels to led-backlightMartin Kepplinger
Add brightness-levels and default-brightness-level properties to the librem5 board description that have been used for a long time. Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: imx8mq-librem5: Describe MIC_2V4 regulatorSebastian Krzyszkowiak
No functional change, but it describes the hardware better. Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: imx8mq-librem5: fix audio-1v8 regulator nameMartin Kepplinger
Fix the regulator name for the audio-1v8 regulator. Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: imx8mq-librem5: describe the clock for the csi sensorsMartin Kepplinger
The CLKO2 clock is used for both camera CSI interfaces as the driving clock for the connected sensors. In order for it to be available, use this hog. We can't simply add it to 2 different sensor descriptions. Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27arm64: dts: imx8mq-librem5: lower the mipi csi 1 frequenciesMartin Kepplinger
No frames are streamed when using the default frequencies. I'm not yet sure why the fastest ones don't work here but we've been using these frequencies successfully for a long time now. Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-14arm64: dts: imx8: align thermal node names with bindingsKrzysztof Kozlowski
Bindings expect thermal node names to end with '-thermal': imx8qxp-mek.dtb: thermal-zones: 'pmic-thermal0' does not match any of the regexes: '^[a-zA-Z][a-zA-Z0-9\\-]{1,12}-thermal$', 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-14arm64: dts: imx8mp-tqma8mpql-mba8mpxl: Enable wakeup-source for GPIO buttonsAlexander Stein
These buttons are capable of waking up a suspended system, add the appropriate property for both. Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-14arm64: dts: imx93: add missing tpm pwm instancesMarkus Niebel
TPM1/TPM3 are missing, add them. Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-14arm64: dts: imx8mp-debix: add USB host supportLucas Stach
This adds support for the 4 USB3 host ports on the board, which are connected to the i.MX8MP SoC via a Realtek RTS5411 hub. As the schematic for the board is not available, I could not validate that this really reflects the reality, but I modeled things after the hacked in usage of the GPIOs in the downstream kernel. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-14arm64: dts: imx93: Add FlexSPI supportAlexander Stein
Add FlexSPI node for i.MX93. Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-14arm64: dts: imx8mp: Reorder clock and reg propertiesMarek Vasut
Align the clock and reg properties order with example bindings and the rest of the imx8mp.dtsi . No functional change. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-14arm64: dts: imx8mp: Drop simple-bus from fsl,imx8mp-media-blk-ctrlMarek Vasut
This block should not be compatible with simple-bus and misuse it that way. Instead, the driver should scan its subnodes and bind drivers to them. Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by: Liu Ying <victor.liu@nxp.com> Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com> Fixes: 94e6197dadc9 ("arm64: dts: imx8mp: Add LCDIF2 & LDB nodes") Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-14arm64: dts: imx8mq: Add UART DMA supportSebastian Krzyszkowiak
UART ports have DMA capability. Describe the UART DMA properties. Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-14arm64: dts: imx8mp: Add FEC RMII pin mux on i.MX8MP DHCOMMarek Vasut
The i.MX8MP DHCOM SoM may come with either external RGMII PHY or LAN8740Ai RMII PHY on the SoM attached to FEC MAC. Add pin mux settings for both options, so that DT overlay can override these settings on SoM variant with the LAN8740Ai PHY. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-14arm64: dts: imx8mp: Add EQoS RMII pin mux on i.MX8MP DHCOMMarek Vasut
The i.MX8MP DHCOM SoM may come with either KSZ9131RNXI RGMII PHY or LAN8740Ai RMII PHY on the SoM attached to EQoS MAC. Add pin mux settings for both options, so that DT overlay can override these settings on SoM variant with the LAN8740Ai PHY. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-14arm64: dts: imx8mp: Adjust EQoS PHY address on i.MX8MP DHCOMMarek Vasut
The current variant of the SoM has LAN8740Ai PHY connected to EQoS strapped to MDIO address 0 , adjust the MDIO address to match the hardware. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-14arm64: dts: imx8mp: Adjust EQoS reset comment on i.MX8MP DHCOMMarek Vasut
Fix copy-paste error in the EQoS reset comment, align with SoM schematic. No functional change. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-14arm64: dts: imx8mp: Do not delete PHY nodes on i.MX8MP DHCOM PDK2Marek Vasut
The PHY nodes may be activated via DTO in case another SoM variant is populated into the development kit. Do not delete the nodes. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-14arm64: dts: imx8mp: Update GPIO M to CLKOUT1 on DH electronics i.MX8M Plus ↵Marek Vasut
DHCOM and PDK2 The GPIO M SoM pin is connected to CLKOUT1, while CLKOUT2 is used as a supply for TC9595 bridge chip clock. Update the comment. No functional change. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-14arm64: dts: imx8mp: Add PCIe support to DH electronics i.MX8M Plus DHCOM and ↵Marek Vasut
PDK2 Add PCIe support for DH electronics i.MX8M Plus DHCOM SoM on PDK2 carrier board. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-14arm64: dts: freescale: imx8mm-phyboard: Add I2C4 pinmuxingLaurent Pinchart
The I2C4 bus is exposed on the camera connector. Add and select the corresponding pinmux entries and set the default frequency. The device is left disabled, to be enabled from camera overlays. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Teresa Remmet <t.remmet@phytec.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-14arm64: dts: Add i.MX8MP PCIe EP supportRichard Zhu
Add i.MX8MP PCIe EP support. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-14arm64: dts: Add i.MX8MQ PCIe EP supportRichard Zhu
Add i.MX8MQ PCIe EP support. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-14arm64: dts: Add i.MX8MM PCIe EP supportRichard Zhu
Add i.MX8MM PCIe EP support. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-14arm64: dts: imx93: Add the bbnsm dts nodeJacky Bai
Add the bbnsm node for RTC & ON/OFF button support Signed-off-by: Jacky Bai <ping.bai@nxp.com> Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-13arm64: dts: imx8mp-verdin: add 88W8997 serdev to uart4Stefan Eichenberger
Use the serdev feature to load the driver for the 88W8997 bluetooth driver. Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com> Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-13arm64: dts: layerscape: Fix GICv3 ITS node namesRob Herring
The GICv3 ITS is an MSI controller, therefore its node name should be 'msi-controller'. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-13arm64: dts: imx8mp-verdin-yavia: trivial minor updatesMarcel Ziswiler
Capitalise Yavia in comment and add missing whitespace. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-13arm64: dts: verdin-imx8mp: add pcie supportMarcel Ziswiler
Add PCIe support on the Verdin iMX8M Plus. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-07arm64: dts: freescale: add apalis imx8 aka quadmax carrier board supportMarcel Ziswiler
The previous patch added the device tree to support Toradex Apalis iMX8 [1] aka QuadMax a computer on module which can be used on different carrier boards which this patch introduces. The module consists of an NXP i.MX 8 family SoC (either i.MX 8QuadMax or 8QuadPlus), two PF8100 PMICs, a KSZ9131 Gigabit Ethernet PHY, 2, 4 or 8 GB of LPDDR4 RAM, an eMMC, an SGTL5000 analogue audio codec, an USB3503A USB HSIC hub, an optional I2C EEPROM plus an optional Bluetooth/Wi-Fi module. Anything that is not self-contained on the module is disabled by default. The carrier board device trees contained in this patch include the module's device tree and enable the supported peripherals of the carrier board. Some level of display functionality just landed upstream but requires further integration/testing on our side. Therefore, currently only basic console UART, eMMC and Ethernet functionality work fine. As there is no i.MX 8QuadPlus device tree upstream those have been dropped. However, apart from an error message during boot about it failing to bring up the second Cortex-A72 core this boots fine on QuadPlus' as well. [1] https://www.toradex.com/computer-on-modules/apalis-arm-family/nxp-imx-8 Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-07arm64: dts: freescale: add initial apalis imx8 aka quadmax module supportMarcel Ziswiler
This patch adds the device tree to support Toradex Apalis iMX8 [1] aka QuadMax a computer on module which can be used on different carrier boards. The module consists of an NXP i.MX 8 family SoC (either i.MX 8QuadMax or 8QuadPlus), two PF8100 PMICs, a KSZ9131 Gigabit Ethernet PHY, 2, 4 or 8 GB of LPDDR4 RAM, an eMMC, an SGTL5000 analogue audio codec, an USB3503A USB HSIC hub, an optional I2C EEPROM plus an optional Bluetooth/Wi-Fi module. Anything that is not self-contained on the module is disabled by default. The carrier board device trees in the next patch will include the module's device tree and enable the supported peripherals of the carrier board. Some level of display functionality just landed upstream but requires further integration/testing on our side. Therefore, currently only basic console UART, eMMC and Ethernet functionality work fine. As there is no i.MX 8QuadPlus device tree upstream those have been dropped. However, apart from an error message during boot about it failing to bring up the second Cortex-A72 core this boots fine on QuadPlus' as well. [1] https://www.toradex.com/computer-on-modules/apalis-arm-family/nxp-imx-8 Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-07arm64: dts: imx8qm: add vpu decoder and encoderZhou Peng
Enable VPU decoder and encoder functionality. Signed-off-by: Zhou Peng <eagle.zhou@nxp.com> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-07arm64: dts: imx8qm: add can node in devicetreeJoakim Zhang
Add CAN node for imx8qm in devicetree. Unlike on the i.MX 8QXP where the flexcan clocks are shared between multiple CAN instances, the i.MX 8QM has separate flexcan clock slices. Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-07arm64: dts: imx8qxp: add flexcan in admaJoakim Zhang
Add FlexCAN decive in adma subsystem. Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com> # TQMa8XQP Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-07arm64: dts: freescale: imx8-ss-dma: set lpspi0 max frequency to 60mhzPhilippe Schenker
60MHz is the maximum frequency mentioned in the datasheet for master mode. Set that to 60MHz to match lpspi2. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-07arm64: dts: imx8-ss-dma: add io-channel-cells to adc nodesMax Krummenacher
This commit adds io-channel-cells property to the ADC nodes. This property is required in order for an IIO consumer driver to work. Especially required for Apalis iMX8 QM, as the touchscreen driver uses ADC channels with the ADC driver based on IIO framework. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-07arm64: dts: freescale: imx8-ss-lsio: add support for lsio_pwm0-3Philippe Schenker
Add support for lsio_pwm0-3. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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