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git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.5 (take two)
- Add IOMMU support for PCIe devices on R-Car Gen3 and RZ/G2 SoCs,
- Add HSCIF1 serial port support on Renesas ULCB boards equipped with
the Shimafuji Kingfisher extension,
- Miscellaneous fixes and improvements.
* tag 'renesas-dts-for-v6.5-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: ulcb-kf: Add HSCIF1 node
arm64: dts: renesas: ulcb-kf: Remove flow control for SCIF1
ARM: dts: iwg20d-q7-common: Fix backlight pwm specifier
arm64: dts: renesas: Add IOMMU related properties into PCIe host nodes
Link: https://lore.kernel.org/r/cover.1686304614.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt
Amlogic ARM64 DT changes for v6.4:
- Introduce initial DT for Amlogic C4 SoC based AW409
- add missing cache properties
* tag 'amlogic-arm64-dt-for-v6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
arm64: dts: add support for C3 based Amlogic AW409
arm64: dts: amlogic: add missing cache properties
dt-bindings: arm: amlogic: add C3 bindings
Link: https://lore.kernel.org/r/37e5de2f-47f1-a3f3-f1e4-4a304192e556@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt
Amlogic ARM DT changes for v6.5:
- correct uart_B and uart_C clock references for meson8 & meson8b
* tag 'amlogic-arm-dt-for-v6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
ARM: dts: meson8: correct uart_B and uart_C clock references
ARM: dts: meson8b: correct uart_B and uart_C clock references
Link: https://lore.kernel.org/r/21b55df9-3eda-0a0f-cf76-79b1d7735314@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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into soc/dt
ARM64: DT: HiSilicon ARM64 DT updates for v6.5
- Clean up the pinctrl-single node names and correct the #size-cells of
the pinctrl controller nodes
* tag 'hisi-arm64-dt-for-6.5' of https://github.com/hisilicon/linux-hisi:
arm64: dts: hisilicon: Unify pinctrl-single pin group nodes
Link: https://lore.kernel.org/r/6482C916.1010507@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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into soc/dt
ARM: DT: HiSilicon ARM32 DT updates for v6.5
- Clean up the pinctrl-single node names and correct the pinctrl
controller nodes of the hi3620 SoC
* tag 'hisi-arm32-dt-for-6.5' of https://github.com/hisilicon/linux-hisi:
ARM: dts: hisilicon: Unify pinctrl-single pin group nodes
Link: https://lore.kernel.org/r/6482C732.3060300@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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ARM: Zynq DT changes for v6.5
- Setup 400k as default i2c frequency
- Wire i2c recovery via gpio on zc702
* tag 'zynq-dt-for-v6.5' of https://github.com/Xilinx/linux-xlnx:
ARM: zynq: dts: Add SCL & SDA GPIO entries for recovery
ARM: zynq: dts: Setting default i2c clock frequency to 400kHz
Link: https://lore.kernel.org/r/c5c99ba2-f004-306c-6251-551826f90df8@amd.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into soc/dt
Clean-up for pinctrl-single node names for omaps for v6.5
To avoid producing lots of make dtbs checks warnings when the yaml binding
for pinctrl-single gets merged, let's fix up the pin group node names. We
want to do this rather than add non-standard node name workarounds to the
yaml binding.
Also included is a non-urgent fix to move gta04 model name out of the pinmux
node that can wait for the merge window.
* tag 'omap-for-v6.5/dt-pin-nodes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: Unify pinctrl-single pin group nodes for dra7
ARM: dts: Unify pinctrl-single pin group nodes for am4
ARM: dts: Unify pinctrl-single pin group nodes for am33xx
ARM: dts: Unify pinctrl-single pin group nodes for ti81xx
ARM: dts: Unify pinctrl-single pin group nodes for omap5
ARM: dts: Unify pinctrl-single pin group nodes for omap4
ARM: dts: Unify pinctrl-single pin group nodes for omap2
ARM: dts: Unify pinctrl-single pin group nodes for omap3
ARM: dts: gta04: Move model property out of pinctrl node
Link: https://lore.kernel.org/r/pull-1685700720-242492@atomide.com-2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Amlogic C3 is an advanced edge AI processor designed for smart IP camera
applications.
Add basic support for the C3 based Amlogic AW409 board, which describes
the following components: CPU, GIC, IRQ, Timer, UART. It's capable of
booting up into the serial console.
Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
Link: https://lore.kernel.org/r/20230515093237.2203171-1-xianwei.zhao@amlogic.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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We want to unify the pinctrl-single pin group nodes to use naming "pins".
Otherwise non-standad pin group names will add make dtbs checks errors
when the pinctrl-single yaml binding gets merged.
Let's also correct the pinctrl controller #size-cells to 0 while at it.
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
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We want to unify the pinctrl-single pin group nodes to use naming "pins".
Otherwise non-standad pin group names will add make dtbs checks errors
when the pinctrl-single yaml binding gets merged.
Let's also correct the pinctrl controller #size-cells to 0 while at it
and drop unnecessary ranges property.
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into soc/dt
Devicetree changes for omaps for v6.5
A non-urgent fix for gpmc,wait-pin property for am335x-myirtech-myc, and
initial support for Epson Moverio BT-200 AR glasses.
* tag 'omap-for-v6.5/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: omap4: add initial support for Epson Moverio BT-200
ARM: dts: am335x-myirtech: Add missing NAND wait pin definition
Link: https://lore.kernel.org/r/pull-1685700720-242492@atomide.com-3
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt
Samsung DTS ARM changes for v6.5
1. Final cleanups and improvements as a result of dtbs_checks which rely
on previously merged driver changes thus affecting older or
out-of-tree kernels. The changes are necessary to achieve full
dtbs_check compliance, which justifies affecting out-of-tree users.
Changes affecting them are:
- Drop simple-bus compatible from FIMC: Exynos4 and S5PV210,
- Remove empty camera pinctrl configuration: Exynos4 and S5PV210,
- Re-order MFC clock names to match Exynos and bindings: S5PV210.
2. Except above few more non-intrusive cleanups for dtbs_check for
S5PV210. Fix also some typos.
3. Re-introduce Exynos4212 which was removed because of lack of upstream
users. Artur Weber adds now Samsung Galaxy Tab3 with Exynos4212.
* tag 'samsung-dt-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: s5pv210: Fix typo in comments, fix pinctrl header
ARM: dts: s3c64xx: Fix some typos in comments
ARM: dts: exynos: Fix some typos in comments
dt-bindings: arm: samsung: Add Samsung Galaxy Tab3 family boards
ARM: dts: exynos: Re-introduce Exynos4212 DTSI
ARM: dts: exynos: Move common Exynos4x12 definitions to exynos4x12.dtsi
ARM: dts: s5pv210: remove empty camera pinctrl configuration
ARM: dts: s5pv210: add dummy 5V regulator for backlight on SMDKv210
ARM: dts: s5pv210: re-order MFC clock names to match Exynos and bindings
ARM: dts: s5pv210: align USB node name with bindings
ARM: dts: s5pv210: align pin configuration nodes with bindings
ARM: dts: exynos: Remove empty camera pinctrl configuration in Odroid X/U3
ARM: dts: exynos: Remove empty camera pinctrl configuration in Universal C210
ARM: dts: exynos: Remove empty camera pinctrl configuration in Trats
ARM: dts: s5pv210: drop simple-bus from FIMC
ARM: dts: exynos: drop simple-bus from FIMC in Exynos4
Link: https://lore.kernel.org/r/20230602091501.15178-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/dt
AT91 DT for 6.5
It contains:
- gpio-line-names addition for at91-tse850-3 board
- support for SMA connectors on lan966x-pcb8309 board
- use drive-open-drain as boolean property as this is how code handles
it
- generic names for clock controller devices
- use of the new clock controller bindings for at91sam9n12 slow clock
controller
- one blank line removal on sama5d2.dtsi
* tag 'at91-dt-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: dts: at91: sama5d2: remove extra line
ARM: dts: at91: Return to boolean properties
ARM: dts: lan966x: Add support for SMA connectors
ARM: dts: at91: use clock-controller name for sckc nodes
ARM: dts: at91: at91sam9n12: witch sckc to new clock bindings
ARM: dts: at91: use clock-controller name for PMC nodes
ARM: dts: at91: tse850: add properties for gpio-line-names
Link: https://lore.kernel.org/r/20230530105945.11638-1-claudiu.beznea@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into soc/dt
These are some Ux500 DTS updates for the v6.5 kernel cycle:
- Define the SRAM nodes that will be the preferred way to
specify SRAM segments to drivers going forward.
- Fix up the naming of the STMPE nodes as we are merging
proper YAML bindings which puts restrictions on those.
- Disable charging on the Ux500 HREF boards because these
do not have any real batteries connected.
* tag 'ux500-dts-for-v6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: ux500: Add eSRAM nodes
ARM: dts: ux500: Fix STMPE device nodes
ARM: dts: ux500: Disable charging on HREF boards
Link: https://lore.kernel.org/r/CACRpkdZ2YLzB-n+1M9u0UqVfct_LAR5cLvYyJhxHsXNR_TFzpQ@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Exposed on CN4. Tested by connecting it to a Renesas Ebisu board.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230525084823.4195-3-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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The schematics are misleading, the flow control is for HSCIF1. We need
SCIF1 for GNSS/GPS which does not use flow control.
Fixes: c6c816e22bc8 ("arm64: dts: ulcb-kf: enable SCIF1")
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230525084823.4195-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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make dtbs_check:
arch/arm/boot/dts/renesas/r8a7743-iwg20d-q7.dtb: backlight: pwms: [[58, 0, 5000000], [0]] is too long
From schema: Documentation/devicetree/bindings/leds/backlight/pwm-backlight.yaml
arch/arm/boot/dts/renesas/r8a7743-iwg20d-q7-dbcm-ca.dtb: backlight: pwms: [[67, 0, 5000000], [0]] is too long
From schema: Documentation/devicetree/bindings/leds/backlight/pwm-backlight.yaml
arch/arm/boot/dts/renesas/r8a7744-iwg20d-q7-dbcm-ca.dtb: backlight: pwms: [[67, 0, 5000000], [0]] is too long
From schema: Documentation/devicetree/bindings/leds/backlight/pwm-backlight.yaml
arch/arm/boot/dts/renesas/r8a7744-iwg20d-q7.dtb: backlight: pwms: [[58, 0, 5000000], [0]] is too long
From schema: Documentation/devicetree/bindings/leds/backlight/pwm-backlight.yaml
PWM specifiers referring to R-Car PWM Timer Controllers should contain
only two cells.
Fix this by dropping the bogus third cell.
Fixes: 6f89dd9e9325d05b ("ARM: dts: iwg20d-q7-common: Add LCD support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/6e5c3167424a43faf8c1fa68d9667b3d87dc86d8.1684855911.git.geert+renesas@glider.be
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Add iommu-map and iommu-map-mask properties to the PCIe host nodes.
Note that iommu-map-mask should be zero because the IPMMU assigns
one micro TLB ID only, to the PCIe host.
Also change the dma-ranges arguments for IOMMU. Note that dma-ranges
can be used if the IOMMU is disabled.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230510090358.261266-1-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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On Meson8 uart_B and uart_C do not work, because they are relying on
incorrect clocks. Change the references of pclk to the correct CLKID
(UART1 for uart_B and UART2 for uart_C), to allow use of the two uarts.
This was originally reported by Hans-Frieder Vogt for Meson8b [0], but
the same bug is also present in meson8.dtsi
[0] https://lore.kernel.org/linux-amlogic/trinity-bf20bcb9-790b-4ab9-99e3-0831ef8257f4-1680878185420@3c-app-gmx-bap55/
Fixes: 57007bfb5469 ("ARM: dts: meson8: Fix the UART device-tree schema validation")
Reported-by: Hans-Frieder Vogt <hfdevel@gmx.net> # for meson8b.dtsi
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20230516203029.1031174-1-martin.blumenstingl@googlemail.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Add the devices working with current drivers for the
Epson Moverio BT-200 AR glasses consisting of a control unit
and the glasses itself.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Message-Id: <20230313110409.2294154-1-andreas@kemnade.info>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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The NAND wait pin is connected to the GPMC, but this is not mentioned
in the DT bindings. Let's fix this.
Signed-off-by: Alexander Shiyan <eagle.alexander923@gmail.com>
Message-Id: <20230524091157.775960-1-eagle.alexander923@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Change 'specfic' to 'specific' and make the pinctrl DTSI header
more like the s3c64xx pinctrl DTSI (previously it was copied from
the main s5pv210 DTSI, and not changed to match the new contents).
Signed-off-by: Artur Weber <aweber.kernel@gmail.com>
Link: https://lore.kernel.org/r/20230519190625.7844-4-aweber.kernel@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Change 'specfic' to 'specific'.
Signed-off-by: Artur Weber <aweber.kernel@gmail.com>
Link: https://lore.kernel.org/r/20230519190625.7844-3-aweber.kernel@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Change 'specfic' to 'specific', 'optiosn' to 'options' and remove
duplicated 'are listed' in DTSI heading comments.
Signed-off-by: Artur Weber <aweber.kernel@gmail.com>
Link: https://lore.kernel.org/r/20230519190625.7844-2-aweber.kernel@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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soc/dt
DT changes for v6.5:
- Add missing cache properties for s32g2 and s32v234.
* tag 's32g2-dt-6.5' of https://github.com/chesterlintw/linux-s32g:
arm64: dts: s32: add missing cache properties
Link: https://lore.kernel.org/r/ZHC8PO8lDjTae7nV@linux-8mug
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.5
- Add partial display support for the RZ/G2L and RZ/V2L SoCs and the
RZ/G2L{,C} SMARC EVK development boards,
- Add camera support for the RZ/GV2L SoC and the RZ/V2L and RZ/G2LC
SMARC EVK development boards,
- Add Multi-Function Timer Pulse Unit 3 support for the RZ/G2L and
RZ/V2L SoCs,
- Add PWM support for the R-Car V3U SoC.
* tag 'renesas-dts-for-v6.5-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: r8a779a0: Add PWM nodes
arm64: dts: renesas: r9a07g054: Add MTU3a node
arm64: dts: renesas: r9a07g044: Add MTU3a node
arm64: dts: renesas: rzg2lc-smarc: Enable CRU, CSI support
arm64: dts: renesas: rzv2l-smarc: Enable CRU, CSI support
arm64: dts: renesas: r9a07g054: Add CSI and CRU nodes
arm64: dts: renesas: rzg2lc-smarc: Link DSI with ADV7535
arm64: dts: renesas: rzg2l-smarc: Link DSI with ADV7535
arm64: dts: renesas: r9a07g054: Add DSI node
arm64: dts: renesas: r9a07g044: Add DSI node
arm64: dts: renesas: r9a07g054: Add vspd node
arm64: dts: renesas: r9a07g044: Add vspd node
arm64: dts: renesas: r9a07g054: Add fcpvd node
arm64: dts: renesas: r9a07g044: Add fcpvd node
Link: https://lore.kernel.org/r/cover.1685094244.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt
Minor improvements in ARM DTS for v6.5
Minor improvements to fix dtbs_check warnings:
1. STE: Align UART nodes with bindings.
2. EN7523: add missing cache properties.
* tag 'dt-cleanup-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt:
ARM: dts: en7523: add missing cache properties
ARM: dts: ste: align UART node name with bindings
Link: https://lore.kernel.org/r/20230517131255.471002-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt
Minor improvements in ARM64 DTS for v6.5
Mostly minor improvements to fix dtbs_check warnings:
1. mba6ulx: use non-deprecated property for GPIO keys wake-up,
2. Add missing cache properties (APM, Amazon, HiSilicon, Realtek,
Synaptics, AllWinner, Microchip).
Few older minor and major fixes which were waiting on mailing lists for
longer time for Microchip SparX-5:
1. Fix secondary CPU bring-up and crash when talking to PSCI on reference
boards (Robert Marko),
2. Simplify CPU address-cells (Robert Marko),
3. Align pinctrl node names with bindings (Michael Walle).
* tag 'dt64-cleanup-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt:
arm64: dts: sparx5: rename pinctrl nodes
arm64: dts: microchip: sparx5: correct CPU address-cells
arm64: dts: microchip: sparx5: do not use PSCI on reference boards
arm64: dts: microchip: add missing cache properties
arm64: dts: allwinner: a64: add missing cache properties
arm64: dts: synaptics: add missing cache properties
arm64: dts: realtek: add missing cache properties
arm64: dts: hisilicon: add missing cache properties
arm64: dts: amazon: add missing cache properties
arm64: dts: apm: add missing cache properties
arm64: dts: mba6ulx: correct GPIO keys wakeup
Link: https://lore.kernel.org/r/20230517131255.471002-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Remove extra line from the definition of slow clock controller.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20230522124812.107227-1-claudiu.beznea@microchip.com
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We want to unify the pinctrl-single pin group nodes to use naming "pins".
Otherwise non-standad pin group names will add make dtbs checks errors
when the pinctrl-single yaml binding gets merged.
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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We want to unify the pinctrl-single pin group nodes to use naming "pins".
Otherwise non-standad pin group names will add make dtbs checks errors
when the pinctrl-single yaml binding gets merged.
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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We want to unify the pinctrl-single pin group nodes to use naming "pins".
Otherwise non-standad pin group names will add make dtbs checks errors
when the pinctrl-single yaml binding gets merged.
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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We want to unify the pinctrl-single pin group nodes to use naming "pins".
Otherwise non-standad pin group names will add make dtbs checks errors
when the pinctrl-single yaml binding gets merged.
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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We want to unify the pinctrl-single pin group nodes to use naming "pins".
Otherwise non-standad pin group names will add make dtbs checks errors
when the pinctrl-single yaml binding gets merged.
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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We want to unify the pinctrl-single pin group nodes to use naming "pins".
Otherwise non-standad pin group names will add make dtbs checks errors
when the pinctrl-single yaml binding gets merged.
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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We want to unify the pinctrl-single pin group nodes to use naming "pins".
Otherwise non-standad pin group names will add make dtbs checks errors
when the pinctrl-single yaml binding gets merged.
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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We want to unify the pinctrl-single pin group nodes to use naming "pins".
Otherwise non-standad pin group names will add make dtbs checks errors
when the pinctrl-single yaml binding gets merged.
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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The model property should be at the top level, let's move it out
of the pinctrl node.
Fixes: d2eaf949d2c3 ("ARM: dts: omap3-gta04a5one: define GTA04A5 variant with OneNAND")
Cc: Andreas Kemnade <andreas@kemnade.info>
Cc: H. Nikolaus Schaller <hns@goldelico.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Returning back to commit 0dc23d1a8e17
("arm: dts: at91: Fix boolean properties with values") as pinctrl driver no
longer expects an integer value and expects a simple boolean property.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/6f06be9e393c02563bc877498c8af75daf3b47f8.1684313910.git.Ryan.Wanner@microchip.com
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The pcb8309 has 2 SMA connectors which are connected to the lan966x
chip. The lan966x can generate 1PPS output on one of them and it can
receive 1PPS input on the other one.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20230421113758.3465678-1-horatiu.vultur@microchip.com
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Use clock-controller generic name for slow clock controller nodes.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20230517094119.2894220-5-claudiu.beznea@microchip.com
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Switch slow clock controller to new clock bindings.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20230517094119.2894220-4-claudiu.beznea@microchip.com
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Use clock-controller generic name for PMC nodes.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20230517094119.2894220-2-claudiu.beznea@microchip.com
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Signal names are one-to-one copies from the schematics, except VBUS
which is an unnamed signal there.
Signed-off-by: Peter Rosin <peda@axentia.se>
[claudiu.beznea: add 1 indentation tab before index based comment]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/32995b53-7f73-936f-a81d-5f1969f64910@axentia.se
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git://git.kernel.org/pub/scm/linux/kernel/git/uml/linux
Pull UML fix from Richard Weinberger:
- Fix modular build for UML watchdog
* tag 'uml-for-linus-6.4-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/uml/linux:
um: harddog: fix modular build
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Pull kvm fixes from Paolo Bonzini:
"ARM:
- Plug a race in the stage-2 mapping code where the IPA and the PA
would end up being out of sync
- Make better use of the bitmap API (bitmap_zero, bitmap_zalloc...)
- FP/SVE/SME documentation update, in the hope that this field
becomes clearer...
- Add workaround for Apple SEIS brokenness to a new SoC
- Random comment fixes
x86:
- add MSR_IA32_TSX_CTRL into msrs_to_save
- fixes for XCR0 handling in SGX enclaves
Generic:
- Fix vcpu_array[0] races
- Fix race between starting a VM and 'reboot -f'"
* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
KVM: VMX: add MSR_IA32_TSX_CTRL into msrs_to_save
KVM: x86: Don't adjust guest's CPUID.0x12.1 (allowed SGX enclave XFRM)
KVM: VMX: Don't rely _only_ on CPUID to enforce XCR0 restrictions for ECREATE
KVM: Fix vcpu_array[0] races
KVM: VMX: Fix header file dependency of asm/vmx.h
KVM: Don't enable hardware after a restart/shutdown is initiated
KVM: Use syscore_ops instead of reboot_notifier to hook restart/shutdown
KVM: arm64: vgic: Add Apple M2 PRO/MAX cpus to the list of broken SEIS implementations
KVM: arm64: Clarify host SME state management
KVM: arm64: Restructure check for SVE support in FP trap handler
KVM: arm64: Document check for TIF_FOREIGN_FPSTATE
KVM: arm64: Fix repeated words in comments
KVM: arm64: Constify start/end/phys fields of the pgtable walker data
KVM: arm64: Infer PA offset from VA in hyp map walker
KVM: arm64: Infer the PA offset from IPA in stage-2 map walker
KVM: arm64: Use the bitmap API to allocate bitmaps
KVM: arm64: Slightly optimize flush_context()
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git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux
Pull perf tools fixes from Arnaldo Carvalho de Melo:
- Fail graciously if BUILD_BPF_SKEL=1 is specified and clang isn't
available
- Add empty 'struct rq' to 'perf lock contention' to satisfy libbpf
'runqueue' type verification. This feature is built only with
BUILD_BPF_SKEL=1
- Make vmlinux.h use bpf.h and perf_event.h in source directory, not
system ones that may be old and not have things like 'union
perf_sample_weight'
- Add system include paths to BPF builds to pick things missing in the
headers included by clang -target bpf
- Update various header copies with the kernel sources
- Change divide by zero and not supported events behavior to show
'nan'/'not counted' in 'perf stat' output.
This happens when using things like 'perf stat -M TopdownL2 true',
involving JSON metrics
- Update no event/metric expectations affected by using JSON metrics in
'perf stat -ddd' perf test
- Avoid segv with 'perf stat --topdown' for metrics without a group
- Do not assume which events may have a PMU name, allowing the logic to
keep an AUX event group together. Makes this usecase work again:
$ perf record --no-bpf-event -c 10 -e '{intel_pt//,tlb_flush.stlb_any/aux-sample-size=8192/pp}:u' -- sleep 0.1
[ perf record: Woken up 1 times to write data ]
[ perf record: Captured and wrote 0.078 MB perf.data ]
$ perf script -F-dso,+addr | grep -C5 tlb_flush.stlb_any | head -11
sleep 20444 [003] 7939.510243: 1 branches:uH: 7f5350cc82a2 dl_main+0x9a2 => 7f5350cb38f0 _dl_add_to_namespace_list+0x0
sleep 20444 [003] 7939.510243: 1 branches:uH: 7f5350cb3908 _dl_add_to_namespace_list+0x18 => 7f5350cbb080 rtld_mutex_dummy+0x0
sleep 20444 [003] 7939.510243: 1 branches:uH: 7f5350cc8350 dl_main+0xa50 => 0 [unknown]
sleep 20444 [003] 7939.510244: 1 branches:uH: 7f5350cc83ca dl_main+0xaca => 7f5350caeb60 _dl_process_pt_gnu_property+0x0
sleep 20444 [003] 7939.510245: 1 branches:uH: 7f5350caeb60 _dl_process_pt_gnu_property+0x0 => 0 [unknown]
sleep 20444 7939.510245: 10 tlb_flush.stlb_any/aux-sample-size=8192/pp: 0 7f5350caeb60 _dl_process_pt_gnu_property+0x0
sleep 20444 [003] 7939.510254: 1 branches:uH: 7f5350cc87fe dl_main+0xefe => 7f5350ccd240 strcmp+0x0
sleep 20444 [003] 7939.510254: 1 branches:uH: 7f5350cc8862 dl_main+0xf62 => 0 [unknown]
- Add a check for the above use case in 'perf test test_intel_pt'
- Fix build with refcount checking on arm64, it was still accessing
fields that need to be wrapped so that the refcounted struct gets
checked
- Fix contextid validation in ARM's CS-ETM, so that older kernels
without that field can still be supported
- Skip unsupported aggregation for stat events found in perf.data files
in 'perf script'
- Add stat test for record and script to check the previous problem
- Remove needless debuginfod queries from 'perf test java symbol', this
was just making the test take a long time to complete
- Address python SafeConfigParser() deprecation warning in 'perf test
attr'
- Fix __NR_execve undeclared on i386 'perf bench syscall' build error
* tag 'perf-tools-fixes-for-v6.4-1-2023-05-20' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux: (33 commits)
perf bench syscall: Fix __NR_execve undeclared build error
perf test attr: Fix python SafeConfigParser() deprecation warning
perf test attr: Update no event/metric expectations
tools headers disabled-features: Sync with the kernel sources
tools headers UAPI: Sync arch prctl headers with the kernel sources
tools headers: Update the copy of x86's mem{cpy,set}_64.S used in 'perf bench'
tools headers x86 cpufeatures: Sync with the kernel sources
tools headers UAPI: Sync s390 syscall table file that wires up the memfd_secret syscall
tools headers UAPI: Sync linux/prctl.h with the kernel sources
perf metrics: Avoid segv with --topdown for metrics without a group
perf lock contention: Add empty 'struct rq' to satisfy libbpf 'runqueue' type verification
perf cs-etm: Fix contextid validation
perf arm64: Fix build with refcount checking
perf test: Add stat test for record and script
perf script: Skip aggregation for stat events
perf build: Add system include paths to BPF builds
perf bpf skels: Make vmlinux.h use bpf.h and perf_event.h in source directory
perf parse-events: Do not break up AUX event group
perf test test_intel_pt.sh: Test sample mode with event with PMU name
perf evsel: Modify group pmu name for software events
...
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git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux
Pull powerpc fixes from Michael Ellerman:
- Fix broken soft dirty tracking when using the Radix MMU (>= P9)
- Fix ISA mapping when "ranges" property is not present, for PASemi
Nemo boards
- Fix a possible WARN_ON_ONCE hitting in BPF extable handling
- Fix incorrect DMA address handling when using 2MB TCEs
- Fix a bug in IOMMU table handling for SR-IOV devices
- Fix the recent rework of IOMMU handling which left arch code calling
clean up routines that are handled by the IOMMU core
- A few assorted build fixes
Thanks to Christian Zigotzky, Dan Horák, Gaurav Batra, Hari Bathini,
Jason Gunthorpe, Nathan Chancellor, Naveen N. Rao, Nicholas Piggin, Pali
Rohár, Randy Dunlap, and Rob Herring.
* tag 'powerpc-6.4-2' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
powerpc/iommu: Incorrect DDW Table is referenced for SR-IOV device
powerpc/iommu: DMA address offset is incorrectly calculated with 2MB TCEs
powerpc/iommu: Remove iommu_del_device()
powerpc/crypto: Fix aes-gcm-p10 build when VSX=n
powerpc/bpf: populate extable entries only during the last pass
powerpc/boot: Disable power10 features after BOOTAFLAGS assignment
powerpc/64s/radix: Fix soft dirty tracking
powerpc/fsl_uli1575: fix kconfig warnings and build errors
powerpc/isa-bridge: Fix ISA mapping when "ranges" is not present
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git://git.kernel.org/pub/scm/linux/kernel/git/dlemoal/libata
Pull ata fix from Damien Le Moal:
- Fix DT binding for the ahci-ceva driver to fully describe all iommus,
from Michal
* tag 'ata-6.4-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/dlemoal/libata:
dt-bindings: ata: ahci-ceva: Cover all 4 iommus entries
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