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2023-05-31drm/i915/guc: Drop legacy CTB definitionsMichal Wajdeczko
We've already switched to new HXG definitions some time ago, drop legacy CTB definitions to avoid mistakes. Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Piotr Piórkowski <piotr.piorkowski@intel.com> Cc: John Harrison <John.C.Harrison@Intel.com> Reviewed-by: Piotr Piórkowski <piotr.piorkowski@intel.com> Signed-off-by: John Harrison <John.C.Harrison@Intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230509201103.538-1-michal.wajdeczko@intel.com
2023-05-31drm/i915: use localized __diag_ignore_all() instead of per fileJani Nikula
Use localized __diag_push(), __diag_ignore_all() with rationale, and __diag_pop() for specific initializations instead of blanket disabling of -Woverride-init across several files. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230525210653.1048972-1-jani.nikula@intel.com
2023-05-31drm/ttm: Remove redundant code in ttm_tt_init_fieldsMa Jun
Remove redundant assignment code for ttm->caching as it's overwritten just a few lines later. v2: - Update the commit message. Signed-off-by: Ma Jun <Jun.Ma2@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230531053051.3453509-1-Jun.Ma2@amd.com
2023-05-31drm/bridge: display-connector: handle hdmi-pwr supplyDmitry Baryshkov
On some devices the +5V Power pin of the HDMI connector and/or the ESD protection logic is powered on by a separate regulator. Instead of declaring this regulator as always-on, make hdmi-connector support the additional hdmi-pwr supply. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230531000259.3758235-4-dmitry.baryshkov@linaro.org
2023-05-31drm/bridge: display-connector: rename dp_pwr to connector_pwrDmitry Baryshkov
In preparation to adding support for the hdmi_pwr supply, rename dp_pwr structure field to the generic connector_pwr. Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230531000259.3758235-3-dmitry.baryshkov@linaro.org
2023-05-31dt-bindings: display: hdmi-connector: add hdmi-pwr supplyDmitry Baryshkov
Follow the dp-connector example and add hdmi-pwr supply to drive the 5V pin of the HDMI connector (together with some simple glue logic possibly attached to the connector). Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230531000259.3758235-2-dmitry.baryshkov@linaro.org
2023-05-31Merge drm/drm-next into drm-intel-nextJani Nikula
Sync the drm-intel-gt-next changes back to drm-intel-next via drm-next. Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2023-05-31drm/i915/hdcp: Rename comp_mutex to hdcp_mutexSuraj Kandpal
Rename comp_mutex to hdcp_mutex as it does not just protect component related variables which was a terminology used when hdcp was to be binded as a mei component from MTL we use gsc cs which does not use the component binding path for HDCP. Cc: Jani Nikula <jani.nikula@intel.com> Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230529110740.1522985-4-suraj.kandpal@intel.com
2023-05-31drm/i915/hdcp: Move away from master naming to arbiterSuraj Kandpal
Rename variables to move away from master convention to arbiter %s/hdcp.master/hdcp.arbiter %s/i915_hdcp_master/i915_hdcp_arbiter %s/comp_master/comp_arbiter --v2 - delete i915_hdcp_comp_master redundant declaration [Chaitanya] - use %s/foo/bar/ format in commit message to show changes [Chaitanya] --v3 - replace i915_hdcp_comp_master declaration with i915_hdcp_arbiter to avoid any compile fail with old compilers [Chaitanya] Cc: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230529110740.1522985-3-suraj.kandpal@intel.com
2023-05-31drm/i915/hdcp: Rename dev_priv to i915Suraj Kandpal
Rename dev_priv to i915 to keep up with latest code standards. Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230529110740.1522985-2-suraj.kandpal@intel.com
2023-05-30drm/panel-edp: Convert to platform remove callback returning voidUwe Kleine-König
The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. panel_edp_remove() always returned zero, so convert it to return void without any loss and then just drop the return from panel_edp_platform_remove(). Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230530074216.2195962-1-u.kleine-koenig@pengutronix.de
2023-05-30drm: Switch i2c drivers back to use .probe()Uwe Kleine-König
After commit b8a1a4cd5a98 ("i2c: Provide a temporary .probe_new() call-back type"), all drivers being converted to .probe_new() and then 03c835f498b5 ("i2c: Switch .probe() to not take an id parameter") convert back to (the new) .probe() to be able to eventually drop .probe_new() from struct i2c_driver. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Kieran Bingham <kieran.bingham@ideasonboard.com> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Reviewed-by: Martyn Welch <martyn.welch@collabora.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Guenter Roeck <groeck@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230526090709.1517297-1-u.kleine-koenig@pengutronix.de
2023-05-30drm/i915/guc: Track all sent actions to GuCMichal Wajdeczko
For easier debug of any unexpected error responses from GuC that might be related to non-blocking fast requests, track action code (and stack if under DEBUG_GUC config) for every H2G request. Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Signed-off-by: John Harrison <John.C.Harrison@Intel.com> Reviewed-by: John Harrison <John.C.Harrison@Intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230526235538.2230780-4-John.C.Harrison@Intel.com
2023-05-30drm/i915/guc: Update log for unsolicited CTB responseMichal Wajdeczko
Instead of printing message fence twice, include HXG header of the unexpected message and its len. Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Signed-off-by: John Harrison <John.C.Harrison@Intel.com> Reviewed-by: John Harrison <John.C.Harrison@Intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230526235538.2230780-3-John.C.Harrison@Intel.com
2023-05-30drm/i915/guc: Use FAST_REQUEST for non-blocking H2G callsMichal Wajdeczko
In addition to the already defined REQUEST HXG message format, which is used when sender expects some confirmation or data, HXG protocol includes definition of the FAST REQUEST message, that may be used when sender does not expect any useful data to be returned. Using this instead of GUC_HXG_TYPE_EVENT for non-blocking CTB requests will allow GuC to send back GUC_HXG_TYPE_RESPONSE_FAILURE in case of errors. Note that it is not possible to return such errors to the caller, since this is for non-blocking calls and the related fence is not stored. Instead such messages are treated as unexpected, which will give an indication of potential GuC misprogramming that warrants extra debugging effort. Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Signed-off-by: John Harrison <John.C.Harrison@Intel.com> Reviewed-by: John Harrison <John.C.Harrison@Intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230526235538.2230780-2-John.C.Harrison@Intel.com
2023-05-30drm/i915/gem: Use large rings for compute contextsChris Wilson
Allow compute contexts to submit the maximal amount of work without blocking userspace. The original size for user LRC ring's (SZ_16K) was chosen to minimise memory consumption, without being so small as to frequently stall in the middle of workloads. With the main consumers being GL / media pipelines of 2 or 3 batches per frame, we want to support ~10 requests in flight to allow for the application to control throttling without stalling within a frame. v2: - cover with else part Signed-off-by: Chris Wilson <chris.p.wilson@intel.com> Signed-off-by: Tejas Upadhyay <tejas.upadhyay@intel.com> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230517135754.1110291-1-tejas.upadhyay@intel.com
2023-05-30dt-bindings: bridge: samsung-dsim: Make some flags optionalAdam Ford
In the event a device is connected to the samsung-dsim controller that doesn't support the burst-clock, the driver is able to get the requested pixel clock from the attached device or bridge. In these instances, the samsung,burst-clock-frequency isn't needed, so remove it from the required list. The pll-clock frequency can be set by the device tree entry for samsung,pll-clock-frequency, but in some cases, the pll-clock may have the same clock rate as sclk_mipi clock. If they are equal, this flag is not needed since the driver will use the sclk_mipi rate as a fallback. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230528132727.3933-1-aford173@gmail.com
2023-05-29drm: Place Renesas drivers in a separate dirBiju Das
Create vendor specific renesas directory and move renesas drivers to that directory. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Acked-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2023-05-29drm: rcar-du: remove R-Car H3 ES1.* workaroundsWolfram Sang
R-Car H3 ES1.* was only available to an internal development group and needed a lot of quirks and workarounds. These become a maintenance burden now, so our development group decided to remove upstream support for this SoC and prevent booting it. Public users only have ES2 onwards. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2023-05-29Merge tag 'drm-intel-gt-next-2023-05-24' of ↵Dave Airlie
git://anongit.freedesktop.org/drm/drm-intel into drm-next UAPI Changes: - New getparam for querying PXP support and load status Cross-subsystem Changes: - GSC/MEI proxy driver Driver Changes: Fixes/improvements/new stuff: - Avoid clearing pre-allocated framebuffers with the TTM backend (Nirmoy Das) - Implement framebuffer mmap support (Nirmoy Das) - Disable sampler indirect state in bindless heap (Lionel Landwerlin) - Avoid out-of-bounds access when loading HuC (Lucas De Marchi) - Actually return an error if GuC version range check fails (John Harrison) - Get mutex and rpm ref just once in hwm_power_max_write (Ashutosh Dixit) - Disable PL1 power limit when loading GuC firmware (Ashutosh Dixit) - Block in hwmon while waiting for GuC reset to complete (Ashutosh Dixit) - Provide sysfs for SLPC efficient freq (Vinay Belgaumkar) - Add support for total context runtime for GuC back-end (Umesh Nerlige Ramappa) - Enable fdinfo for GuC backends (Umesh Nerlige Ramappa) - Don't capture Gen8 regs on Xe devices (John Harrison) - Fix error capture for virtual engines (John Harrison) - Track patch level versions on reduced version firmware files (John Harrison) - Decode another GuC load failure case (John Harrison) - GuC loading and firmware table handling fixes (John Harrison) - Fix confused register capture list creation (John Harrison) - Dump error capture to kernel log (John Harrison) - Dump error capture to dmesg on CTB error (John Harrison) - Disable rps_boost debugfs when SLPC is used (Vinay Belgaumkar) Future platform enablement: - Disable stolen memory backed FB for A0 [mtl] (Nirmoy Das) - Various refactors for multi-tile enablement (Andi Shyti, Tejas Upadhyay) - Extend Wa_22011802037 to MTL A-step (Madhumitha Tolakanahalli Pradeep) - WA to clear RDOP clock gating [mtl] (Haridhar Kalvala) - Set has_llc=0 [mtl] (Fei Yang) - Define MOCS and PAT tables for MTL (Madhumitha Tolakanahalli Pradeep) - Add PTE encode function [mtl] (Fei Yang) - fix mocs selftest [mtl] (Fei Yang) - Workaround coherency issue for Media [mtl] (Fei Yang) - Add workaround 14018778641 [mtl] (Tejas Upadhyay) - Implement Wa_14019141245 [mtl] (Radhakrishna Sripada) - Fix the wa number for Wa_22016670082 [mtl] (Radhakrishna Sripada) - Use correct huge page manager for MTL (Jonathan Cavitt) - GSC/MEI support for Meteorlake (Alexander Usyskin, Daniele Ceraolo Spurio) - Define GuC firmware version for MTL (John Harrison) - Drop FLAT CCS check [mtl] (Pallavi Mishra) - Add MTL for remapping CCS FBs [mtl] (Clint Taylor) - Meteorlake PXP enablement (Alan Previn) - Do not enable render power-gating on MTL (Andrzej Hajda) - Add MTL performance tuning changes (Radhakrishna Sripada) - Extend Wa_16014892111 to MTL A-step (Radhakrishna Sripada) - PMU multi-tile support (Tvrtko Ursulin) - End support for set caching ioctl [mtl] (Fei Yang) Driver refactors: - Use i915 instead of dev_priv insied the file_priv structure (Andi Shyti) - Use proper parameter naming in for_each_engine() (Andi Shyti) - Use gt_err for GT info (Tejas Upadhyay) - Consolidate duplicated capture list code (John Harrison) - Capture list naming clean up (John Harrison) - Use kernel-doc -Werror when CONFIG_DRM_I915_WERROR=y (Jani Nikula) - Preparation for using PAT index (Fei Yang) - Use pat_index instead of cache_level (Fei Yang) Miscellaneous: - Fix memory leaks in i915 selftests (Cong Liu) - Record GT error for gt failure (Tejas Upadhyay) - Migrate platform-dependent mock hugepage selftests to live (Jonathan Cavitt) - Update the SLPC selftest (Vinay Belgaumkar) - Throw out set() wrapper (Jani Nikula) - Large driver kernel doc cleanup (Jani Nikula) - Fix probe injection CI failures after recent change (John Harrison) - Make unexpected firmware versions an error in debug builds (John Harrison) - Silence UBSAN uninitialized bool variable warning (Ashutosh Dixit) - Fix memory leaks in function live_nop_switch (Cong Liu) Merges: - Merge drm/drm-next into drm-intel-gt-next (Joonas Lahtinen) Signed-off-by: Dave Airlie <airlied@redhat.com> # Conflicts: # drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/ZG5SxCWRSkZhTDtY@tursulin-desk
2023-05-26drm: lcdif: Add i.MX93 LCDIF compatible stringLiu Ying
With all previous preparations done to make it possible for the single LCDIF embedded in i.MX93 SoC to drive multiple displays simultaneously, add i.MX93 LCDIF compatible string as the last step of adding i.MX93 LCDIF support. Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Liu Ying <victor.liu@nxp.com> Signed-off-by: Marek Vasut <marex@denx.de> Link: https://patchwork.freedesktop.org/patch/msgid/20230510092450.4024730-7-victor.liu@nxp.com
2023-05-26drm: lcdif: Add multiple encoders and first bridges supportLiu Ying
The single LCDIF embedded in i.MX93 SoC may drive multiple displays simultaneously. Look at LCDIF output port's remote port parents to find all enabled first bridges. Add an encoder for each found bridge and attach the bridge to the encoder. This is a preparation for adding i.MX93 LCDIF support. Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com> Acked-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Liu Ying <victor.liu@nxp.com> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Marek Vasut <marex@denx.de> Link: https://patchwork.freedesktop.org/patch/msgid/20230510092450.4024730-6-victor.liu@nxp.com
2023-05-26drm: lcdif: Check consistent bus format and flags across first bridgesLiu Ying
The single LCDIF embedded in i.MX93 SoC may drive multiple displays simultaneously. Check bus format and flags across first bridges in ->atomic_check() to ensure they are consistent. This is a preparation for adding i.MX93 LCDIF support. Acked-by: Alexander Stein <alexander.stein@ew.tq-group.com> Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Liu Ying <victor.liu@nxp.com> Signed-off-by: Marek Vasut <marex@denx.de> Link: https://patchwork.freedesktop.org/patch/msgid/20230510092450.4024730-5-victor.liu@nxp.com
2023-05-26drm: lcdif: Determine bus format and flags in ->atomic_check()Liu Ying
Instead of determining LCDIF output bus format and bus flags in ->atomic_enable(), do that in ->atomic_check(). This is a preparation for the upcoming patch to check consistent bus format and bus flags across all first downstream bridges in ->atomic_check(). New lcdif_crtc_state structure is introduced to cache bus format and bus flags states in ->atomic_check() so that they can be read in ->atomic_enable(). Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Liu Ying <victor.liu@nxp.com> Signed-off-by: Marek Vasut <marex@denx.de> Link: https://patchwork.freedesktop.org/patch/msgid/20230510092450.4024730-4-victor.liu@nxp.com
2023-05-26drm: lcdif: Drop unnecessary NULL pointer check on lcdif->bridgeLiu Ying
A valid bridge is already found in lcdif_attach_bridge() and set to lcdif->bridge, so lcdif->bridge cannot be a NULL pointer. Drop the unnecessary NULL pointer check in KMS stage. Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Liu Ying <victor.liu@nxp.com> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Marek Vasut <marex@denx.de> Link: https://patchwork.freedesktop.org/patch/msgid/20230510092450.4024730-3-victor.liu@nxp.com
2023-05-26dt-bindings: lcdif: Add i.MX93 LCDIF supportLiu Ying
There is one LCDIF embedded in i.MX93 SoC to connect with MIPI DSI controller through LCDIF cross line pattern(controlled by mediamix blk-ctrl) or connect with LVDS display bridge(LDB) directly or connect with a parallel display through parallel display format(also controlled by mediamix blk-ctrl). i.MX93 LCDIF IP is essentially the same to i.MX8MP LCDIF IP. Add device tree binding for i.MX93 LCDIF. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Liu Ying <victor.liu@nxp.com> Signed-off-by: Marek Vasut <marex@denx.de> Link: https://patchwork.freedesktop.org/patch/msgid/20230510092450.4024730-2-victor.liu@nxp.com
2023-05-26drm/i915: Implement CTM property support for VLVVille Syrjälä
VLV has a so called "wide gamut color correction" unit (WGC). What it is is a 3x3 matrix similar to the later CHV CGM CSC, with less precisions/range. In fact CHV also has the WGC but using it there doesn't really make sense when you have the superior CGM CSC around. Hook up the necessary stuff to expose the WGC as the CTM crtc property. One additional crazy idea that came to mind would be to use the WGC as an output CSC on CHV for YCbCr output. But it would be incompatible with the legacy LUT usage. In fact since the WGC lacks post-offsets we'd probably have to use the legacy LUT to do that final part of the RGB->YCbCr conversion. Sounds doable, but perhaps not worth the hassle. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230413164916.4221-6-ville.syrjala@linux.intel.com Reviewed-by: Uma Shankar <uma.shankar@intel.com>
2023-05-26drm/i915: Always enable CGM CSC on CHVVille Syrjälä
On CHV toggling the CGM CSC on/off while the pipe is running leads to underruns. Looks like we'd have to do the toggling strictly inside the start_of_vblank-frame_start window to avoid this, but that window is less than a scanline so there's no way we can guarantee hitting it. As a workaround let's just leave the CGM CSC permanently enabled. Fortunately the CGM gamma/degamma units don't seem to suffer from this malady. I also tried turning off CGM unit clock gating, but that did not help. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230413164916.4221-5-ville.syrjala@linux.intel.com Reviewed-by: Uma Shankar <uma.shankar@intel.com>
2023-05-26drm/i915: Fix CHV CGM CSC coefficient sign handlingVille Syrjälä
The CHV CGM CSC coefficients are in s4.12 two's complement format. Fix the CTM->CGM conversion to handle that correctly instead of pretending that the hw coefficients are also in some sign-magnitude format. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230413164916.4221-4-ville.syrjala@linux.intel.com Reviewed-by: Uma Shankar <uma.shankar@intel.com>
2023-05-26drm/i915: Expose crtc CTM property on ilk/snbVille Syrjälä
The ilk/snb code is internally fully capable of handling the CTM property, so expose it. Note that we still choose not to expose DEGAMMA_LUT though. The hardware is capable if degamma or gamma, but not both simultanously due to lack of the split gamma mode. Exposing both LUTs might encourage userspace to try enabling both at the same time. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230413164916.4221-3-ville.syrjala@linux.intel.com Reviewed-by: Uma Shankar <uma.shankar@intel.com>
2023-05-26drm/stm: ltdc: fix late dereference checkRaphael Gallais-Pou
In ltdc_crtc_set_crc_source(), struct drm_crtc was dereferenced in a container_of() before the pointer check. This could cause a kernel panic. Fix this smatch warning: drivers/gpu/drm/stm/ltdc.c:1124 ltdc_crtc_set_crc_source() warn: variable dereferenced before check 'crtc' (see line 1119) Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/lkml/202212241802.zeLFZCXB-lkp@intel.com/ Reported-by: Dan Carpenter <error27@gmail.com> Closes: https://lore.kernel.org/lkml/202212241802.zeLFZCXB-lkp@intel.com/ Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com> Acked-by: Philippe Cornu <philippe.cornu@foss.st.com> Signed-off-by: Philippe Cornu <philippe.cornu@foss.st.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230515123818.93971-1-raphael.gallais-pou@foss.st.com
2023-05-26drm/stm: dsi: Use devm_platform_ioremap_resource()Yang Li
Convert platform_get_resource(),devm_ioremap_resource() to a single call to devm_platform_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Acked-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com> Signed-off-by: Philippe Cornu <philippe.cornu@foss.st.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230421083402.21364-1-yang.lee@linux.alibaba.com
2023-05-26drm/i915/gsc: use system include style for drm headersJani Nikula
Use <> instead of "" for including headers from include/. Fixes: 8a9bf29546a1 ("drm/i915/gsc: add initial support for GSC proxy") Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Alan Previn <alan.previn.teres.alexis@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Luca Coelho <luciano.coelho@intel.com> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230525094942.941123-1-jani.nikula@intel.com
2023-05-26drm/i915: Fix clang -Wimplicit-fallthrough in intel_async_flip_check_hw()Nathan Chancellor
Clang warns: drivers/gpu/drm/i915/display/intel_display.c:6012:3: error: unannotated fall-through between switch labels [-Werror,-Wimplicit-fallthrough] case I915_FORMAT_MOD_X_TILED: ^ drivers/gpu/drm/i915/display/intel_display.c:6012:3: note: insert 'break;' to avoid fall-through case I915_FORMAT_MOD_X_TILED: ^ break; 1 error generated. Clang is a little more pedantic than GCC, which does not warn when falling through to a case that is just break or return. Clang's version is more in line with the kernel's own stance in deprecated.rst, which states that all switch/case blocks must end in either break, fallthrough, continue, goto, or return. Add the missing break to silence the warning. Fixes: 937859485aef ("drm/i915: Support Async Flip on Linear buffers") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/202305241902.UvHtMoxa-lkp@intel.com/ Reported-by: Naresh Kamboju <naresh.kamboju@linaro.org> Closes: https://lore.kernel.org/CA+G9fYv68V3ewK0Qj-syQj7qX-hQr0H1MFL=QFNuDoE_J2Zu-g@mail.gmail.com/ Reported-by: Tom Rix <trix@redhat.com> Closes: https://lore.kernel.org/all/20230523125116.1669057-1-trix@redhat.com/ Reviewed-by: Nick Desaulniers <ndesaulniers@google.com> Signed-off-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230524-intel_async_flip_check_hw-implicit-fallthrough-v1-1-83de89e376a1@kernel.org
2023-05-26Revert "dt-bindings: bridge: samsung-dsim: Make some flags optional"Neil Armstrong
This reverts commit cfaf76d349837f695c8aa6d7077847fec4231fe5 which was applied without review due to a bad tool manipulation. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230526-revert-bad-binding-v1-1-67329ad1bd80@linaro.org
2023-05-26drm/panel: simple: fix active size for Ampire AM-480272H3TMQW-T01HDario Binacchi
The previous setting was related to the overall dimension and not to the active display area. In the "PHYSICAL SPECIFICATIONS" section, the datasheet shows the following parameters: ---------------------------------------------------------- | Item | Specifications | unit | ---------------------------------------------------------- | Display area | 98.7 (W) x 57.5 (H) | mm | ---------------------------------------------------------- | Overall dimension | 105.5(W) x 67.2(H) x 4.96(D) | mm | ---------------------------------------------------------- Fixes: 966fea78adf2 ("drm/panel: simple: Add support for Ampire AM-480272H3TMQW-T01H") Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> [narmstrong: fixed Fixes commit id length] Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230516085039.3797303-1-dario.binacchi@amarulasolutions.com
2023-05-26drm/panel: simple: Add Ampire AM-800480L1TMQW-T00HGeert Uytterhoeven
Add support for the Ampire AM-800480L1TMQW-T00H 5" WVGA TFT LCD panel. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/244d9471e0ed248ff2dea8ded3a5384a1c51904b.1684931026.git.geert+renesas@glider.be
2023-05-26dt-bindings: display: panel-simple: Add Ampire AM-800480L1TMQW-T00HGeert Uytterhoeven
Document support for the Ampire AM-800480L1TMQW-T00H 5" WVGA TFT LCD panel. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/422adef8c4941fa56fdadacb3d362a9fb387455e.1684931026.git.geert+renesas@glider.be
2023-05-26dt-bindings: bridge: samsung-dsim: Make some flags optionalAdam Ford
In the event a device is connected to the samsung-dsim controller that doesn't support the burst-clock, the driver is able to get the requested pixel clock from the attached device or bridge. In these instances, the samsung,burst-clock-frequency isn't needed, so remove it from the required list. The pll-clock frequency can be set by the device tree entry for samsung,pll-clock-frequency, but in some cases, the pll-clock may have the same clock rate as sclk_mipi clock. If they are equal, this flag is not needed since the driver will use the sclk_mipi rate as a fallback. Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230526030559.326566-8-aford173@gmail.com
2023-05-26drm: bridge: samsung-dsim: Support non-burst modeAdam Ford
The high-speed clock is hard-coded to the burst-clock frequency specified in the device tree. However, when using devices like certain bridge chips without burst mode and varying resolutions and refresh rates, it may be necessary to set the high-speed clock dynamically based on the desired pixel clock for the connected device. This also removes the need to set a clock speed from the device tree for non-burst mode operation, since the pixel clock rate is the rate requested from the attached device like a bridge chip. This should have no impact for people using burst-mode and setting the burst clock rate is still required for those users. If the burst clock is not present, change the error message to dev_info indicating the clock use the pixel clock. Signed-off-by: Adam Ford <aford173@gmail.com> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # imx8mm-icore Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230526030559.326566-7-aford173@gmail.com
2023-05-26drm: bridge: samsung-dsim: Dynamically configure DPHY timingAdam Ford
The DPHY timings are currently hard coded. Since the input clock can be variable, the phy timings need to be variable too. To facilitate this, we need to cache the hs_clock based on what is generated from the PLL. The phy_mipi_dphy_get_default_config_for_hsclk function configures the DPHY timings in pico-seconds, and a small macro converts those timings into clock cycles based on the hs_clk. Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Tested-by: Michael Walle <michael@walle.cc> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # imx8mm-icore Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230526030559.326566-6-aford173@gmail.com
2023-05-26drm: bridge: samsung-dsim: Select GENERIC_PHY_MIPI_DPHYAdam Ford
In order to support variable DPHY timings, it's necessary to enable GENERIC_PHY_MIPI_DPHY so phy_mipi_dphy_get_default_config can be used to determine the nominal values for a given resolution and refresh rate. Signed-off-by: Adam Ford <aford173@gmail.com> Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230526030559.326566-5-aford173@gmail.com
2023-05-26drm: bridge: samsung-dsim: Fetch pll-clock-frequency automaticallyAdam Ford
Make the pll-clock-frequency optional. If it's present, use it to maintain backwards compatibility with existing hardware. If it is absent, read clock rate of "sclk_mipi" to determine the rate. Since it can be optional, change the message from an error to dev_info. Signed-off-by: Adam Ford <aford173@gmail.com> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # imx8mm-icore Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230526030559.326566-4-aford173@gmail.com
2023-05-26drm: bridge: samsung-dsim: Fix PMS Calculator on imx8m[mnp]Adam Ford
According to Table 13-45 of the i.MX8M Mini Reference Manual, the min and max values for M and the frequency range for the VCO_out calculator were incorrect. This information was contradicted in other parts of the mini, nano and plus manuals. After reaching out to my NXP Rep, when confronting him about discrepencies in the Nano manual, he responded with: "Yes it is definitely wrong, the one that is part of the NOTE in MIPI_DPHY_M_PLLPMS register table against PMS_P, PMS_M and PMS_S is not correct. I will report this to Doc team, the one customer should be take into account is the Table 13-40 DPHY PLL Parameters and the Note above." These updated values also match what is used in the NXP downstream kernel. To fix this, make new variables to hold the min and max values of m and the minimum value of VCO_out, and update the PMS calculator to use these new variables instead of using hard-coded values to keep the backwards compatibility with other parts using this driver. Fixes: 4d562c70c4dc ("drm: bridge: samsung-dsim: Add i.MX8M Mini/Nano support") Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # imx8mm-icore Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230526030559.326566-3-aford173@gmail.com
2023-05-26drm: bridge: samsung-dsim: fix blanking packet size calculationLucas Stach
Scale the blanking packet sizes to match the ratio between HS clock and DPI interface clock. The controller seems to do internal scaling to the number of active lanes, so we don't take those into account. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Adam Ford <aford173@gmail.com> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # imx8mm-icore Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230526030559.326566-2-aford173@gmail.com
2023-05-26drm/amdgpu: Fix no-procfs buildRob Clark
Fixes undefined symbol when PROC_FS is not enabled. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202305251510.U0R2as7k-lkp@intel.com/ Fixes: 376c25f8ca47 ("drm/amdgpu: Switch to fdinfo helper") Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: <alexander.deucher@amd.com> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230525155227.560094-1-robdclark@gmail.com
2023-05-26Merge tag 'drm-misc-next-2023-05-24' of ↵Dave Airlie
git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for v6.5: UAPI Changes: Cross-subsystem Changes: * fbdev: Move framebuffer I/O helpers to <asm/fb.h>, fix naming * firmware: Init sysfb as early as possible Core Changes: * DRM scheduler: Rename interfaces * ttm: Store ttm_device_funcs in .rodata * Replace strlcpy() with strscpy() in various places * Cleanups Driver Changes: * bridge: analogix: Fix endless probe loop; samsung-dsim: Support swapping clock/data polarity; tc358767: Use devm_ Cleanups; * gma500: Fix I/O-memory access * panel: boe-tv101wum-nl6: Improve initialization; sharp-ls043t1le001: Mode fixes; simple: Add BOE EV121WXM-N10-1850 plus DT bindings; AddS6D7AA0 plus DT bindings; Cleanups * ssd1307x: Style fixes * sun4i: Release clocks * msm: Fix I/O-memory access * nouveau: Cleanups * shmobile: Support Renesas; Enable framebuffer console; Various fixes * vkms: Fix RGB565 conversion Signed-off-by: Dave Airlie <airlied@redhat.com> # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCAAdFiEEchf7rIzpz2NEoWjlaA3BHVMLeiMFAmRuBXEACgkQaA3BHVML # eiPLkwgAqCa7IuSDQhFMWVOI0EJpPPEHtHM8SCT1Pp8aniXk23Ru+E16c5zck53O # uf4tB+zoFrwD9npy60LIvX1OZmXS1KI4+ZO8itYFk6GSjxqbTWbjNFREBeWFdIpa # OG54nEqjFQZzEXY+gJYDpu5zqLy3xLN07ZgQkcMyfW3O/Krj4LLzfQTDl+jP5wkO # 7/v5Eu5CG5QjupMxIjb4e+ruUflp73pynur5bhZsfS1bPNGFTnxHlwg7NWnBXU7o # Hg23UYfCuZZWPmuO26EeUDlN33rCoaycmVgtpdZft2eznca5Mg74Loz1Qc3GQfjw # LLvKsAIlBcZvEIhElkzhtXitBoe7LQ== # =/9zV # -----END PGP SIGNATURE----- # gpg: Signature made Wed 24 May 2023 22:39:13 AEST # gpg: using RSA key 7217FBAC8CE9CF6344A168E5680DC11D530B7A23 # gpg: Can't check signature: No public key # Conflicts: # MAINTAINERS From: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20230524124237.GA25416@linux-uq9g
2023-05-25drm/bridge: ti-sn65dsi83: Fix enable/disable flow to meet specFrieder Schrempf
The datasheet describes the following initialization flow including minimum delay times between each step: 1. DSI data lanes need to be in LP-11 and the clock lane in HS mode 2. toggle EN signal 3. initialize registers 4. enable PLL 5. soft reset 6. enable DSI stream 7. check error status register To meet this requirement we need to make sure the host bridge's pre_enable() is called first by using the pre_enable_prev_first flag. Furthermore we need to split enable() into pre_enable() which covers steps 2-5 from above and enable() which covers step 7 and is called after the host bridge's enable(). Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Fixes: ceb515ba29ba ("drm/bridge: ti-sn65dsi83: Add TI SN65DSI83 and SN65DSI84 driver") Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com> #TQMa8MxML/MBa8Mx Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230503163313.2640898-3-frieder@fris.de
2023-05-25drm: bridge: samsung-dsim: Fix i.MX8M enable flow to meet specFrieder Schrempf
According to the documentation [1] the proper enable flow is: 1. Enable DSI link and keep data lanes in LP-11 (stop state) 2. Disable stop state to bring data lanes into HS mode Currently we do this all at once within enable(), which doesn't allow to meet the requirements of some downstream bridges. To fix this we now enable the DSI in pre_enable() and force it into stop state using the FORCE_STOP_STATE bit in the ESCMODE register until enable() is called where we reset the bit. We currently do this only for i.MX8M as Exynos uses a different init flow where samsung_dsim_init() is called from samsung_dsim_host_transfer(). [1] https://docs.kernel.org/gpu/drm-kms-helpers.html#mipi-dsi-bridge-operation Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com> #TQMa8MxML/MBa8Mx Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230503163313.2640898-2-frieder@fris.de
2023-05-25drm/bridge: tc358767: explicitly set readable registersAlexander Stein
This map was created from register map from datasheet (section 5.1.2). Unused registers are stated by address, so they show up in debugfs as well. Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230516071949.375264-1-alexander.stein@ew.tq-group.com
generated by cgit v1.2.3 (git 2.39.1) at 2025-07-31 21:17:36 +0000