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2022-08-17drm/i915/irq: Fix a "the the" typoBo Liu
There is an unexpected word "the" in the file i915_irq.c, fix it. Signed-off-by: Bo Liu <liubo03@inspur.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220816094919.5419-1-liubo03@inspur.com
2022-08-16drm/i915/backlight: split out backlight registers to a separate fileJani Nikula
Declutter i915_reg.h by splitting backlight registers to a separate file. Also include the utility pin definitions, even though they are used for non-backlight things too. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220815094838.3511723-1-jani.nikula@intel.com
2022-08-15drm/i915/tc: Fix PHY ownership programming in HDMI legacy modeImre Deak
Make sure the TypeC PHY ownership flag is not getting reset during an HDMI modeset on the given port. Besides the WARN this triggered, it didn't cause other issues, since for TypeC legacy mode setting the PHY ownership flag is optional (there is no other user of the PHY besides display). Reported-and-tested-by: Shawn C Lee <shawn.c.lee@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220726134313.1484763-1-imre.deak@intel.com
2022-08-15drm/i915/xelpd: Fix unclaimed accesses while loading PIPEDMC-C/DImre Deak
At the moment on DG2 at least loading the DMC firmware's PIPEDMC C and D programs leads to sporadic unclaimed register accesses while programming the initial state as described by the firmware's "MMIO init" table. This will also lead to later unclaimed accesses for unrelated transcoder/pipe registers backed by the pipe C and D display power wells. Disabling the PIPEDMC clock gating during initialization - similarly to Wa_16015201720 fixed this problem in my tests. While pipe A an B requires the clock gating to be disabled all the time pipe C and D requires this only while accessing the PIPEDMC registers. Bspec: 49193 References: https://gitlab.freedesktop.org/drm/intel/-/issues/6526 References: https://gitlab.freedesktop.org/drm/intel/-/issues/6308 Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220808103054.3586074-1-imre.deak@intel.com
2022-08-10drm/i915: Sanitycheck PCI BARsPiotr Piórkowski
For proper operation of i915 we need usable PCI GTTMMADDR BAR 0 (1 for GEN2). In most cases we also need usable PCI GFXMEM BAR 2. Let's add functions to check if BARs are set, and that it have a size greater than 0. In case GTTMMADDR BAR, let's validate at the beginning of i915 initialization. For other BARs, let's validate before first use. Signed-off-by: Piotr Piórkowski <piotr.piorkowski@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220805155959.1983584-3-piotr.piorkowski@intel.com
2022-08-10drm/i915: Use of BARs names instead of numbersPiotr Piórkowski
At the moment, when we refer to some PCI BAR we use the number of this BAR in the code. The meaning of BARs between different platforms may be different. Therefore, in order to organize the code, let's start using defined names instead of numbers. v2: Add lost header in cfg_space.c Signed-off-by: Piotr Piórkowski <piotr.piorkowski@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220805155959.1983584-2-piotr.piorkowski@intel.com
2022-08-10drm/i915/hdcp: replace BIT() with REG_BIT() in register definitionsJani Nikula
Registers contents are supposed to be defined using REG_BIT() to ensure they're u32 and the shift is within bounds. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/d28b9b9fef4f496bdaaad5503dd8e0027f167518.1659607033.git.jani.nikula@intel.com
2022-08-10drm/i915/hdcp: split out hdcp registers to a separate fileJani Nikula
Reduce the bloat of i915_reg.h. The registers are also only needed in a few places, no need to have them defined everywhere. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/ce8334342e8bdf92c17c714aa13574e66cad93bb.1659607033.git.jani.nikula@intel.com
2022-08-04Merge drm/drm-next into drm-intel-nextRodrigo Vivi
Sync up. In special to get the drm-intel-gt-next stuff. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2022-08-03Merge tag 'amd-drm-next-5.20-2022-07-29' of ↵Dave Airlie
https://gitlab.freedesktop.org/agd5f/linux into drm-next amd-drm-next-5.20-2022-07-29: amdgpu: - Misc spelling and grammar fixes - DC whitespace cleanups - ACP smatch fix - GFX 11.0 updates - PSP 13.0 updates - VCN 4.0 updates - DC FP fix for PPC64 - Misc bug fixes amdkfd: - SVM fixes Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220729202742.6636-1-alexander.deucher@amd.com
2022-08-02drm/i915/dg2: Add support for DC5 stateAnusha Srivatsa
With the latest DMC in place, enabling DC5 on DG2. Cc: Imre Deak <imre.deak@intel.com> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220728183641.55692-1-anusha.srivatsa@intel.com
2022-07-29drm/amd/display: Fix a compilation failure on PowerPC caused by FPU codeRodrigo Siqueira
We got a report from Stephen/Michael that the PowerPC build was failing with the following error: ld: drivers/gpu/drm/amd/display/dc/dml/display_mode_lib.o uses hard float, drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.o uses soft float ld: failed to merge target specific data of file drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.o This error happened because of the function optc3_set_vrr_m_const. This function expects a double as a parameter in a code that is not allowed to have FPU operations. After further investigation, it became clear that optc3_set_vrr_m_const was never invoked, so we can safely drop this function and fix the ld issue. Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Melissa Wen <mwen@igalia.com> Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Reported-by: Michael Ellerman <mpe@ellerman.id.au> Tested-by: Michael Ellerman <mpe@ellerman.id.au> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-29drm/amdgpu: enable support for psp 13.0.4 blockXiaojian Du
This patch will enable support for psp 13.0.4 blcok. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Tim Huang <Tim.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-29drm/amdgpu: add files for PSP 13.0.4Xiaojian Du
This patch will add files for PSP 13.0.4. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Tim Huang <Tim.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-29drm/amdgpu: add header files for MP 13.0.4Xiaojian Du
This patch will add header files for MP 13.0.4. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Tim Huang <Tim.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-29drm/amdgpu: correct RLC_RLCS_BOOTLOAD_STATUS offset and indexYifan Zhang
This patch corrects RLC_RLCS_BOOTLOAD_STATUS offset and index for GC 11.0.1. Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com> Reviewed-by: Tim Huang <Tim.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-29drm/amdgpu: send msg to IMU for the front-door loadingXiaojian Du
This patch will make SMU send msg to IMU for the front-door loading, it is required by some ASICs. Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com> Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Tim Huang <Tim.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-29drm/amdkfd: use time_is_before_jiffies(a + b) to replace "jiffies - a > b"Yu Zhe
time_is_before_jiffies deals with timer wrapping correctly. Signed-off-by: Yu Zhe <yuzhe@nfschina.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amdgpu: fix hive reference leak when reflecting psp topology infoJonathan Kim
Hives that require psp topology info to be reflected will leak hive reference so fix it. Signed-off-by: Jonathan Kim <jonathan.kim@amd.com> Reviewed-by: Shaoyun Liu <shaoyun.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amd/pm: enable GFX ULV feature support for SMU13.0.0Evan Quan
The feature is ready with latest firmwares. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amd/pm: update driver if header for SMU 13.0.0Evan Quan
And get the version bumped to 0x2C to match the latest PMFW. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amdgpu: move mes self test after drm sched re-startedJack Xiao
mes self test rely on vm mapping, move it after drm sched re-started so that vm mapping can work during gpu reset. Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Acked-and-tested-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amdgpu: drop non-necessary call trace dumpEvan Quan
This extra call trace dump comes out in every gpu reset. And it gives people a wrong impression that something went wrong. Although actually there was not. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amdgpu: enable VCN cg and JPEG cg/pgSonny Jiang
Not enable VCN pg because encode issue Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amdgpu: vcn_4_0_2 video codec querySonny Jiang
Enable support for vcn_4_0_2 video codec Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amdgpu: add VCN_4_0_2 firmware supportSonny Jiang
Add VCN_4_0_2 firmware support Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amdgpu: add VCN function in NBIO v7.7Sonny Jiang
Add function to support VCN_4_0_2 doorbell Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amdgpu: fix a vcn4 boot poll bug in emulation modeSonny Jiang
The return value should be set in vcn4 boot poll. Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amd/amdgpu: add memory training support for PSP_V13Chengming Gui
Add PSP_V13 memory training support funcs. v2: replace DRM_{DEBUG/ERROR} with dev_{dbg/err}. (Hawking) v3: fix checkpatch error (Alex) Signed-off-by: Chengming Gui <Jack.Gui@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amdkfd: remove an unnecessary amdgpu_bo_refLang Yu
No need to reference the BO here, dmabuf framework will handle that. Signed-off-by: Lang Yu <Lang.Yu@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amd/pm: Add get_gfx_off_status interface for yellow carpShikai Guo
add get_gfx_off_status interface to yellow_carp_ppt_funcs structure. Signed-off-by: Shikai Guo <shikai.guo@amd.com> Reviewed-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Prike Liang <prike.liang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amd/display: Remove unused struct freesync_contextMaíra Canal
All references to struct freesync_context were removed, so remove the struct freesync_context itself and its entry on struct dc_stream_state. Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Maíra Canal <mairacanal@riseup.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amd/amdgpu: add additional page fault settings for gfx11Chengming Gui
Add three additional page fault settings. V2: move reg offset definition to header file. (Alex) V3: add all shift/mask definitions of used reg. (Hawking) Signed-off-by: Chengming Gui <Jack.Gui@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amd/display: remove unneeded semicolonYang Li
Eliminate the following coccicheck warning: ./drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c:2344:67-68: Unneeded semicolon Reported-by: Abaci Robot <abaci@linux.alibaba.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amdgpu: fix i2s_pdata out of bound array accessVijendar Mukunda
Fixed following Smatch static checker warning: drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c:393 acp_hw_init() error: buffer overflow 'i2s_pdata' 3 <= 3 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c:396 acp_hw_init() error: buffer overflow 'i2s_pdata' 3 <= 3 Fixes: 4c33e5179ff1 ("drm/amdgpu: create I2S platform devices for Jadeite platform") Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amdkfd: fix kgd_mem memory leak when importing dmabufLang Yu
The kgd_mem memory allocated in amdgpu_amdkfd_gpuvm_import_dmabuf() is not freed properly. Explicitly free it in amdgpu_amdkfd_gpuvm_free_memory_of_gpu() under condition "mem->bo->kfd_bo != mem". Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Lang Yu <Lang.Yu@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amdgpu: add debugfs for kfd system and ttm mem usedAlex Sierra
This keeps track of kfd system mem used and kfd ttm mem used. Signed-off-by: Alex Sierra <alex.sierra@amd.com> Reviewed-by: Philip Yang <Philip.Yang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amdkfd: track unified memory reservation with xnack offAlex Sierra
[WHY] Unified memory with xnack off should be tracked, as userptr mappings and legacy allocations do. To avoid oversuscribe system memory when xnack off. [How] Exposing functions reserve_mem_limit and unreserve_mem_limit to SVM API and call them on every prange creation and free. Signed-off-by: Alex Sierra <alex.sierra@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amd/display: fix signedness bug in execute_synaptics_rc_command()Dan Carpenter
The "ret" variable needs to be signed for the error handling to work. Fixes: 2ca97adccdc9 ("drm/amd/display: Add Synaptics Fifo Reset Workaround") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amd/display: Clean up some inconsistent indentingJiapeng Chong
No functional modification involved. smatch warnings: drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:1372 dp_dsc_clock_en_read() warn: inconsistent indenting. drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:1478 dp_dsc_clock_en_write() warn: inconsistent indenting. drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:1563 dp_dsc_slice_width_read() warn: inconsistent indenting. drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:1667 dp_dsc_slice_width_write() warn: inconsistent indenting. drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:1752 dp_dsc_slice_height_read() warn: inconsistent indenting. drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:1856 dp_dsc_slice_height_write() warn: inconsistent indenting. drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:1937 dp_dsc_bits_per_pixel_read() warn: inconsistent indenting. drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:2038 dp_dsc_bits_per_pixel_write() warn: inconsistent indenting. drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:2117 dp_dsc_pic_width_read() warn: inconsistent indenting. drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:2178 dp_dsc_pic_height_read() warn: inconsistent indenting. drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:2254 dp_dsc_chunk_size_read() warn: inconsistent indenting. drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:2330 dp_dsc_slice_bpg_offset_read() warn: inconsistent indenting. Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amd/display: Clean up some inconsistent indentingJiapeng Chong
Clean up some inconsistent indenting, replace sizeof(x) / sizeof((x)[0])) with ARRAY_SIZE(x). smatch warnings: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/dcn30_fpu.c:185 optc3_fpu_set_vrr_m_const() warn: inconsistent indenting. drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/dcn30_fpu.c:355 dcn30_fpu_set_mcif_arb_params() warn: inconsistent indenting. drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/dcn30_fpu.c:384 dcn30_fpu_calculate_wm_and_dlg() warn: inconsistent indenting. drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/dcn30_fpu.c:390 dcn30_fpu_calculate_wm_and_dlg() warn: inconsistent indenting. Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amd/display: Clean up some inconsistent indentingJiapeng Chong
No functional modification involved. smatch warnings: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn303/dcn303_fpu.c:205 dcn303_fpu_update_bw_bounding_box() warn: inconsistent indenting. drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn303/dcn303_fpu.c:355 dcn303_fpu_init_soc_bounding_box() warn: inconsistent indenting. Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amd/display: Clean up some inconsistent indentingJiapeng Chong
No functional modification involved. smatch warning: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_util_32.c:713 dml32_CalculateSwathWidth() warn: inconsistent indenting. Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amd/display: Clean up some inconsistent indentingJiapeng Chong
No functional modification involved. smatch warnings: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_rq_dlg_calc_32.c:51 dml32_rq_dlg_get_rq_reg() warn: inconsistent indenting. drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_rq_dlg_calc_32.c:68 dml32_rq_dlg_get_rq_reg() warn: inconsistent indenting. drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_rq_dlg_calc_32.c:220 dml32_rq_dlg_get_dlg_reg() warn: inconsistent indenting. drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_rq_dlg_calc_32.c:224 dml32_rq_dlg_get_dlg_reg() warn: inconsistent indenting. drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_rq_dlg_calc_32.c:235 dml32_rq_dlg_get_dlg_reg() warn: inconsistent indenting. drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_rq_dlg_calc_32.c:240 dml32_rq_dlg_get_dlg_reg() warn: inconsistent indenting. Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amd/display: Clean up some inconsistent indentingJiapeng Chong
No functional modification involved. smatch warning: drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_hwseq.c:1728 dcn20_program_front_end_for_ctx() warn: inconsistent indenting. Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amd/display: Clean up some inconsistent indentingJiapeng Chong
No functional modification involved. smatch warnings: drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp_cm.c:450 dpp20_get_blndgam_current() warn: inconsistent indenting. drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp_cm.c:543 dpp20_get_shaper_current() warn: inconsistent indenting. Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amd/display: Clean up some inconsistent indentingJiapeng Chong
No functional modification involved. smatch warnings: drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_mpc.c:305 mpc20_get_ogam_current() warn: inconsistent indenting. Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amd/display: Clean up some inconsistent indentingJiapeng Chong
No functional modification involved. smatch warning: drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dwb.c:104 dwb2_enable() warn: inconsistent indenting. Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amd/display: Clean up some inconsistent indentingJiapeng Chong
No functional modification involved. smatch warning: drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_optc.c:186 optc3_set_dsc_config() warn: inconsistent indenting. Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amd/display: Clean up some inconsistent indentingJiapeng Chong
No functional modification involved. smatch warnings: drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_mpc.c:116 mpc3_get_ogam_current() warn: inconsistent indenting. drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_mpc.c:445 mpc3_get_shaper_current() warn: inconsistent indenting. Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-07-29 05:51:36 +0000