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2017-10-24usb: phy: tahvo: fix error handling in tahvo_usb_probe()Alexey Khoroshilov
If devm_extcon_dev_allocate() fails, we should disable clk before return. Found by Linux Driver Verification project (linuxtesting.org). Signed-off-by: Alexey Khoroshilov <khoroshilov@ispras.ru> Fixes: 860d2686fda7 ("usb: phy: tahvo: Use devm_extcon_dev_[allocate|register]() and replace deprecated API") Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-10-24usb: gadget: serial: mark expected switch fall-throughGustavo A. R. Silva
In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through. Addresses-Coverity-ID: 1350962 Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-10-24usb: phy: phy-msm-usb: mark expected switch fall-throughGustavo A. R. Silva
In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through. Addresses-Coverity-ID: 1222118 Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-10-24usb: gadget: f_tcm: mark expected switch fall-throughGustavo A. R. Silva
In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through. Addresses-Coverity-ID: 703128 Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-10-24usb: gadget: goku_udc: mark expected switch fall-throughsGustavo A. R. Silva
In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through. Addresses-Coverity-ID: 145713 Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-10-24extcon: max77843: Add support for SmartDock accessoryMarek Szyprowski
SmartDock uses ADC_RESERVED_ACC_3 (0x10) ADC ID type and provides following features: 1. USB host with embedded USB hub (2-4 ports) for mice, keyboard, etc, 2. MHL for video output, 3. charging. Tested with Unitek Y-2165 MHL+OTG Hub Smart Phone Dock. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
2017-10-24extcon: max77843: Add OTG power control to the MUIC driverMarek Szyprowski
Enabling power on VBUS micro-usb pin is required only when passive OTG cable is connected. Initially OTG VBUS power control was planned to be done in charger driver. However such information is not really available from the extcon notifications, so VBUS power control has to be done directly in MUIC driver, which has all information about the attached accessory. For example SmartDock is externally powered accessory, provides OTG (USB HOST) functionality and use VBUS pin for charging a device battery, so the VBUS charging pump should be disabled in such case. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
2017-10-23Merge 4.14-rc6 into usb-nextGreg Kroah-Hartman
We need the USB fixes in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-10-23Linux 4.14-rc6v4.14-rc6Linus Torvalds
2017-10-23Merge tag 'staging-4.14-rc6' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging Pull staging and IIO fixes from Greg KH: "Here are a small number of patches to resolve some reported IIO and a staging driver problem. Nothing major here, full details are in the shortlog below. All have been in linux-next with no reported issues" * tag 'staging-4.14-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: staging: bcm2835-audio: Fix memory corruption iio: adc: at91-sama5d2_adc: fix probe error on missing trigger property iio: adc: dln2-adc: fix build error iio: dummy: events: Add missing break staging: iio: ade7759: fix signed extension bug on shift of a u8 iio: pressure: zpa2326: Remove always-true check which confuses gcc iio: proximity: as3935: noise detection + threshold changes
2017-10-23Merge tag 'char-misc-4.14-rc6' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc driver fixes from Greg KH: "Here are four small fixes for 4.14-rc6. Three of them are binder driver fixes for reported issues, and the last one is a hyperv driver bugfix. Nothing major, but good fixes to get into 4.14-final. All of these have been in linux-next with no reported issues" * tag 'char-misc-4.14-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: android: binder: Fix null ptr dereference in debug msg android: binder: Don't get mm from task vmbus: hvsock: add proper sync for vmbus_hvsock_device_unregister() binder: call poll_wait() unconditionally.
2017-10-23Merge tag 'usb-4.14-rc6' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb Pull USB/PHY fixes from Greg KH: "Here are a small number of USB and PHY driver fixes for 4.14-rc6 There is the usual musb and xhci fixes in here, as well as some needed phy patches. Also is a nasty regression fix for usbfs that has started to hit a lot of people using virtual machines. All of these have been in linux-next with no reported problems" * tag 'usb-4.14-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (26 commits) usb: hub: Allow reset retry for USB2 devices on connect bounce USB: core: fix out-of-bounds access bug in usb_get_bos_descriptor() MAINTAINERS: fix git tree url for musb module usb: quirks: add quirk for WORLDE MINI MIDI keyboard usb: musb: sunxi: Explicitly release USB PHY on exit usb: musb: Check for host-mode using is_host_active() on reset interrupt usb: musb: musb_cppi41: Configure the number of channels for DA8xx usb: musb: musb_cppi41: Fix cppi41_set_dma_mode() for DA8xx usb: musb: musb_cppi41: Fix the address of teardown and autoreq registers USB: musb: fix late external abort on suspend USB: musb: fix session-bit runtime-PM quirk usb: cdc_acm: Add quirk for Elatec TWN3 USB: devio: Revert "USB: devio: Don't corrupt user memory" usb: xhci: Handle error condition in xhci_stop_device() usb: xhci: Reset halted endpoint if trb is noop xhci: Cleanup current_cmd in xhci_cleanup_command_queue() xhci: Identify USB 3.1 capable hosts by their port protocol capability USB: serial: metro-usb: add MS7820 device id phy: rockchip-typec: Check for errors from tcphy_phy_init() phy: rockchip-typec: Don't set the aux voltage swing to 400 mV ...
2017-10-23USB: Force disconnect Huawei 4G modem during suspendDaniel Drake
When going into S3 suspend, the Acer TravelMate P648-M and P648-G3 laptops immediately wake up 3-4 seconds later for no obvious reason. Unbinding the integrated Huawei 4G LTE modem before suspend avoids the issue, even though we are not using the modem at all (checked from rescue.target/runlevel1). The problem also occurs when the option and cdc-ether modem drivers aren't loaded; it reproduces just with the base usb driver. Under Windows the system can suspend fine. Seeking a better fix, we've tried a lot of things, including: - Check that the device's power/wakeup is disabled - Check that remote wakeup is off at the USB level - All the quirks in drivers/usb/core/quirks.c e.g. USB_QUIRK_RESET_RESUME, USB_QUIRK_RESET, USB_QUIRK_IGNORE_REMOTE_WAKEUP, USB_QUIRK_NO_LPM. but none of that makes any difference. There are no errors in the logs showing any suspend/resume-related issues. When the system wakes up due to the modem, log-wise it appears to be a normal resume. Introduce a quirk to disable the port during suspend when the modem is detected. The modem from the P648-G3 model is: T: Bus=01 Lev=01 Prnt=01 Port=08 Cnt=04 Dev#= 5 Spd=480 MxCh= 0 D: Ver= 2.00 Cls=00(>ifc ) Sub=00 Prot=ff MxPS=64 #Cfgs= 3 P: Vendor=12d1 ProdID=15c3 Rev= 1.02 S: Manufacturer=Huawei Technologies Co., Ltd. S: Product=HUAWEI Mobile S: SerialNumber=0123456789ABCDEF C: #Ifs= 5 Cfg#= 1 Atr=a0 MxPwr= 2mA I: If#= 0 Alt= 0 #EPs= 3 Cls=ff(vend.) Sub=06 Prot=10 Driver= E: Ad=82(I) Atr=03(Int.) MxPS= 10 Ivl=32ms E: Ad=81(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms E: Ad=01(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms I: If#= 1 Alt= 0 #EPs= 2 Cls=ff(vend.) Sub=06 Prot=13 Driver= E: Ad=83(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms E: Ad=02(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms I: If#= 2 Alt= 0 #EPs= 2 Cls=ff(vend.) Sub=06 Prot=12 Driver= E: Ad=84(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms E: Ad=03(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms I: If#= 3 Alt= 0 #EPs= 1 Cls=ff(vend.) Sub=06 Prot=16 Driver= E: Ad=86(I) Atr=03(Int.) MxPS= 16 Ivl=2ms I: If#= 3 Alt= 1 #EPs= 3 Cls=ff(vend.) Sub=06 Prot=16 Driver= E: Ad=86(I) Atr=03(Int.) MxPS= 16 Ivl=2ms E: Ad=85(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms E: Ad=04(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms I: If#= 4 Alt= 0 #EPs= 2 Cls=ff(vend.) Sub=06 Prot=1b Driver= E: Ad=87(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms E: Ad=05(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms C:* #Ifs= 6 Cfg#= 2 Atr=a0 MxPwr= 2mA I:* If#= 0 Alt= 0 #EPs= 1 Cls=02(comm.) Sub=06 Prot=00 Driver=cdc_ether E: Ad=82(I) Atr=03(Int.) MxPS= 16 Ivl=2ms I:* If#= 1 Alt= 0 #EPs= 2 Cls=0a(data ) Sub=06 Prot=00 Driver=cdc_ether E: Ad=81(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms E: Ad=01(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms I:* If#= 2 Alt= 0 #EPs= 3 Cls=ff(vend.) Sub=06 Prot=10 Driver=option E: Ad=84(I) Atr=03(Int.) MxPS= 10 Ivl=32ms E: Ad=83(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms E: Ad=02(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms I:* If#= 3 Alt= 0 #EPs= 2 Cls=ff(vend.) Sub=06 Prot=13 Driver=option E: Ad=85(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms E: Ad=03(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms I:* If#= 4 Alt= 0 #EPs= 2 Cls=ff(vend.) Sub=06 Prot=12 Driver=option E: Ad=86(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms E: Ad=04(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms I:* If#= 5 Alt= 0 #EPs= 2 Cls=ff(vend.) Sub=06 Prot=1b Driver=option E: Ad=87(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms E: Ad=05(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms C: #Ifs= 2 Cfg#= 3 Atr=a0 MxPwr= 2mA A: FirstIf#= 0 IfCount= 2 Cls=02(comm.) Sub=0e Prot=00 I: If#= 0 Alt= 0 #EPs= 1 Cls=02(comm.) Sub=0e Prot=00 Driver= E: Ad=82(I) Atr=03(Int.) MxPS= 16 Ivl=2ms I: If#= 1 Alt= 0 #EPs= 0 Cls=0a(data ) Sub=00 Prot=02 Driver= I: If#= 1 Alt= 1 #EPs= 2 Cls=0a(data ) Sub=00 Prot=02 Driver= E: Ad=81(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms E: Ad=01(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms Based on an earlier patch by Chris Chiu. Signed-off-by: Daniel Drake <drake@endlessm.com> Acked-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-10-23usb: misc: usbtest: remove duplicate & operationJaejoong Kim
usb_endpoint_maxp() has an inline keyword and searches for bits[10:0] by & operation with 0x7ff. So, we can remove the duplicate & operation with 0x7ff. Signed-off-by: Jaejoong Kim <climbbb.kim@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-10-23dt-bindings: usb: mtk-xhci: remove dummy clocks and add optional onesChunfeng Yun
Remove dummy clocks for usb wakeup and add optional ones for MCU_BUS_CK and DMA_BUS_CK. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-10-23dt-bindings: usb: mtk-xhci: add a optional property to disable u3portsChunfeng Yun
Add a new optional property to disable u3ports Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-10-23usb: host: modify description for MTK xHCI configChunfeng Yun
Due to all MediaTek SoCs with xHCI host controller use this driver, remove limitation for specific SoCs Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Acked-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-10-23usb: xhci-mtk: add optional mcu and dma bus clocksChunfeng Yun
There are mcu_bus and dma_bus clocks needed to be controlled by driver on some SoCs, so add them as optional ones Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Acked-by: Mathias Nyman <mathias.nyman@linux.intel.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-10-23usb: xhci-mtk: remove dummy wakeup debounce clocksChunfeng Yun
The wakeup debounce clocks for each ports in fact are not needed, so remove them. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Acked-by: Mathias Nyman <mathias.nyman@linux.intel.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-10-23usb: xhci-mtk: support option to disable usb3 portsChunfeng Yun
Add support to disable specific usb3 ports, it's useful when usb3 phy is shared with PCIe or SATA, because we should disable the corresponding usb3 port if the phy is used by PCIe or SATA. Sometimes it's helpful to analyse and solve problems. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Acked-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-10-23usb: xhci-mtk: check clock stability of U3_MACChunfeng Yun
This is useful to find out the root cause when the Super Speed doesn't work. Such as when the T-PHY is switched to PCIe or SATA, and affects Super Speed function, the check will fail. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Acked-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-10-23usb: xhci-mtk: use ports count from xhci in xhci_mtk_sch_init()Chunfeng Yun
Make use of ports count from xhci but not from ippc in xhci_mtk_sch_init() Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Acked-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-10-23usb: xhci-mtk: use dma_set_mask_and_coherent() in probe functionChunfeng Yun
This patch uses the simpler dma_set_mask_and_coherent() instead of doing these as separate steps Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Acked-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-10-23drivers: phy: add calibrate methodAndrzej Pietrasiewicz
Some quirky UDCs (like dwc3 on Exynos) need to have their phys calibrated e.g. for using super speed. This patch adds a new phy_calibrate() method. When the calibration should be used is dependent on actual chip. In case of dwc3 on Exynos the calibration must happen after usb_add_hcd() (while in host mode), because certain phy parameters like Tx LOS levels and boost levels need to be calibrated further post initialization of xHCI controller, to get SuperSpeed operations working. But an hcd must be prepared first in order to pass it to usb_add_hcd(), so, in particular, dwc3 registers must be available first, and in order for the latter to happen the phys must be initialized. This poses a chicken and egg problem if the calibration were to be performed in phy_init(). To break the circular dependency a separate method is added which can be called at a desired moment after phy intialization. Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@samsung.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-10-23ufs/phy: qcom: Refactor to use phy_init callVivek Gautam
Refactor ufs_qcom_power_up_sequence() to get rid of ugly exported phy APIs and use the phy_init() and phy_power_on() to do the phy initialization. Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> Reviewed-by: Subhash Jadavani <subhashj@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-10-23scsi/ufs: qcom: Set phy mode based on the controllers HS MODEVivek Gautam
Set the phy mode based on the UFS HS PA mode. This lets the controller let phy know the mode in which the PHY Adapter is running and set the phy rates accordingly. Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> Reviewed-by: Subhash Jadavani <subhashj@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-10-23phy: qcom-ufs: Add support to set phy modeVivek Gautam
Adding support to set desired UFS phy mode that can be set from the host controller. Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-10-23phy: Add UFS PHY modesVivek Gautam
UFS phy has two modes for each High speed generation. These modes are identified by two rates of operations - Rate A, and Rate B. Add these UFS phy modes to phy framework. Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-10-23dt-bindings: phy: Add PHY_TYPE_UFS definitionVivek Gautam
Add definition for UFS phy type. Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-10-23phy: ti-pipe3: Update pcie phy settingsKishon Vijay Abraham I
Update the PCIe phy settings based on new settings available in AM572x Technical Reference Manual[1] Revision I, revised April 2017 in Table 26-62 "Preferred PCIe_PHY_RX SCP Register Settings". [1] http://www.ti.com/lit/ug/spruhz6i/spruhz6i.pdf Cc: Vignesh R <vigneshr@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> [nsekhar@ti.com: commit message updates] Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-10-23PCI: dra7xx: Create functional dependency between PCIe and PHYKishon Vijay Abraham I
PCI core access configuration space registers in resume_noirq callbacks. In the case of dra7xx, PIPE3 PHY connected to PCIe controller has to be enabled before accessing configuration space registers. Since PIPE3 PHY is enabled by only configuring control module registers, no aborts has been observed so far (though during noirq stage, interface clock of PIPE3 PHY is not enabled). With new TRM updates, PIPE3 PHY has to be initialized (PIPE3 PHY registers has to be accessed) as well which requires the interface clock of PIPE3 PHY to be enabled. The interface clock of PIPE3 PHY is derived from OCP2SCP and hence PCIe PHY is modeled as a child of OCP2SCP. Since pm_runtime is not enabled during noirq stage, pm_runtime_get_sync done in phy_init doesn't enable OCP2SCP clocks resulting in abort when PIPE3 PHY registers are accessed. Create a function dependency between PCIe and PHY here to make sure PCIe is suspended before PCIe PHY/OCP2SCP and resumed after PCIe PHY/OCP2SCP. Suggested-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com>
2017-10-23phy: brcm-sata: Allow RX equalizer tuningFlorian Fainelli
Parse the DT properties brcm,rxaeq-mode and brcm,rxaeq-value to correctly configure the RX equalizer of the PHY. This may be required to resolve specific signal integrity issues. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-10-23phy: brcm-sata: Prepare for doing more tuningFlorian Fainelli
Split the functional code in brcm_stb_sata_init() to a separate function that actually does configure spread spectrum: brcm_stb_sata_ssc_init() and make that function return void, since that function cannot fail. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-10-23dt-bindings: phy: Add RX equalizer properties for Broadcom SATA PHYFlorian Fainelli
Define two new properties: brcm,rx-aeq-mode which allows configuring the SATA PHY RX equalizers and when "manual" is used, brcm,rx-aeq can be used to set the exact value. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-10-23phy: rcar-gen3-usb2: add binding for r8a77995Yoshihiro Shimoda
This patch adds binding for r8a77995 (R-Car D3). Since r8a77995 doesn't have dedicated pins (ID, VBUS), this will match against the generic fallback on R-Car D3. For now, this driver doesn't support usb role swap for r8a77995. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-10-23phy: rcar-gen3-usb2: add SoC-specific parameter for dedicated pinsYoshihiro Shimoda
This patch adds SoC-specific parameter to avoid reading/writing specific registers wrongly if this driver runs on a SoC which doesn't have dedicated pins (e.g. R-Car D3). This patch also changes the value "has_otg" to "has_otg_pins" for slightly easier reading of the code. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-10-23phy: rcar-gen3-usb2: use enum phy_mode in the role_store()Yoshihiro Shimoda
This patch modifies the role_store() to use "enum phy_mode" instead of the local "bool" for host/device mode selection. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-10-23phy: rcar-gen3-usb2: check dr_mode for otg modeYoshihiro Shimoda
The previous code assumed a channel has otg capability if a channel has interrupt property. But, it is not good because: - Battery charging feature also needs interrupt property. - Some R-Car Gen3 SoCs (e.g. R-Car D3) don't have OTG capability. So, this patch checks whether usb 2.0 host node has dr_mode property or not. If it has 'dr_mode = "otg";', this driver enables otg capability. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-10-23phy: rcar-gen2: Add r8a7743/5 supportBiju Das
Add USB PHY support for r8a7743/5 SoC. Renesas RZ/G1[ME] (R8A7743/5) USB PHY is identical to the R-Car Gen2 family. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Acked-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-10-23phy: sun4i-usb: enable PHY0 dual route for V3s SoCIcenowy Zheng
Allwinner V3s SoC also features the dual route of the first USB PHY. Enable it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-10-23phy: rockchip-typec: Do the calibration more correctlyDouglas Anderson
Calculate the calibration code as per the docs. The docs talk about reading and averaging the pullup and pulldown calibration codes. They also talk about adding in some adjustment codes. Let's do what the docs say. In practice this doesn't seem to matter a whole lot. On a device I tested the pullup and pulldown codes were nearly the same (0x23 and 0x24) and the adjustment codes were 0. Reviewed-by: Chris Zhong <zyw@rock-chips.com> Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-10-23phy: rockchip-typec: Avoid magic numbers + add delays in aux calibDouglas Anderson
NOTE: nothing is known to be fixed by this change, but it does enforce some delays that are documented to be necessary. Possibly this could fix some corner cases. The function tcphy_dp_aux_calibration(), like most of the functions in the type C PHY, is mostly undocumented and filled with mysterious, hardcoded numbers. Let's attempt to try to document some of these numbers and clean the function up a little bit. Here's the actual cleanup that happened here: 1. All magic numbers were replaced with bit definitions. 2. For registers that we modify multiple times I now keep track of the value of the register rather than randomly doing a read/modify/write or just hardcoding a new number based on knowing what the old number was. 3. Delay 10 ms (vs 1 ms) after writing the calibration code. No idea if this is important but it matches the example in the docs. 4. Whenever setting a "delayed" version of a signal always put an explicit delay in the code. No known problems were seen without this delay but it seems wise to have it. Whenever a delay of "at least 100 ns" was specified I used a delay of 1 us. 5. Added comments to some of the bits of code. 6. Removed duplicate setting of TX_ANA_CTRL_REG_5 (to 0) 7. Moved setting of TX_ANA_CTRL_REG_3 to the same place it was in the sample code. Note that TX_ANA_CTRL_REG_3 ought to be initted to 0 (and elsewhere we assume that we just got a reset), but it seems fine to be explicit. 8. Treats the calibration code as a 7-bit two's complement number. This isn't strictly required, but seems slightly cleaner. The docs say "treat this as a two's complement number, but it should never be negative". If we ever read the "adjustment" codes as documented then perhaps the two's complement bit will matter more. There are still a few weird / mysterious things around aux init and this doesn't attempt to fix all of them. Mostly it's aimed at doing changes that should be _very_ safe and add a lot of clarity. Things specifically not done: A) Resolve the fact that some registers are read/modify/write and others are explicitly initted to a value. We always call tcphy_dp_aux_calibration() right after resetting the PHY so it's probably not critical, but it's a little weird that the code is inconsistent. B) Fully resolve the documented init sequence with the current one. We still have a few mystery steps and we also leave out turning on TXDA_DRV_LDO_BG_FB_EN and TXDA_DRV_LDO_BG_REF_EN, which is in the sample code. C) Clean things up to read all the bits of the calibration code. This will hopefully come in a followup change. This also doesn't attempt to document any of the other parts of the PHY--just the aux init which is all I got docs for. Reviewed-by: Chris Zhong <zyw@rock-chips.com> Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-10-23phy: Return NULL if the phy is optionalMaxime Ripard
If we're trying to get a handle to an optional phy, then the phy framework being disabled shouldn't return an hard error. Instead, return NULL just like phy_optional_get does when there's no phy provided in the DT. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-10-23phy: phy-mtk-tphy: add set_mode callbackChunfeng Yun
This is used to force PHY with USB OTG function to enter a specific mode, and override OTG IDPIN(or IDDIG) signal. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-10-23phy: mvebu-cp110-comphy: remove unused member in private structAntoine Tenart
The 'modes' member of the mvebu_comphy_priv structure is not used. Remove it. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-10-23extcon: max14577: Delete an unnecessary variable initialisation in ↵Markus Elfring
max14577_muic_set_path() The variable "ret" is immediately reassigned by a following statement. Thus omit the explicit initialisation at the beginning. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
2017-10-23extcon: make extcon_info static const, fixes warningColin Ian King
The array extcon_info is read only, local to the source and does not need to be in global scope, so make it static const. Cleans up sparse warning: symbol 'extcon_info' was not declared. Should it be static? Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
2017-10-23extcon: Split out extcon header file for consumer and provider deviceChanwoo Choi
The extcon has two type of extcon devices as following. - 'extcon provider deivce' adds new extcon device and detect the state/properties of external connector. Also, it notifies the state/properties to the extcon consumer device. - 'extcon consumer device' gets the change state/properties from extcon provider device. Prior to that, include/linux/extcon.h contains all exported API for both provider and consumer device driver. To clarify the meaning of header file and to remove the wrong use-case on consumer device, this patch separates into extcon.h and extcon-provider.h. [Description for include/linux/{extcon.h|extcon-provider.h}] - extcon.h includes the extcon API and data structure for extcon consumer device driver. This header file contains the following APIs: : Register/unregister the notifier to catch the change of extcon device : Get the extcon device instance : Get the extcon device name : Get the state of each external connector : Get the property value of each external connector : Get the property capability of each external connector - extcon-provider.h includes the extcon API and data structure for extcon provider device driver. This header file contains the following APIs: : Include 'include/linux/extcon.h' : Allocate the memory for extcon device instance : Register/unregister extcon device : Set the state of each external connector : Set the property value of each external connector : Set the property capability of each external connector Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk> Acked-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Felipe Balbi <felipe.balbi@linux.intel.com> Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-10-22Merge branch 'for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input Pull input fix from Dmitry Torokhov: "A fix for a broken commit in the previous pull breaking automatic module loading of input handlers, such ad evdev" * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input: Input: do not use property bits when generating module alias
2017-10-22Input: do not use property bits when generating module aliasDmitry Torokhov
The commit 8724ecb07229 ("Input: allow matching device IDs on property bits") started using property bits when generating module aliases for input handlers, but did not adjust the generation of MODALIAS attribute on input device uevents, breaking automatic module loading. Given that no handler currently uses property bits in their module tables, let's revert this part of the commit for now. Reported-by: Damien Wyart <damien.wyart@gmail.com> Tested-by: Damien Wyart <damien.wyart@gmail.com> Fixes: 8724ecb07229 ("Input: allow matching device IDs on property bits") Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
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