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2023-12-02arm64: dts: qcom: sa8775p: Make watchdog bark interrupt edge triggeredDouglas Anderson
As described in the patch ("arm64: dts: qcom: sc7180: Make watchdog bark interrupt edge triggered"), the Qualcomm watchdog timer's bark interrupt should be configured as edge triggered. Make the change. Fixes: 09b701b89a76 ("arm64: dts: qcom: sa8775p: add the watchdog node") Reviewed-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/r/20231106144335.v2.6.I909b7c4453d7b7fb0db4b6e49aa21666279d827d@changeid Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: sm8250: Make watchdog bark interrupt edge triggeredDouglas Anderson
As described in the patch ("arm64: dts: qcom: sc7180: Make watchdog bark interrupt edge triggered"), the Qualcomm watchdog timer's bark interrupt should be configured as edge triggered. Make the change. Fixes: 46a4359f9156 ("arm64: dts: qcom: sm8250: Add watchdog bark interrupt") Reviewed-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20231106144335.v2.5.I2910e7c10493d896841e9785c1817df9b9a58701@changeid Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: sm8150: Make watchdog bark interrupt edge triggeredDouglas Anderson
As described in the patch ("arm64: dts: qcom: sc7180: Make watchdog bark interrupt edge triggered"), the Qualcomm watchdog timer's bark interrupt should be configured as edge triggered. Make the change. Fixes: b094c8f8dd2a ("arm64: dts: qcom: sm8150: Add watchdog bark interrupt") Reviewed-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20231106144335.v2.4.I23d0aa6c8f1fec5c26ad9b3c610df6f4c5392850@changeid Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: sdm845: Make watchdog bark interrupt edge triggeredDouglas Anderson
As described in the patch ("arm64: dts: qcom: sc7180: Make watchdog bark interrupt edge triggered"), the Qualcomm watchdog timer's bark interrupt should be configured as edge triggered. Make the change. Fixes: 36c436b03c58 ("arm64: dts: qcom: sdm845: Add watchdog bark interrupt") Reviewed-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20231106144335.v2.3.I16675ebe5517c68453a1bd7f4334ff885f806c03@changeid Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: sc7280: Make watchdog bark interrupt edge triggeredDouglas Anderson
As described in the patch ("arm64: dts: qcom: sc7180: Make watchdog bark interrupt edge triggered"), the Qualcomm watchdog timer's bark interrupt should be configured as edge triggered. Make the change. Fixes: 0e51f883daa9 ("arm64: dts: qcom: sc7280: Add APSS watchdog node") Reviewed-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20231106144335.v2.2.I11f77956d2492c88aca0ef5462123f225caf4fb4@changeid Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: sc7180: Make watchdog bark interrupt edge triggeredDouglas Anderson
On sc7180 when the watchdog timer fires your logs get filled with: watchdog0: pretimeout event watchdog0: pretimeout event watchdog0: pretimeout event ... watchdog0: pretimeout event If you're using console-ramoops to debug crashes the above gets quite annoying since it blows away any other log messages that might have been there. The issue is that the "bark" interrupt (AKA the "pretimeout" interrupt) remains high until the watchdog is pet. Since we've got things configured as "level" triggered we'll keep getting interrupted over and over. Let's switch to edge triggered. Now we'll get one interrupt when the "bark" interrupt goes off and won't get another one until the "bark" interrupt is cleared and asserts again. This matches how many older Qualcomm SoCs have things configured. Fixes: 28cc13e4060c ("arm64: dts: qcom: sc7180: Add watchdog bark interrupt") Reviewed-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20231106144335.v2.1.Ic7577567baff921347d423b722de8b857602efb1@changeid Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: sc8180x: drop duplicated PCI iommus propertyKrzysztof Kozlowski
The IOMMUs for PCI controller on SC8180x are defined in iommu-map, so drop duplicared iommus: sc8180x-lenovo-flex-5g.dtb: pci@1c08000: Unevaluated properties are not allowed ('iommus' was unexpected) Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231112184430.3495-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02dt-bindings: arm: qcom: Add HTC One Mini 2Luca Weiss
Document the compatible for the MSM8926-based HTC One Mini 2 smartphone. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Link: https://lore.kernel.org/r/20231125-htc-memul-v3-2-e8f4c5839e23@z3ntu.xyz Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02dt-bindings: vendor-prefixes: document HTC CorporationLuca Weiss
Add the vendor prefix for HTC (https://www.htc.com/). Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Link: https://lore.kernel.org/r/20231125-htc-memul-v3-1-e8f4c5839e23@z3ntu.xyz Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: sm8550: correct TX Soundwire clockKrzysztof Kozlowski
The TX Soundwire controller should take clock from TX macro codec, not VA macro codec clock, otherwise the clock stays disabled. This looks like a copy-paste issue, because the SC8280xp code uses here correctly clock from TX macro. The VA macro clock is already consumed by TX macro codec, thus it won't be disabled by this change. Fixes: 61b006389bb7 ("arm64: dts: qcom: sm8550: add Soundwire controllers") Reported-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231129140537.161720-2-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: sm8450: correct TX Soundwire clockKrzysztof Kozlowski
The TX Soundwire controller should take clock from TX macro codec, not VA macro codec clock, otherwise the clock stays disabled. This looks like a copy-paste issue, because the SC8280xp code uses here correctly clock from TX macro. The VA macro clock is already consumed by TX macro codec, thus it won't be disabled by this change. Fixes: 14341e76dbc7 ("arm64: dts: qcom: sm8450: add Soundwire and LPASS") Reported-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231129140537.161720-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: sc8180x-primus: Fix HALL_INT polarityBjorn Andersson
The hall sensor interrupt on the Primus is active low, which means that with the current configuration the device attempts to suspend when the LID is open. Fix the polarity of the HALL_INT GPIO to avoid this. Fixes: 2ce38cc1e8fe ("arm64: dts: qcom: sc8180x: Introduce Primus") Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231130-sc8180x-primus-lid-polarity-v1-1-da917b59604b@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: sc8280xp-crd: fix eDP phy compatibleJohan Hovold
The sc8280xp Display Port PHYs can be used in either DP or eDP mode and this is configured using the devicetree compatible string which defaults to DP mode in the SoC dtsi. Override the default compatible string for the CRD eDP PHY node so that the eDP settings are used. Fixes: 4a883a8d80b5 ("arm64: dts: qcom: sc8280xp-crd: Enable EDP") Cc: stable@vger.kernel.org # 6.3 Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20231016080658.6667-1-johan+linaro@kernel.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: sdm632-fairphone-fp3: Enable LPASSLuca Weiss
Enable the LPASS/ADSP found on the phone. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Link: https://lore.kernel.org/r/20231015-fp3-lpass-v1-1-4d46a399a035@z3ntu.xyz Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: msm8916-acer-a1-724: Add notification LEDRaymond Hackley
Acer Iconia Talk S A1-724 uses KTD2026 LED driver. However, there is no blue LED on it. Add it to the device tree. Signed-off-by: Raymond Hackley <raymondhackley@protonmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231017125848.84311-1-raymondhackley@protonmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: ipq6018: use CPUFreq NVMEMRobert Marko
IPQ6018 comes in multiple SKU-s and some of them dont support all of the OPP-s that are current set, so lets utilize CPUFreq NVMEM to allow only supported OPP-s based on the SoC dynamically. As an example, IPQ6018 is generaly rated at 1.8GHz but some silicon only goes up to 1.5GHz and is marked as such via an eFuse. Signed-off-by: Robert Marko <robimarko@gmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231021120048.231239-1-robimarko@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: msm8939-huawei-kiwi: Add initial device treeLukas Walter
This dts adds support for Huawei Honor 5X / GR5 (2016) smartphone released in 2015. Add device tree with initial support for: - GPIO keys - Hall sensor - SDHCI (internal and external storage) - WCNSS (BT/WIFI) - Sensors (accelerometer and proximity) - Vibrator - Touchscreen Signed-off-by: Raymond Hackley <raymondhackley@protonmail.com> Signed-off-by: Lukas Walter <lukas.walter@aceart.de> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231021143025.77088-2-lukas.walter@aceart.de Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02dt-bindings: arm: qcom: Add Huawei Honor 5X / GR5 (2016)Lukas Walter
Add a compatible for Huawei Honor 5X / GR5 (2016). Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Lukas Walter <lukas.walter@aceart.de> Link: https://lore.kernel.org/r/20231021143025.77088-1-lukas.walter@aceart.de Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: msm8953: Use non-deprecated qcom,domain in LPASSLuca Weiss
Use the qcom,domain property instead of the deprecated qcom,apr-domain, which in turn also fixes a bunch of dtbs_checks warnings. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Link: https://lore.kernel.org/r/20231125-msm8953-misc-fixes-v2-2-df86655841d9@z3ntu.xyz Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: qrb2210-rb1: add wifi variant propertyDmitry Baryshkov
The RB1 platform doesn't have board-specific board-id programmed, it uses generic 0xff. Thus add the property with the 'variant' of the calibration data. Note: the driver will check for the calibration data for the following IDs, so existing board-2.bin files will continue to work. - 'bus=snoc,qmi-board-id=ff,qmi-chip-id=120,variant=Thundercomm_RB1' - 'bus=snoc,qmi-board-id=ff,qmi-chip-id=120' - 'bus=snoc,qmi-board-id=ff' For the reference, the board is identified by the driver in the following way: ath10k_snoc c800000.wifi: qmi chip_id 0x120 chip_family 0x4007 board_id 0xff soc_id 0x40670000 ath10k_snoc c800000.wifi: qmi fw_version 0x337302d3 fw_build_timestamp 2023-01-06 01:50 fw_build_id QC_IMAGE_VERSION_STRING=WLAN.HL.3.3.7.c2-00723-QCAHLSWMTPLZ-1 ath10k_snoc c800000.wifi: wcn3990 hw1.0 target 0x00000008 chip_id 0x00000000 sub 0000:0000 ath10k_snoc c800000.wifi: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0 ath10k_snoc c800000.wifi: firmware ver api 5 features wowlan,mgmt-tx-by-reference,non-bmi crc32 b3d4b790 ath10k_snoc c800000.wifi: htt-ver 3.114 wmi-op 4 htt-op 3 cal file max-sta 32 raw 0 hwcrypto 1 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231125-topic-rb1_feat-v3-12-4cbb567743bb@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: qrb2210-rb1: Enable CAN bus controllerKonrad Dybcio
Enable the Microchip mcp2518fd hosted on the SPI5 bus. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231125-topic-rb1_feat-v3-11-4cbb567743bb@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: qrb2210-rb1: Set up HDMIKonrad Dybcio
Add the required nodes to support display output via the HDMI port. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231125-topic-rb1_feat-v3-10-4cbb567743bb@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: qcm2290: Hook up interconnectsKonrad Dybcio
Add interconnect provider nodes and hook up interconnects to consumer devices, including bwmon. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231125-topic-rb1_feat-v3-9-4cbb567743bb@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: qcm2290: Add display nodesKonrad Dybcio
Add the required nodes to support display on QCM2290. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231125-topic-rb1_feat-v3-8-4cbb567743bb@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: sc7280: Add the missing MDSS icc pathKonrad Dybcio
MDSS, aside from the MDP-MEM path, also requires the CPU-DISP_CFG one. Failing to provide it may result in register accesses failing and that's never good. Add the missing path. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231125-topic-rb1_feat-v3-7-4cbb567743bb@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: sc7180: Add the missing MDSS icc pathKonrad Dybcio
MDSS, aside from the MDP-MEM path, also requires the CPU-DISP_CFG one. Failing to provide it may result in register accesses failing and that's never good. Add the missing path. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231125-topic-rb1_feat-v3-6-4cbb567743bb@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: sc8280xp: Add QMP handle to RPMh statsKonrad Dybcio
When a handle to QMP is accessible, we can query even more internal power management stats. Add it. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231130-topic-ddr_sleep_stats-v1-3-5981c2e764b6@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: sm8250-xiaomi-elish: Add pm8150b type-c node and enable ↵Jianhua Lu
usb otg Add type-c node to feature otg function and set usb-role-switch property for usb_1_dwc3 to enable usb otg. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Jianhua Lu <lujianhua000@gmail.com> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lore.kernel.org/r/20231126022849.14273-2-lujianhua000@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: sm8250-xiaomi-elish: Fix typosJianhua Lu
There are two typos in this dtsi, so fix it. classis -> chassis. 80700000 -> 80600000 Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Jianhua Lu <lujianhua000@gmail.com> Link: https://lore.kernel.org/r/20231126022849.14273-1-lujianhua000@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: msm8939-longcheer-l9100: Add proximity-near-levelAndré Apitzsch
Consider an object near to the sensor when their distance is about 4 cm or below. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: André Apitzsch <git@apitzsch.eu> Link: https://lore.kernel.org/r/20231126-bqm5_prox-v2-1-b7defc3979ac@apitzsch.eu Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: qrb4210-rb2: Enable bluetoothKonrad Dybcio
Enable the QCA bluetooth on RB2. It identifies like the following: Bluetooth: hci0: QCA Product ID :0x0000000a Bluetooth: hci0: QCA SOC Version :0x40020150 Bluetooth: hci0: QCA ROM Version :0x00000201 Bluetooth: hci0: QCA Patch Version:0x00000001 Bluetooth: hci0: QCA controller version 0x01500201 Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231120-topic-rb2_bt-v2-2-4bbf266258ef@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: sm6115: Add UART3Konrad Dybcio
Hook up UART3, usually used for communicating with a Bluetooth module. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231120-topic-rb2_bt-v2-1-4bbf266258ef@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: sdm632-fairphone-fp3: Enable WiFi/BluetoothLuca Weiss
Configure and enable the WCNSS which provides WiFi and Bluetooth on this device using the WCN3680B chip. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Link: https://lore.kernel.org/r/20231127-fp3-wcnss-v2-1-a5154fae4768@z3ntu.xyz Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02dt-bindings: arm: qcom: Fix html linkStephen Boyd
This link got broken by commit e790a4ce5290 ("arm: docs: Move Arm documentation to Documentation/arch/") when the doc moved from arm/ to arch/arm/. Fix the link so that it can continue to be followed. Fixes: e790a4ce5290 ("arm: docs: Move Arm documentation to Documentation/arch/") Cc: Alexandre TORGUE <alexandre.torgue@foss.st.com> Cc: Yanteng Si <siyanteng@loongson.cn> Cc: Jonathan Corbet <corbet@lwn.net> Reviewed-by: Douglas Anderson <dianders@chromium.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20231129030443.2753833-1-swboyd@chromium.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: Add base qcs6490-rb3gen2 board dtsKomal Bajaj
Add DTS for Qualcomm qcs6490-rb3gen2 board which uses QCS6490 SoC. This adds debug uart and usb support along with regulators found on this board. Co-developed-by: Naina Mehta <quic_nainmeht@quicinc.com> Signed-off-by: Naina Mehta <quic_nainmeht@quicinc.com> Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> Link: https://lore.kernel.org/r/20231129065816.26409-4-quic_kbajaj@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: Add base qcm6490 idp board dtsKomal Bajaj
Add DTS for Qualcomm IDP platform using QCM6490 SoC. This adds debug uart, eMMC and usb support along with regulators found on this board. Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> Link: https://lore.kernel.org/r/20231129065816.26409-3-quic_kbajaj@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02dt-bindings: arm: qcom: Add QCM6490 IDP and QCS6490 RB3Gen2 boardKomal Bajaj
Document the qcom,qcm6490-idp and qcs6490-rb3gen2 boards. qcm6490-idp based off qcm6490 SoC derived from sc7280 meant for various form factor including IoT and qcs6490-rb3gen2 based off qcs6490 SoC derivative of qcm6490 without internal modem. Co-developed by: Naina Mehta <quic_nainmeht@quicinc.com> Signed-off by: Naina Mehta <quic_nainmeht@quicinc.com> Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231129065816.26409-2-quic_kbajaj@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: sm4450-qrd: mark QRD4450 reserved gpiosTengfei Fan
Some gpios are reserved for other subsystems, so mark these reserved gpios. Suggested-by: Can Guo <quic_cang@quicinc.com> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231129103325.24854-6-quic_tengfan@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: sm4450-qrd: add QRD4450 uart supportTengfei Fan
Add uart support for QRD4450 for enable uart console. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> Link: https://lore.kernel.org/r/20231129103325.24854-5-quic_tengfan@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: sm4450: add uart console supportTengfei Fan
Add base description of UART and TLMM nodes which helps SM4450 boot to shell with console on boards with this SoC. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> Link: https://lore.kernel.org/r/20231129103325.24854-4-quic_tengfan@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: sm4450: Add RPMH and Global clockTengfei Fan
Add device node for RPMH and Global clock controller on Qualcomm SM4450 platform. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> Link: https://lore.kernel.org/r/20231129103325.24854-3-quic_tengfan@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: sm4450: Add apps_rsc and cmd_db nodeAjit Pandey
Add apps_rsc node and cmd_db memory region for sm4450. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> Link: https://lore.kernel.org/r/20231129103325.24854-2-quic_tengfan@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: ipq8074: pass QMP PCI PHY PIPE clocks to GCCRobert Marko
Pass QMP PCI PHY PIPE clocks to the GCC controller so it does not have to find them by matching globaly by name. If not passed directly, driver maintains backwards compatibility by then falling back to global lookup. Signed-off-by: Robert Marko <robimarko@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20231013164025.3541606-2-robimarko@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02dt-bindings: clocks: qcom,gcc-ipq8074: allow QMP PCI PHY PIPE clocksRobert Marko
QMP PCI PHY PIPE clocks are inputs for the GCC clock controller. In order to describe this in DTS, allow passing them as the inputs to GCC. This has a benefit that it avoids doing a global matching by name. Signed-off-by: Robert Marko <robimarko@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231013164025.3541606-1-robimarko@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: msm8953: add SPI interfacesGianluca Boiano
This change add spi_3, spi_5 and spi_6 interfaces to MSM8953 devices. Signed-off-by: Gianluca Boiano <morf3089@gmail.com> Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231013110531.84140-1-morf3089@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: qcm6490-fairphone-fp5: Add PM7325 thermalsLuca Weiss
Configure the thermals for the QUIET_THERM, CAM_FLASH_THERM, MSM_THERM and RFC_CAM_THERM thermistors connected to PM7325. With this PMIC the software communication to the ADC is going through PMK7325 (= PMK8350). Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20231013-fp5-thermals-v1-4-f14df01922e6@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: qcm6490-fairphone-fp5: Add PMK7325 thermalsLuca Weiss
Configure the thermals for the XO_THERM line connected to PMK7325 (named in software PMK8350). Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20231013-fp5-thermals-v1-3-f14df01922e6@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: qcm6490-fairphone-fp5: Add PM7250B thermalsLuca Weiss
Configure the thermals for the CHARGER_SKIN_THERM and USB_CONN_THERM thermistors connected to PM7250B. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20231013-fp5-thermals-v1-2-f14df01922e6@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02iio: adc: Add PM7325 PMIC7 ADC bindingsLuca Weiss
Add the defines for the ADC channels found on the PM7325. The list is taken from downstream msm-5.4 and adjusted for mainline. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/20231013-fp5-thermals-v1-1-f14df01922e6@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02arm64: dts: qcom: sm8250: Add OPP table support to UFSHCManivannan Sadhasivam
UFS host controller, when scaling gears, should choose appropriate performance state of RPMh power domain controller along with clock frequency. So let's add the OPP table support to specify both clock frequency and RPMh performance states replacing the old "freq-table-hz" property. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20231012172129.65172-6-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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