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2022-09-10drm/udl: Add reset_resumeThomas Zimmermann
Implement the reset_resume callback of struct usb_driver. Set the standard channel when called. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Takashi Iwai <tiwai@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20220908095115.23396-3-tiwai@suse.de
2022-09-10drm/udl: Restore display mode on resumeTakashi Iwai
Restore the display mode whne resuming from suspend. Currently, the display remains dark. On resume, the CRTC's mode does not change, but the 'active' flag changes to 'true'. Taking this into account when considering a mode switch restores the display mode. The bug is reproducable by using Gnome with udl and observing the adapter's suspend/resume behavior. Actually, the whole check added in udl_simple_display_pipe_enable() about the crtc_state->mode_changed was bogus. We should drop the whole check and always apply the mode change in this function. [ tiwai -- Drop the mode_changed check entirely instead, per Daniel's suggestion ] Fixes: 997d33c35618 ("drm/udl: Inline DPMS code into CRTC enable and disable functions") Cc: <stable@vger.kernel.org> Suggested-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20220908095115.23396-2-tiwai@suse.de
2022-09-09drm/format: Split into more granular test casesMichał Winiarski
While we have multiple test cases, most of them check multiple conditions, calling the function that is tested multiple times with different arguments (with comments that indicate test case boundary). This usually means that it can be easily converted into multiple test cases. Passing output: ============================================================ ================= drm_format (18 subtests) ================= [PASSED] drm_format_block_width_invalid [PASSED] drm_format_block_width_one_plane [PASSED] drm_format_block_width_two_plane [PASSED] drm_format_block_width_three_plane [PASSED] drm_format_block_width_tiled [PASSED] drm_format_block_height_invalid [PASSED] drm_format_block_height_one_plane [PASSED] drm_format_block_height_two_plane [PASSED] drm_format_block_height_three_plane [PASSED] drm_format_block_height_tiled [PASSED] drm_format_min_pitch_invalid [PASSED] drm_format_min_pitch_one_plane_8bpp [PASSED] drm_format_min_pitch_one_plane_16bpp [PASSED] drm_format_min_pitch_one_plane_24bpp [PASSED] drm_format_min_pitch_one_plane_32bpp [PASSED] drm_format_min_pitch_two_plane [PASSED] drm_format_min_pitch_three_plane_8bpp [PASSED] drm_format_min_pitch_tiled =================== [PASSED] drm_format ==================== ============================================================ Testing complete. Ran 18 tests: passed: 18 Signed-off-by: Michał Winiarski <michal.winiarski@intel.com> Reviewed-by: Maíra Canal <mairacanal@riseup.net> Signed-off-by: Maíra Canal <mairacanal@riseup.net> Link: https://patchwork.freedesktop.org/patch/msgid/20220831215608.349269-2-michal.winiarski@intel.com
2022-09-09drm/format: Use appropriate types in expect/assertMichał Winiarski
drm_format_info_* functions don't return bool, and the info variable is a pointer. Expecting non-NULL info will cause the test to crash if it is NULL in checks that follow (which dereference it). Use appropriate KUNIT_EXPECT/KUNIT_ASSERT variants. Signed-off-by: Michał Winiarski <michal.winiarski@intel.com> Reviewed-by: Maíra Canal <mairacanal@riseup.net> Signed-off-by: Maíra Canal <mairacanal@riseup.net> Link: https://patchwork.freedesktop.org/patch/msgid/20220831215608.349269-1-michal.winiarski@intel.com
2022-09-09drm/rockchip: dsi: add rk3568 supportChris Morgan
Add the compatible and GRF definitions for the RK3568 soc. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://patchwork.freedesktop.org/patch/msgid/20220906174823.28561-4-macroalpha82@gmail.com
2022-09-09dt-bindings: display: rockchip-dsi: add rk3568 compatibleChris Morgan
The rk3568 uses the same dw-mipi-dsi controller as previous Rockchip SOCs, so add a compatible string for it. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://patchwork.freedesktop.org/patch/msgid/20220906174823.28561-2-macroalpha82@gmail.com
2022-09-09drm/rockchip: vop: fix repeated words in commentwangjianli
Delete the redundant word 'in'. Signed-off-by: wangjianli <wangjianli@cdjrlc.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://patchwork.freedesktop.org/patch/msgid/20220908123616.19195-1-wangjianli@cdjrlc.com
2022-09-09drm/i915: Use REG_FIELD_GET() to extract skl+ wm latenciesVille Syrjälä
Replace the hand rolled stuff with REG_FIELD_GET() for reading out the skl+ watermark latencies. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220908191646.20239-4-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-09-09drm/i915: Extract skl_watermark.cVille Syrjälä
Pull all the skl+ watermark code (and the dbuf/sagv/ipc code since it's all sort of intertwined and I'm too lazy to think of a finer grained split right now) into its own file from the catch-all intel_pm.c. Also sneak in the s/dev_priv/i915/ rename while at it. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220908191646.20239-3-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-09-09drm/i915: Split intel_read_wm_latency() into per-platform versionsVille Syrjälä
No reaon to have this humongous if ladder in intel_read_wm_latency(). Just split it into nicer per-platforms functions. Also do the s/dev_priv/i915/ while touching all of this code. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220908191646.20239-2-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-09-09drm/tidss: fix repeated words in commentsJilin Yuan
Delete the redundant word 'to'. Signed-off-by: Jilin Yuan <yuanjilin@cdjrlc.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220824130450.41703-1-yuanjilin@cdjrlc.com
2022-09-09drm/omap: dmm_tiler:Remove the print function dev_err()ye xingchen
From the coccinelle check: ./drivers/gpu/drm/omapdrm/omap_dmm_tiler.c Error:line 817 is redundant because platform_get_irq() already prints an error So,remove the unnecessary print function dev_err() Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: ye xingchen <ye.xingchen@zte.com.cn> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220810062738.13554-1-ye.xingchen@zte.com.cn
2022-09-09drm/omap: dss: Fix refcount leak bugsLiang He
In dss_init_ports() and __dss_uninit_ports(), we should call of_node_put() for the reference returned by of_graph_get_port_by_id() in fail path or when it is not used anymore. Fixes: 09bffa6e5192 ("drm: omap: use common OF graph helpers") Signed-off-by: Liang He <windhl@126.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220722144348.1306569-1-windhl@126.com
2022-09-09drm: omapdrm: dss: replace ternary operator with max()Guo Zhengkui
Fix the following coccicheck warning: drivers/gpu/drm/omapdrm/dss/dispc.c:2454:21-22: WARNING opportunity for max() Signed-off-by: Guo Zhengkui <guozhengkui@vivo.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220517050208.121488-1-guozhengkui@vivo.com
2022-09-09drm/sun4i: tv: Include drm_atomic.hMaxime Ripard
Commit ec491291dc94 ("drm/sun4i: tv: Merge mode_set into atomic_enable") has introduced a call to drm_atomic_get_new_crtc_state(), but didn't include drm_atomic.h. On CONFIG_OF systems, this is fine because drm_atomic.h is included by drm_of.h through drm_bridge.h. However, whenever CONFIG_OF isn't set, we end up with a compilation error. Fixes: ec491291dc94 ("drm/sun4i: tv: Merge mode_set into atomic_enable") Reported-by: kernel test robot <lkp@intel.com> Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://patchwork.freedesktop.org/patch/msgid/20220909093116.4141982-1-maxime@cerno.tech
2022-09-09drm/i915/dsb: hide struct intel_dsb betterJani Nikula
struct intel_dsb can be an opaque type, hidden in intel_dsb.c. Make it so. Reduce related includes while at it. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220908165702.973854-1-jani.nikula@intel.com
2022-09-08drm/dp_mst: Avoid deleting payloads for connectors staying enabledImre Deak
When an MST connector stays enabled during a commit the connector's MST state needs to be added to the atomic state, but the corresponding MST payload allocation shouldn't be set for deletion; fix such modesets by ensuring the above even if the connector was already enabled before the modeset. The issue led to the following: [ 761.992923] i915 0000:00:02.0: drm_WARN_ON(payload->delete) [ 761.992949] WARNING: CPU: 6 PID: 1401 at drivers/gpu/drm/display/drm_dp_mst_topology.c:4221 drm_dp_atomic_find_time_slots+0x236/0x280 [drm_display_helper] [ 761.992955] Modules linked in: snd_hda_intel i915 drm_buddy drm_display_helper drm_kms_helper ttm drm snd_hda_codec_hdmi snd_intel_dspcfg snd_hda_codec snd_hwdep snd_hda_core snd_pcm prime_numbers i2c_algo_bit syscopyarea sysfillrect sysimgblt fb_sys_fops x86_pkg_temp_thermal cdc_ether coretemp crct10dif_pclmul usbnet crc32_pclmul mii ghash_clmulni_intel e1000e mei_me ptp i2c_i801 pps_core mei i2c_smbus intel_lpss_pci fuse [last unloaded: drm] [ 761.992986] CPU: 6 PID: 1401 Comm: testdisplay Tainted: G U 6.0.0-rc4-imre+ #565 [ 761.992989] Hardware name: Intel Corporation Alder Lake Client Platform/AlderLake-P DDR5 RVP, BIOS ADLPFWI1.R00.3135.A00.2203251419 03/25/2022 [ 761.992990] RIP: 0010:drm_dp_atomic_find_time_slots+0x236/0x280 [drm_display_helper] [ 761.992994] Code: 4c 8b 67 50 4d 85 e4 75 03 4c 8b 27 e8 03 28 4e e1 48 c7 c1 8b 26 2c a0 4c 89 e2 48 c7 c7 a8 26 2c a0 48 89 c6 e8 31 d5 88 e1 <0f> 0b 49 8b 85 d0 00 00 00 4c 89 fa 48 c7 c6 a0 41 2c a0 48 8b 78 [ 761.992995] RSP: 0018:ffffc9000177ba60 EFLAGS: 00010286 [ 761.992998] RAX: 0000000000000000 RBX: ffff88810d2f1540 RCX: 0000000000000000 [ 761.992999] RDX: 0000000000000001 RSI: ffffffff82368a25 RDI: 00000000ffffffff [ 761.993000] RBP: ffff888142299d80 R08: ffff8884adbfdfe8 R09: 00000000ffefffff [ 761.993001] R10: ffff8884a6bfe000 R11: ffff8884ac443c30 R12: ffff888102972f90 [ 761.993002] R13: ffff8881163e2cf0 R14: 00000000000003ac R15: ffff88810c501000 [ 761.993003] FS: 00007f81e4c459c0(0000) GS:ffff888496500000(0000) knlGS:0000000000000000 [ 761.993004] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 761.993005] CR2: 0000555dac962a98 CR3: 0000000123a34006 CR4: 0000000000770ee0 [ 761.993006] PKRU: 55555554 [ 761.993007] Call Trace: [ 761.993009] <TASK> [ 761.993012] intel_dp_mst_compute_config+0x19a/0x350 [i915] [ 761.993090] intel_atomic_check+0xf37/0x3180 [i915] [ 761.993168] drm_atomic_check_only+0x5d3/0xa60 [drm] [ 761.993182] drm_atomic_commit+0x56/0xc0 [drm] [ 761.993192] ? drm_plane_get_damage_clips.cold+0x1c/0x1c [drm] [ 761.993204] drm_atomic_helper_set_config+0x78/0xc0 [drm_kms_helper] [ 761.993214] drm_mode_setcrtc+0x1ed/0x750 [drm] [ 761.993232] ? drm_mode_getcrtc+0x180/0x180 [drm] [ 761.993241] drm_ioctl_kernel+0xb5/0x150 [drm] [ 761.993252] drm_ioctl+0x203/0x3d0 [drm] [ 761.993261] ? drm_mode_getcrtc+0x180/0x180 [drm] [ 761.993276] __x64_sys_ioctl+0x8a/0xb0 [ 761.993281] do_syscall_64+0x38/0x90 [ 761.993285] entry_SYSCALL_64_after_hwframe+0x63/0xcd [ 761.993287] RIP: 0033:0x7f81e551aaff [ 761.993288] Code: 00 48 89 44 24 18 31 c0 48 8d 44 24 60 c7 04 24 10 00 00 00 48 89 44 24 08 48 8d 44 24 20 48 89 44 24 10 b8 10 00 00 00 0f 05 <41> 89 c0 3d 00 f0 ff ff 77 1f 48 8b 44 24 18 64 48 2b 04 25 28 00 [ 761.993290] RSP: 002b:00007fff4304af10 EFLAGS: 00000246 ORIG_RAX: 0000000000000010 [ 761.993292] RAX: ffffffffffffffda RBX: 00007fff4304afa0 RCX: 00007f81e551aaff [ 761.993293] RDX: 00007fff4304afa0 RSI: 00000000c06864a2 RDI: 0000000000000004 [ 761.993294] RBP: 00000000c06864a2 R08: 0000000000000000 R09: 0000555dac8a9c68 [ 761.993294] R10: 0000000000000000 R11: 0000000000000246 R12: 00000000000008c4 [ 761.993295] R13: 0000000000000004 R14: 0000555dac8a9c68 R15: 00007fff4304b098 [ 761.993301] </TASK> Fixes: 083351e96386 ("drm/display/dp_mst: Fix modeset tracking in drm_dp_atomic_release_vcpi_slots()") Testcase: igt@testdisplay Cc: Lyude Paul <lyude@redhat.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Lyude Paul <lyude@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220907142542.1681994-1-imre.deak@intel.com
2022-09-08drm/panel-edp: Add Innolux N120ACA-EA1 panel entryChen-Yu Tsai
This panel has the same delay timing as N116BCA-EA1 from the same company, which is also the same as delay_200_500_e80_d50. Add an entry for it. Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20220908085454.1024167-2-wenst@chromium.org
2022-09-08drm/sun4i: tv: Merge mode_set into atomic_enableMaxime Ripard
Our mode_set implementation can be merged into our atomic_enable implementation to simplify things, so let's do this. Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://patchwork.freedesktop.org/patch/msgid/20220728-rpi-analog-tv-properties-v2-36-459522d653a7@cerno.tech
2022-09-08drm/i915: Round TMDS clock to nearestVille Syrjälä
Use round-to-nearest behavour when calculating the TMDS clock. Matches what we do for most other clock related things. Acked-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220907091057.11572-18-ville.syrjala@linux.intel.com
2022-09-08drm/i915: Use a fixed N value alwaysVille Syrjälä
Windows/BIOS always uses fixed N values. Let's match that behaviour. Allows us to also get rid of that constant_n quirk stuff. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220907091057.11572-17-ville.syrjala@linux.intel.com
2022-09-08drm/i915: Allow M/N change during fastset on bdw+Ville Syrjälä
On BDW+ M/N are double buffered and so we can easily reprogram them during a fastset. So for eDP panels that support seamless DRRS we can just change these without a full modeset. For earlier platforms we'd need to play tricks with M1/N1 vs. M2/N2 during the fastset to make sure we do the switch atomically. Not sure the added complexity is worth the hassle, so leave it alone for now. The slight downside is that we have to keep the link running at a link rate capable of supporting the highest refresh rate we want to use. For the moment we just pick the highest mode the panel reports and calculate the link based on that. This might need further refinement (eg. if we run into bandwidth restrictions)... v2: Only use the high link rate if the platform really supports the seamless M/N change uring fastset (ie. bdw+) v3: Rebase due to HAS_DOUBLE_BUFFERED_M_N() Reviewed-by: Mika Kahola <mika.kahola@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220907091057.11572-16-ville.syrjala@linux.intel.com
2022-09-08drm/i915: Add intel_panel_highest_mode()Ville Syrjälä
Add a function to get the fixed_mode with the highest clock. The plan is to use this for the link bw calculation on seamless DRRS panels so that we alwasy end up with the same link params regardless of the requested refresh rate. This will allow fastset to do seamless refresh rate changes based on userspace request instead of having to go for a full modeset. TODO: the function name isn't great Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220907091057.11572-15-ville.syrjala@linux.intel.com
2022-09-08drm/i915: Skip intel_modeset_pipe_config_late() if the pipe is not enabledVille Syrjälä
No sense in calling intel_modeset_pipe_config_late() for a disabled pipe. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220907091057.11572-14-ville.syrjala@linux.intel.com
2022-09-08drm/i915: Nuke fastet state copy hacksVille Syrjälä
Now that we no longer do the fuzzy clock and M/N checks we can get rid of the fastset state copy hacks. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220907091057.11572-13-ville.syrjala@linux.intel.com
2022-09-08drm/i915: Set active dpll early for icl+Ville Syrjälä
To make the fastboot checks at least somewhat sensible let's mark the expected DPLL as the active one right after we finished the state computation. Otherwise intel_pipe_config_compare() will always be comparing things against NULL/0. TODO: This is still not really right. If the previous commit had to fall back to the other PLL then the comparisong will now fail. I guess intel_pipe_config_compare() should rather be comparing port_dplls[] instead. But to do that we really should just unify every platform to use the port_dplls[] approach whether they have any need for PLL fallbacks or not. Acked-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220907091057.11572-12-ville.syrjala@linux.intel.com
2022-09-08drm/i915: Make all clock checks non-fuzzyVille Syrjälä
Now that we backfeed the actual DPLL frequency into the compute crtc state all our clocks should come out exact. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220907091057.11572-11-ville.syrjala@linux.intel.com
2022-09-08drm/i915: Make M/N checks non-fuzzyVille Syrjälä
Now that we no longer fuzz M/N during fastset these should match exctly. In order to get a match with what the BIOS does we need to round M/N down. And we do the opposite rounding when doing the readback. That gets us pretty much the same thing back. There can still be slight rounding differences between FDI M/N vs. the DPLL output so we allow for tiny deviation in intel_pipe_config_sanity_check(). v2: Tweak rounding/sanity check stuff a bit Reviewed-by: Jani Nikula <jani.nikula@intel.com> #v1 Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220907091057.11572-10-ville.syrjala@linux.intel.com
2022-09-08drm/i915: Compute clocks earlierVille Syrjälä
Do the DPLL computation before fastset checks. This should allow us to get rid of all that horrible fuzzy clock handling for fastsets. Who knows how many bugs there are caused by our state not actually matching what the hardware will generate. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220907091057.11572-9-ville.syrjala@linux.intel.com
2022-09-08drm/i915: Feed the DPLL output freq back into crtc_stateVille Syrjälä
Fill port_clock and hw.adjusted_mode.crtc_clock with the actual frequency we're going to be getting from the hardware. This will let us accurately compute all derived state that depends on those. v2: Reintroduce iCLKIP WARN v3: Try to deal with VLV/BXT DSI PLL as well Reviewed-by: Jani Nikula <jani.nikula@intel.com> #v1 Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220907091057.11572-8-ville.syrjala@linux.intel.com
2022-09-08drm/i915: Reassign DPLLs only for crtcs going throug .compute_config()Ville Syrjälä
Only reassign the pipe's DPLL if it's going through a full .compute_config() cycle. If OTOH it's just getting modeset eg. in order to change cdclk there doesn't seem much point in picking a new DPLL for it. This should also prevent .get_dplls() from seeing a funky port_clock for DP even in cases where the readout produces a non-standard clock and we (for some reason) have decided to not fully recompute the state to remedy the situation. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220907091057.11572-7-ville.syrjala@linux.intel.com
2022-09-08drm/i915: Do .crtc_compute_clock() earlierVille Syrjälä
Currently we calculate a lot of things (pixel rate, watermarks, cdclk) trusting that the DPLL can generate the exact frequency we ask it. In practice that is not true and there can be certain amount of rounding involved. To allow us to eventually get accurate numbers for all our DPLL clock derived state we need to move the DPLL calculation to hapen much earlier. To that end we hoist it up to the just after the fastset checks. For now we just do the easy code motion, and the actual back feeding of the final DPLL clock into the state will come later. A slight change here is that now .crtc_compute_clock() can get called while the shared_dpll is still assigned. But since .crtc_compute_clock() no longer assignes new shared_dplls this is perfectly fine. TODO: I'd actually like to do this before the fastset check so that if the DPLL state should change we actually do the modeset. Which I think is what the video aficionados want, but it might not be what the fans of fastboot want. Not yet sure how to reconcile those conflicting requirements... v2: s/return/goto/ in error handling Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220907091057.11572-6-ville.syrjala@linux.intel.com
2022-09-08drm/i915: Set correct domains values at _i915_vma_move_to_activeNirmoy Das
Fix regression introduced by commit: "drm/i915: Individualize fences before adding to dma_resv obj" which sets obj->read_domains to 0 for both read and write paths. Also set obj->write_domain to 0 on read path which was removed by the commit. References: https://gitlab.freedesktop.org/drm/intel/-/issues/6639 Fixes: 420a07b841d0 ("drm/i915: Individualize fences before adding to dma_resv obj") Signed-off-by: Nirmoy Das <nirmoy.das@intel.com> Cc: <stable@vger.kernel.org> # v5.16+ Cc: Matthew Auld <matthew.auld@intel.com> Cc: Andrzej Hajda <andrzej.hajda@intel.com> Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com> Signed-off-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220907172641.12555-1-nirmoy.das@intel.com
2022-09-08drm/i915: Rename ggtt_view as gtt_viewNiranjana Vishwanathapura
So far, different views (normal, partial, rotated and remapped) into the same object are only supported for GGTT mappings. But with the upcoming VM_BIND feature, PPGTT will also use the partial view mapping. Hence rename ggtt_view to more generic gtt_view. Signed-off-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com> Acked-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220901183854.3446-1-niranjana.vishwanathapura@intel.com
2022-09-08drm/ssd130x: Replace simple display helpers with the atomic helpersJavier Martinez Canillas
The simple display pipeline is a set of helpers that can be used by DRM drivers to avoid dealing with all the needed components and just define a few functions to operate a simple display device with one full-screen scanout buffer feeding a single output. But it is arguable that this provides the correct level of abstraction for simple drivers, and recently some have been ported from using these simple display helpers to use the regular atomic helpers instead. The rationale for this is that the simple display pipeline helpers don't hide that much of the DRM complexity, while adding an indirection layer that conflates the concepts of CRTCs and planes. This makes the helpers less flexible and harder to be reused among different graphics drivers. Also, for simple drivers, using the full atomic helpers doesn't require a lot of additional code. So adding a simple display pipeline layer may not be worth it. For these reasons, let's follow that trend and make ssd130x a plain DRM driver that creates its own primary plane, CRTC, enconder and connector. Suggested-by: Thomas Zimmermann <tzimmermann@suse.de> Signed-off-by: Javier Martinez Canillas <javierm@redhat.com> Acked-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20220905222759.2597186-1-javierm@redhat.com
2022-09-07drm/amd/amdgpu: Add missing CGTS*TCC_DISABLE to 10.3 headersTom St Denis
The TCC_DISABLE registers were not included in the 10.3 headers and instead just placed directly in the gfx_v10_0.c source. This patch adds them to the headers so tools like umr can scan them and support them. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-09-07drm/amdgpu: prevent toc firmware memory leakGuchun Chen
It's missed in psp fini. Signed-off-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-09-07drm/amdgpu: correct doorbell range/size value for CSDMA_DOORBELL_RANGEYifan Zhang
current function mixes CSDMA_DOORBELL_RANGE and SDMA0_DOORBELL_RANGE range/size manipulation, while these 2 registers have difference size field mask. Remove range/size manipulation for SDMA0_DOORBELL_RANGE. Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com> Reviewed-by: Xiaojian Du <Xiaojian.Du@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-09-07drm/amdkfd: print address in hex format rather than decimalYifan Zhang
Addresses should be printed in hex format. Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-09-07drm/amd/display: Remove the unneeded result variablezhang songyi
Return the enable_link_dp() directly instead of storing it in another redundant variable. Reported-by: Zeal Robot <zealci@zte.com.cn> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: zhang songyi <zhang.songyi@zte.com.cn> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-09-07drm/amd/display: fix memory leak when using debugfs_lookup()Greg Kroah-Hartman
When calling debugfs_lookup() the result must have dput() called on it, otherwise the memory will leak over time. Fix this up by properly calling dput(). Cc: Harry Wentland <harry.wentland@amd.com> Cc: Leo Li <sunpeng.li@amd.com> Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: "Pan, Xinhui" <Xinhui.Pan@amd.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Wayne Lin <Wayne.Lin@amd.com> Cc: hersen wu <hersenxs.wu@amd.com> Cc: Wenjing Liu <wenjing.liu@amd.com> Cc: Patrik Jakobsson <patrik.r.jakobsson@gmail.com> Cc: Thelford Williams <tdwilliamsiv@gmail.com> Cc: Fangzhi Zuo <Jerry.Zuo@amd.com> Cc: Yongzhi Liu <lyz_cs@pku.edu.cn> Cc: Mikita Lipski <mikita.lipski@amd.com> Cc: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Cc: Bhanuprakash Modem <bhanuprakash.modem@intel.com> Cc: Sean Paul <seanpaul@chromium.org> Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Cc: stable@vger.kernel.org Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-09-07drm/amd/pm: add missing SetMGpuFanBoostLimitRpm mapping for SMU 13.0.7Evan Quan
Missing SetMGpuFanBoostLimitRpm mapping leads to loading failure for SMU 13.0.7. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-09-07drm/amd/amdgpu: add rlc_firmware_header_v2_4 to amdgpu_firmware_headerChengming Gui
Add missing structure to avoid incorrect size and version check. Signed-off-by: Chengming Gui <Jack.Gui@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-09-07drm/amdgpu: TA unload messages are not actually sent to psp when amdgpu is ↵YiPeng Chai
uninstalled V1: The psp_cmd_submit_buf function is called by psp_hw_fini to send TA unload messages to psp to terminate ras, asd and tmr. But when amdgpu is uninstalled, drm_dev_unplug is called earlier than psp_hw_fini in amdgpu_pci_remove, the calling order as follows: static void amdgpu_pci_remove(struct pci_dev *pdev) { drm_dev_unplug ...... amdgpu_driver_unload_kms->amdgpu_device_fini_hw->... ->.hw_fini->psp_hw_fini->... ->psp_ta_unload->psp_cmd_submit_buf ...... } The program will return when calling drm_dev_enter in psp_cmd_submit_buf. So the call to drm_dev_enter in psp_cmd_submit_buf should be removed, so that the TA unload messages can be sent to the psp when amdgpu is uninstalled. V2: 1. Restore psp_cmd_submit_buf to its original code. 2. Move drm_dev_unplug call after amdgpu_driver_unload_kms in amdgpu_pci_remove. 3. Since amdgpu_device_fini_hw is called by amdgpu_driver_unload_kms, remove the unplug check to release device mmio resource in amdgpu_device_fini_hw before calling drm_dev_unplug. Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-09-07drm/i915/vdsc: Set VDSC PIC_HEIGHT before using for DP DSCAnkit Nautiyal
Currently, pic_height of vdsc_cfg structure is being used to calculate slice_height, before it is set for DP. So taking out the lines to set pic_height from the helper intel_dp_dsc_compute_params() to individual encoders, and setting pic_height, before it is used to calculate slice_height for DP. Fixes: 5a6d866f8e1b ("drm/i915: Get slice height before computing rc params") Cc: Manasi Navare <manasi.d.navare@intel.com> Cc: Vandita Kulkarni <vandita.kulkarni@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Vandita Kulkarni <vandita.kulkarni@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220902103219.1168781-1-ankit.k.nautiyal@intel.com
2022-09-07dt-bindings: display: bridge: renesas,dw-hdmi: Add resets propertyLad Prabhakar
The DWC HDMI blocks on R-Car and RZ/G2 SoC's use resets, so to complete the bindings include resets property. This also fixes the below warning when running dtbs_check: arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n-rev2-ex-idk-1110wr.dtb: hdmi@fead0000: Unevaluated properties are not allowed ('resets' was unexpected) From schema: Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml While at it mark resets property as required as all the DT sources in the kernel specify resets and update the example node. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2022-09-07drm: rcar-du: dsi: Fix VCLKSET writeTomi Valkeinen
rcar_mipi_dsi_startup() writes correct values to VCLKSET, but as it uses or-operation to add the new values to the current value in the register, it should first make sure the fields are cleared. Do this by using rcar_mipi_dsi_write() to write the VCLKSET register with a variable that has all the unused bits zeroed. Signed-off-by: Tomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2022-09-07drm: rcar-du: Fix DSI enable & disable sequenceTomi Valkeinen
The rcar crtc depends on the clock provided from the rcar DSI bridge. When the DSI bridge is disabled, the clock is stopped, which causes the crtc disable to timeout. Also, while I have no issue with the enable, the documentation suggests to enable the DSI before the crtc so that the crtc has its clock enabled at enable time. This is also not done by the current driver. To fix this, we need to keep the DSI bridge enabled until the crtc has disabled itself, and enable the DSI bridge before crtc enables itself. Add functions rcar_mipi_dsi_pclk_enable and rcar_mipi_dsi_pclk_disable to the rcar DSI bridge driver which the rcar driver can use to enable/disable the DSI clock when needed. This is similar to what is already done with the rcar LVDS bridge. Signed-off-by: Tomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2022-09-07drm: rcar-du: dsi: Improve DSI shutdownTomi Valkeinen
Improve the DSI shutdown procedure by clearing various bits that were set while enabling the DSI output. There has been no clear issues caused by these, but it's safer to ensure that the features are disabled at the start of the next DSI enable. Signed-off-by: Tomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2022-09-07drm: rcar-du: dsi: Properly stop video mode TXTomi Valkeinen
The driver does not explicitly stop the video mode transmission when disabling the output. While this doesn't seem to be causing any issues, lets follow the steps described in the documentation and add a rcar_mipi_dsi_stop_video() which stop the video mode transmission. This function will also be used in later patches to stop the video transmission even if the DSI IP is not shut down. Signed-off-by: Tomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-08-04 22:59:19 +0000