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2021-02-02ARM: dts: qcom: msm8974-klte: add support for GPUSamuel Pascua
Enable adreno dt node. Signed-off-by: Samuel Pascua <pascua.samuel.14@gmail.com> [iskren.chernev@gmail.com: changes after v1] Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com> Link: https://lore.kernel.org/r/20210201105657.1642825-2-iskren.chernev@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-02-02ARM: dts: qcom: msm8974: add gpu supportBrian Masney
Add support for the a3xx GPU. opp_table is chosen to include lower frequencies common to all different msm8974 variants. Signed-off-by: Brian Masney <masneyb@onstation.org> [iskren.chernev@gmail.com: change after v1] Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com> Link: https://lore.kernel.org/r/20210201105657.1642825-1-iskren.chernev@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-25ARM: dts: qcom: ipq4019: add SDHCI VQMMC LDO nodeRobert Marko
Since we now have driver for the SDHCI VQMMC LDO needed for I/0 voltage levels lets introduce the necessary node for it. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr> Link: https://lore.kernel.org/r/20200907101937.10155-1-robert.marko@sartura.hr Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-22ARM: dts: qcom: replace status value "ok" by "okay"Adrian Schmutzler
While the DT parser recognizes "ok" as a valid value for the "status" property, it is actually mentioned nowhere. Use the proper value "okay" instead, as done in the majority of files already. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de> Link: https://lore.kernel.org/r/20200830191643.20717-1-freifunk@adrianschmutzler.de [bjorn: Rebased and included fixup of sdx55-mtp] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-22ARM: dts: qcom: add additional DT labels in qcom-ipq8064.dtsiAdrian Schmutzler
This adds some additional DT labels which are handy when referring to the nodes in derived DTS(I) files. It will also make the definitions more consistent, e.g. by adding gsbi2_serial and gsbi5_serial where we previously "only" had gsbi4_serial defined. While at it, add missing spaces after some DT labels and remove one useless empty line. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de> Link: https://lore.kernel.org/r/20200902165159.7733-1-freifunk@adrianschmutzler.de Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-22ARM: dts: qcom: remove commented mmc-ddr-1_8v for sdcc3Adrian Schmutzler
This property appears to be commented out, so we can remove it as well. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de> Link: https://lore.kernel.org/r/20200902165159.7733-2-freifunk@adrianschmutzler.de Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-22ARM: dts: qcom: add Alfa Network AP120C-ACRobert Marko
ALFA Network AP120C-AC is a dual-band ceiling AP, based on Qualcomm IPQ4018 + QCA8075 platform. Specification: - Qualcomm IPQ4018 (717 MHz) - 256 MB of RAM (DDR3) - 16 MB (SPI NOR) + 128 or 512 MB (SPI NAND) of flash - 2x Gbps Ethernet, with 802.3af PoE support in one port - 2T2R 2.4/5 GHz (IPQ4018), with ext. FEMs (QFE1952, QFE1922) - 3x U.FL connectors - 1x 1.8 dBi (Bluetooth) and 2x 3/5 dBi dual-band (Wi-Fi) antennas - Atmel/Microchip AT97SC3205T TPM module (I2C bus) - TI CC2540 Bluetooth LE module (USB 2.0 bus) - 1x button (reset) - 1x USB 2.0 - DC jack for main power input (12 V) - UART header available on PCB (2.0 mm pitch) This adds DTS for both the generic and custom Bit edition for Sartura. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr> Link: https://lore.kernel.org/r/20200909195640.3127341-4-robert.marko@sartura.hr Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-22ARM: dts: qcom: add 8devices JalapenoRobert Marko
8devices Jalapeno is a dual-band SoM, based on Qualcomm IPQ4018 + QCA8072 platform. Specification: QCA IPQ4018, Quad core ARM v7 Cortex A7 717MHz 256 MB of DDR3 RAM 8 MB of SPI NOR flash 128 MB of Winbond SPI NAND flash WLAN1: Qualcomm Atheros QCA4018 2.4GHz 802.11bgn 2:2x2 WLAN2: Qualcomm Atheros QCA4018 5GHz 802.11a/n/ac 2:2x2 ETH: Qualcomm Atheros QCA8072 Gigabit Switch (1 x LAN, 1 x WAN) Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr> Link: https://lore.kernel.org/r/20200909195640.3127341-3-robert.marko@sartura.hr Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-22ARM: dts: qcom: ipq4019: add more labelsRobert Marko
Lets add labels to more commonly used nodes for easier modification in board DTS files. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr> Link: https://lore.kernel.org/r/20200909195640.3127341-2-robert.marko@sartura.hr Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-22ARM: dts: qcom: ipq4019: add USB devicetree nodesJohn Crispin
Since we now have driver for the USB PHY, and USB controller is already supported by the DWC3 driver lets add the necessary nodes to DTSI. Signed-off-by: John Crispin <john@phrozen.org> Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr> Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20200909163831.1894142-1-robert.marko@sartura.hr Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-22ARM: dts: qcom: add prng definition to ipq806xJonathan McDowell
Add missing prng definition for ipq806x SoC Signed-off-by: Jonathan McDowell <noodles@earth.li> Link: https://lore.kernel.org/r/20200705142544.GA3389@earth.li Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-22ARM: dts: qcom: sdx55: Add pshold supportManivannan Sadhasivam
Add support for pshold block to drive pshold towards the PMIC, which is used to trigger a configurable event such as reboot or poweroff of the SDX55 platform. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210118051005.55958-7-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-22ARM: dts: qcom: sdx55: Add Watchdog supportManivannan Sadhasivam
Enable Watchdog support for Application Processor Subsystem (APSS) block on SDX55 platform. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210118051005.55958-6-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-22dt-bindings: watchdog: Add binding for Qcom SDX55Manivannan Sadhasivam
Add devicetree binding for watchdog present in Qcom SDX55 platform. Cc: Wim Van Sebroeck <wim@linux-watchdog.org> Cc: Guenter Roeck <linux@roeck-us.net> Cc: Rob Herring <robh+dt@kernel.org> Cc: linux-watchdog@vger.kernel.org Cc: devicetree@vger.kernel.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210118051005.55958-5-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-22ARM: dts: qcom: sdx55-mtp: Enable USB3 and PHY supportManivannan Sadhasivam
Enable the support for USB3 controller, QMP PHY and HS PHY on SDX55 MTP. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210118051005.55958-4-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-22ARM: dts: qcom: sdx55: Add USB3 and PHY supportManivannan Sadhasivam
Add devicetree nodes for enabling USB3 controller, Qcom QMP PHY and SNPS HS PHY on SDX55. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210118051005.55958-3-manivannan.sadhasivam@linaro.org [bjorn: Added missing #power-domain-cells to &gcc] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-22dt-bindings: usb: qcom,dwc3: Add binding for SDX55Manivannan Sadhasivam
Add devicetree binding for SDX55 USB controller based on Qcom designware IP. Acked-by: Felipe Balbi <balbi@kernel.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Cc: linux-usb@vger.kernel.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210118051005.55958-2-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-20ARM: dts: qcom: msm8974-klte: Fix shdc numberingAlexey Minnekhanov
Since commit fa2d0aa96941 ("mmc: core: Allow setting slot index via device tree alias") proper aliases should be named "mmcN". Signed-off-by: Alexey Minnekhanov <alexeymin@postmarketos.org> Link: https://lore.kernel.org/r/20210110185835.133059-1-alexeymin@postmarketos.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-06ARM: dts: qcom: sdx55-mtp: Add regulator nodesVinod Koul
This adds the regulators found on SDX55 MTP. Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210106125322.61840-19-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-06ARM: dts: qcom: sdx55-mtp: Add pmx55 pmicVinod Koul
SDX55-mtp features PMX55 pmic, so include the dts as well Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210106125322.61840-16-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-06ARM: dts: qcom: Add PMIC pmx55 dtsVinod Koul
This adds DTS for PMIC PMX55 found in Qualcomm platforms. Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210106125322.61840-18-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-06ARM: dts: qcom: sdx55: Add rpmpd nodeVinod Koul
This adds rpmpd node and opps for this node to the SDX55 dts. Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210106125322.61840-17-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-06ARM: dts: qcom: sdx55-mtp: Add pm8150b pmicVinod Koul
SDX55-mtp features PM8150B pmic, so include the dts as well Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210106125322.61840-15-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-06ARM: dts: qcom: sdx55: Add spmi nodeVinod Koul
This adds SPMI node to SDX55 dts. Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210106125322.61840-14-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-06ARM: dts: qcom: sdx55-mtp: Enable QPIC NANDManivannan Sadhasivam
Enable QPIC NAND on SDX55-MTP board. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210106125322.61840-13-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-06ARM: dts: qcom: sdx55-mtp: Enable BAM DMAManivannan Sadhasivam
Enable BAM DMA on SDX55-MTP board. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210106125322.61840-12-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-06ARM: dts: qcom: sdx55: Add QPIC NAND supportManivannan Sadhasivam
Add qpic_nand node to support QPIC NAND controller on SDX55 platform. Since there is no "aon" clock in SDX55, a dummy clock is provided. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210106125322.61840-11-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-06ARM: dts: qcom: sdx55: Add QPIC BAM supportManivannan Sadhasivam
Add qpic_bam node to support QPIC BAM DMA controller on SDX55 platform. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210106125322.61840-10-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-06ARM: dts: qcom: sdx55: Add Shared memory manager supportManivannan Sadhasivam
Add smem node to support shared memory manager on SDX55 platform. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210106125322.61840-9-manivannan.sadhasivam@linaro.org [bjorn: Moved smem node out from /soc] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-06ARM: dts: qcom: sdx55: Add support for TCSR MutexManivannan Sadhasivam
Add TCSR Mutex node to support Qualcomm Hardware Mutex block on SDX55 platform. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210106125322.61840-8-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-06ARM: dts: qcom: sdx55: Enable ARM SMMUBjorn Andersson
Add a node for the ARM SMMU found in the SDX55. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210106125322.61840-7-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-06ARM: dts: qcom: sdx55: Add support for SDHCI controllerManivannan Sadhasivam
Add devicetree support for SDHCI controller found in Qualcomm SDX55 platform. The SDHCI controller is based on the MSM SDHCI v5 IP. Hence, the support is added by reusing the existing sdhci driver with "qcom,sdhci-msm-v5" as the fallback. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210106125322.61840-5-manivannan.sadhasivam@linaro.org [bjorn: added include of qcom,gcc-sdx55.h] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-06ARM: dts: qcom: sdx55: Add reserved memory nodesVinod Koul
This adds reserved memory nodes to the SDX55 dtsi as defined by v6 of the memory map Signed-off-by: Vinod Koul <vkoul@kernel.org> [mani: moved modem regions to board dts] Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210106125322.61840-3-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-06ARM: dts: qcom: sdx55: Add pincontrol nodeVinod Koul
This adds pincontrol node to SDX55 dts. Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210106125322.61840-2-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-12-31ARM: dts: qcom: Add SDX55 platform and MTP board supportManivannan Sadhasivam
Add basic devicetree support for SDX55 platform and MTP board from Qualcomm. The SDX55 platform features an ARM Cortex A7 CPU which forms the Application Processor Sub System (APSS) along with standard Qualcomm peripherals like GCC, TLMM, BLSP, QPIC, and BAM etc... Also, there exists the networking parts such as IPA, MHI, PCIE-EP, EMAC, and Modem etc.. Currently, this basic devicetree support includes GCC, RPMh clock, INTC and Debug UART. Co-developed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20201126083138.47047-3-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-12-31dt-bindings: arm: qcom: Document SDX55 platform and boardsVinod Koul
Document the SDX55 platform binding and also the boards using it. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20201126083138.47047-2-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-12-27Linux 5.11-rc1v5.11-rc1Linus Torvalds
2020-12-27proc mountinfo: make splice available againLinus Torvalds
Since commit 36e2c7421f02 ("fs: don't allow splice read/write without explicit ops") we've required that file operation structures explicitly enable splice support, rather than falling back to the default handlers. Most /proc files use the indirect 'struct proc_ops' to describe their file operations, and were fixed up to support splice earlier in commits 40be821d627c..b24c30c67863, but the mountinfo files interact with the VFS directly using their own 'struct file_operations' and got missed as a result. This adds the necessary support for splice to work for /proc/*/mountinfo and friends. Reported-by: Joan Bruguera Micó <joanbrugueram@gmail.com> Reported-by: Jussi Kivilinna <jussi.kivilinna@iki.fi> Link: https://bugzilla.kernel.org/show_bug.cgi?id=209971 Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Christoph Hellwig <hch@lst.de> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-12-27Merge tag 'ntb-5.11' of git://github.com/jonmason/ntbLinus Torvalds
Pull NTB fixes from Jon Mason: "Bug fix for IDT NTB and Intel NTB LTR management support" * tag 'ntb-5.11' of git://github.com/jonmason/ntb: ntb: intel: add Intel NTB LTR vendor support for gen4 NTB ntb: idt: fix error check in ntb_hw_idt.c
2020-12-27Merge branch 'linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6 Pull crypto fixes from Herbert Xu: "Fix a number of autobuild failures due to missing Kconfig dependencies" * 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: crypto: qat - add CRYPTO_AES to Kconfig dependencies crypto: keembay - Add dependency on HAS_IOMEM crypto: keembay - CRYPTO_DEV_KEEMBAY_OCS_AES_SM4 should depend on ARCH_KEEMBAY
2020-12-27Merge tag 'objtool-urgent-2020-12-27' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull objtool fix from Ingo Molnar: "Fix a segfault that occurs when built with Clang" * tag 'objtool-urgent-2020-12-27' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: objtool: Fix seg fault with Clang non-section symbols
2020-12-27Merge tag 'locking-urgent-2020-12-27' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull locking fixes from Ingo Molnar: "Misc fixes/updates: - Fix static keys usage in module __init sections - Add separate MAINTAINERS entry for static branches/calls - Fix lockdep splat with CONFIG_PREEMPTIRQ_EVENTS=y tracing" * tag 'locking-urgent-2020-12-27' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: softirq: Avoid bad tracing / lockdep interaction jump_label/static_call: Add MAINTAINERS jump_label: Fix usage in module __init
2020-12-27Merge tag 'timers-urgent-2020-12-27' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull timer fixes from Ingo Molnar: "Update/fix two CPU sanity checks in the hotplug and the boot code, and fix a typo in the Kconfig help text. [ Context: the first two commits are the result of an ongoing annotation+review work of (intentional) tick_do_timer_cpu() data races reported by KCSAN, but the annotations aren't fully cooked yet ]" * tag 'timers-urgent-2020-12-27' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: timekeeping: Fix spelling mistake in Kconfig "fullfill" -> "fulfill" tick/sched: Remove bogus boot "safety" check tick: Remove pointless cpu valid check in hotplug code
2020-12-27Merge tag 'sched-urgent-2020-12-27' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull scheduler fix from Ingo Molnar: "Fix a context switch performance regression" * tag 'sched-urgent-2020-12-27' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: sched: Optimize finish_lock_switch()
2020-12-26mfd: ab8500-debugfs: Remove extraneous seq_putcLinus Torvalds
Commit c9a3c4e637ac ("mfd: ab8500-debugfs: Remove extraneous curly brace") removed a left-over curly brace that caused build failures, but Joe Perches points out that the subsequent 'seq_putc()' should also be removed, because the commit that caused all these problems already added the final '\n' to the seq_printf() above it. Reported-by: Joe Perches <joe@perches.com> Fixes: 886c8121659d ("mfd: ab8500-debugfs: Remove the racy fiddling with irq_desc") Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Nathan Chancellor <natechancellor@gmail.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-12-25Merge tag 'pci-v5.11-fixes-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI fixes from Bjorn Helgaas: - Fix a tegra enumeration regression (Rob Herring) - Fix a designware-host check that warned on *success*, not failure (Alexander Lobakin) * tag 'pci-v5.11-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: PCI: dwc: Fix inverted condition of DMA mask setup warning PCI: tegra: Fix host link initialization
2020-12-25mfd: ab8500-debugfs: Remove extraneous curly braceNathan Chancellor
Clang errors: drivers/mfd/ab8500-debugfs.c:1526:2: error: non-void function does not return a value [-Werror,-Wreturn-type] } ^ drivers/mfd/ab8500-debugfs.c:1528:2: error: expected identifier or '(' return 0; ^ drivers/mfd/ab8500-debugfs.c:1529:1: error: extraneous closing brace ('}') } ^ 3 errors generated. The cleanup in ab8500_interrupts_show left a curly brace around, remove it to fix the error. Fixes: 886c8121659d ("mfd: ab8500-debugfs: Remove the racy fiddling with irq_desc") Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-12-25PCI: dwc: Fix inverted condition of DMA mask setup warningAlexander Lobakin
Commit 660c486590aa ("PCI: dwc: Set 32-bit DMA mask for MSI target address allocation") added dma_mask_set() call to explicitly set 32-bit DMA mask for MSI message mapping, but for now it throws a warning on ret == 0, while dma_set_mask() returns 0 in case of success. Fix this by inverting the condition. [bhelgaas: join string to make it greppable] Fixes: 660c486590aa ("PCI: dwc: Set 32-bit DMA mask for MSI target address allocation") Link: https://lore.kernel.org/r/20201222150708.67983-1-alobakin@pm.me Signed-off-by: Alexander Lobakin <alobakin@pm.me> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2020-12-25PCI: tegra: Fix host link initializationRob Herring
Commit b9ac0f9dc8ea ("PCI: dwc: Move dw_pcie_setup_rc() to DWC common code") broke enumeration of downstream devices on Tegra: In non-working case (next-20201211): 0001:00:00.0 PCI bridge: NVIDIA Corporation Device 1ad2 (rev a1) 0001:01:00.0 SATA controller: Marvell Technology Group Ltd. Device 9171 (rev 13) 0005:00:00.0 PCI bridge: NVIDIA Corporation Device 1ad0 (rev a1) In working case (v5.10-rc7): 0001:00:00.0 PCI bridge: Molex Incorporated Device 1ad2 (rev a1) 0001:01:00.0 SATA controller: Marvell Technology Group Ltd. Device 9171 (rev 13) 0005:00:00.0 PCI bridge: Molex Incorporated Device 1ad0 (rev a1) 0005:01:00.0 PCI bridge: PLX Technology, Inc. Device 3380 (rev ab) 0005:02:02.0 PCI bridge: PLX Technology, Inc. Device 3380 (rev ab) 0005:03:00.0 USB controller: PLX Technology, Inc. Device 3380 (rev ab) The problem seems to be dw_pcie_setup_rc() is now called twice before and after the link up handling. The fix is to move Tegra's link up handling to .start_link() function like other DWC drivers. Tegra is a bit more complicated than others as it re-inits the whole DWC controller to retry the link. With this, the initialization ordering is restored to match the prior sequence. Fixes: b9ac0f9dc8ea ("PCI: dwc: Move dw_pcie_setup_rc() to DWC common code") Link: https://lore.kernel.org/r/20201218143905.1614098-1-robh@kernel.org Reported-by: Mian Yousaf Kaukab <ykaukab@suse.de> Tested-by: Mian Yousaf Kaukab <ykaukab@suse.de> Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Jonathan Hunter <jonathanh@nvidia.com> Cc: Vidya Sagar <vidyas@nvidia.com>
2020-12-25drm/amd/display: avoid uninitialized variable warningLinus Torvalds
clang (quite rightly) complains fairly loudly about the newly added mpc1_get_mpc_out_mux() function returning an uninitialized value if the 'opp_id' checks don't pass. This may not happen in practice, but the code really shouldn't return garbage if the sanity checks don't pass. So just initialize 'val' to zero to avoid the issue. Fixes: 110b055b2827 ("drm/amd/display: add getter routine to retrieve mpcc mux") Cc: Josip Pavic <Josip.Pavic@amd.com> Cc: Bindu Ramamurthy <bindu.r@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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