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2019-04-10drm/amd/display: init dc_config before rest of DC initAnthony Koo
[Why] In some cases we want DC init to take in some config options [How] Init dc_config before rest of DC init Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-10drm/amd/display: Call hwss.set_cursor_sdr_white_level, if availableSivapiriyanKumarasamy
[Why] In HDR configurations, the cursor - in SDR - needs to have it's white level boosted. [How] Program the cursor boost in update_dchubp_dpp like the other cursor attributes. Signed-off-by: SivapiriyanKumarasamy <sivapiriyan.kumarasamy@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Acked-by: Reza Amini <Reza.Amini@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-10drm/amd/display: Set surface color space from DRM plane stateNicholas Kazlauskas
[Why] We need DC's color space to match the color encoding and color space specified by userspace to correctly render YUV surfaces. [How] Convert the DRM color encoding and color range properties to the appropriate DC colorspace option and update the color space when performing surface updates. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-10drm/amd/display: prefer preferred link cap over verified link settingsWenjing Liu
[why] when preferred link cap is set, we should always use preferred in all validation. we should not use preferred for some validation but use verified for others. [how] create getter function that gets verified link cap. if preferred is set, return preferred link settings instead. Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com> Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-10drm/amd/display: remove min reduction for abm 2.2 level 3Josip Pavic
[Why] Image brightness compensation for solid color full screen images is expected to be optimal for ABM 2.2 at level 3. The min reduction that is currently being enforced prevents this from being achieved. [How] Remove the min reduction for ABM 2.2 at level 3 Signed-off-by: Josip Pavic <Josip.Pavic@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-10drm/amd/display: 3.2.25Aric Cyr
Signed-off-by: Aric Cyr <aric.cyr@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-10drm/amd/display: return correct dc_status for dcn10_validate_globalSu Sung Chung
[Why] Before it was returning false in the case of failure even though return type should be enum dc_status [How] Return DC_FAIL_UNSUPPORTED_1 instead Signed-off-by: Su Sung Chung <Su.Chung@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-10drm/amd/display: Use plane->color_space for dpp if specifiedNicholas Kazlauskas
[Why] The input color space for the plane was previously ignored even if it was set. If a limited range YUV format was given to DC then the wrong color transformation matrix was being used since DC assumed that it was full range instead. [How] Respect the given color_space format for the plane if it isn't COLOR_SPACE_UNKNOWN. Otherwise, use the implicit default since DM didn't specify. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Sun peng Li <Sunpeng.Li@amd.com> Acked-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-10drm/amd/display: Calculate link bandwidth in a common functionNikola Cornij
[why] Currently link bandwidth is calculated in two places, using the same formula. They should be unified into calling one function. [how] Replace all implementations of link bandwidth calculation with a call to a function. Signed-off-by: Nikola Cornij <nikola.cornij@amd.com> Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-10drm/amd/display: fix clk_mgr namingDmytro Laktyushkin
clk_mgr is called dccg in dc_state, this change fixes that Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-10drm/amd/display: use proper formula to calculate bandwidth from timingWenjing Liu
[why] The existing calculation uses a wrong formula to calculate bandwidth from timing. [how] Expose the existing proper function that calculates the bandwidth, so dc_link can use it to calculate timing bandwidth correctly. Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-10drm/amd/display: fix dp_hdmi_max_pixel_clk unitsSivapiriyanKumarasamy
[Why] We are incorrectly using dp_hdmi_max_pixel_clk because the units are not clear. [How] Rename to dp_hdmi_max_pixel_clk_in_khz, and change mode timing validation to use the value correctly. Signed-off-by: SivapiriyanKumarasamy <sivapiriyan.kumarasamy@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-10drm/amd/display: Add debugfs entry for amdgpu_dm_visual_confirmNicholas Kazlauskas
[Why] DC provides a few visual confirmation debug options that can be dynamically changed at runtime to help debug surface programming issues but we don't have any way to access it from userspace. [How] Add the amdgpu_dm_visual_confirm debugfs entry. It accepts a string containing the DC visual confirm enum value using the debugfs attribute helpers. The debugfs_create_file_unsafe can be used instead of debugfs_create_file as per the documentation. v2: Use debugfs helpers for getting and setting the value (Christian) Cc: Leo Li <sunpeng.li@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-10drm/amd/display: Initialize stream_update with memsetNicholas Kazlauskas
The brace initialization used here generates warnings on some compilers. For example, on GCC 4.9: [...] In function ‘dm_determine_update_type_for_commit’: [...] error: missing braces around initializer [-Werror=missing-braces] struct dc_stream_update stream_update = { 0 }; ^ Use memset to make this more portable. v2: Specify the compiler / diagnostic in the commit message (Paul) Cc: Sun peng Li <Sunpeng.Li@amd.com> Cc: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-10drm/amd/display: Remove semicolon from to_dm_plane_state definitionNicholas Kazlauskas
The extra ; in the macro definition creates an empty statement preventing any variable declarations from occuring after any use of to_dm_plane_state(...). Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-10drm/amdgpu: support dpm level modification under virtualization v3Yintian Tao
Under vega10 virtualuzation, smu ip block will not be added. Therefore, we need add pp clk query and force dpm level function at amdgpu_virt_ops to support the feature. v2: add get_pp_clk existence check and use kzalloc to allocate buf v3: return -ENOMEM for allocation failure and correct the coding style Signed-off-by: Yintian Tao <yttao@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-10drm/amdgpu: Always enable memory sharing within same XGMI hiveshaoyunl
XGMI Memory sharing will be disbaled by default for security reason after boot up, it depends on driver to enable the memory sharing Signed-off-by: shaoyunl <shaoyun.liu@amd.com> Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-10drm/amdgpu: Add a check to avoid panic because of unexpected irqsxinhui pan
IP initialize ras in late_init, because of the BUGs of PSP or any other components, driver receives unexpected irqs. It is ok to add such check anyway. Signed-off-by: xinhui pan <xinhui.pan@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-10drm/amdgpu: sdma use amdgpu_ras_feature_enable_on_bootxinhui pan
handle ras enable on boot. Signed-off-by: xinhui pan <xinhui.pan@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-10drm/amdgpu: gmc use amdgpu_ras_feature_enable_on_bootxinhui pan
handle ras enable on boot. Signed-off-by: xinhui pan <xinhui.pan@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-10drm/amdgpu: gfx use amdgpu_ras_feature_enable_on_bootxinhui pan
handle ras enable on boot. Signed-off-by: xinhui pan <xinhui.pan@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-10drm/amdgpu: Introduce another ras enable functionxinhui pan
Many parts of the whole SW stack can program the ras enablement state during the boot. Now we handle that case by adding one function which check the ras flags and choose different code path. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: xinhui pan <xinhui.pan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-10drm/amdgpu: Make default ras error type to nonexinhui pan
Unless IP has implemented its own ras, use ERROR_NONE as the default type. Signed-off-by: xinhui pan <xinhui.pan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-10drm/amd/powerplay: simplify the code of [get|set]_activity_monitor_coeffKevin Wang
use smu_update_table_with_arg to replace old code logic Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-10drm/amd/powerplay: optimization function of smu_update_tableKevin Wang
in fact, the firmware need 2 parameter: 1.table_id, 2.XferArg so change the function interface to match the firmware code Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-09drm/lima: include used header file explicitlyQiang Yu
To prevent build fail on some platform which does not have it in the include file chain. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Suggested-by: Randy Dunlap <rdunlap@infradead.org> Fixes: a1d2a6339961 ("drm/lima: driver for ARM Mali4xx GPUs") Signed-off-by: Qiang Yu <yuq825@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190409003617.4470-2-yuq825@gmail.com
2019-04-09drm/lima: add missing Kconfig dependencyQiang Yu
Current implementation does not support MMU-less plarforms. Suggested-by: Randy Dunlap <rdunlap@infradead.org> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Fixes: a1d2a6339961 ("drm/lima: driver for ARM Mali4xx GPUs") Signed-off-by: Qiang Yu <yuq825@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190409003617.4470-1-yuq825@gmail.com
2019-04-09drm/meson: Add G12A support for the DW-HDMI GlueNeil Armstrong
The Amlogic G12A embeds the same Synopsys DW-HDMI Controller, but with : - a "backport" of the HDR signaling registers from more recent DW-HDMI controllers, this will need a tweak since it's not normally present on this version of the DW-HDMI controller - A direct mapping of TOP and DW-HDMI registers instead of an internal bus accessed using read/write registers - Support for RX-SENSE, but not yet implemented - Support for HDMI 2.1 Dynamic HDR, but not yet implemented - Different registers mapping for the HDMI PHY setup This patchs adds support for these changes while providing exact same support as the previous GXBB, GXL & GXM SoCs. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190325141824.21259-12-narmstrong@baylibre.com
2019-04-09drm/meson: Add G12A compatibleNeil Armstrong
Finally add the Amlogic G12A SoC compatible for the VPU driver. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190325141824.21259-11-narmstrong@baylibre.com
2019-04-09drm/meson: Add G12A Video Clock setupNeil Armstrong
While switching to the Common Clock Framework is still Work In Progress, this patch adds the corresponding G12A HDMI PLL setup to be on-par with the other SoCs support. The G12A has only a single tweak about the high frequency setup, where the HDMI PLL needs a specific setup to handle correctly the 5.94GHz DCO frequency. Apart that, it handls ecorrectly all the other HDMI frequencies and can achieve even better DMT clock frequency precision with the larger fractional dividier width. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190325141824.21259-10-narmstrong@baylibre.com
2019-04-09drm/meson: Add G12A support for CVBS EncoderNeil Armstrong
The Meson G12A SoCs uses the exact same CVBS encoder except a simple CVBS DAC register offset and settings delta. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> [narmstrong: fixed subject typo] Tested-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190325141824.21259-9-narmstrong@baylibre.com
2019-04-09drm/meson: Add G12A support for plane handling in CRTC driverNeil Armstrong
This patch adds support for the new OSD+VD Plane blending module in the CRTC code by adding the G12A code to manage the blending module and setting the right OSD1 & VD1 plane registers. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190325141824.21259-8-narmstrong@baylibre.com
2019-04-09drm/meson: Add G12A Support for the Overlay video planeNeil Armstrong
Amlogic G12A SoC supports the same set of Video Planes, but now are handled by the new OSD plane blender module. This patch uses the same VD1 plane for G12A, using the exact same scaler and VD1 setup registers, except using the new blender register to disable the plane. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> [narmstrong: fix typo in commit log] Tested-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190325141824.21259-7-narmstrong@baylibre.com
2019-04-09drm/meson: Add G12A support for OSD1 PlaneNeil Armstrong
Amlogic G12A SoC supports now up to 3 OSD planes (1 more than the previous SoCs) and a brand new OSD plane blender module. This patch uses the same OSD1 plane for G12A, using the exact same scaler and OSD1 setup registers, except using the new blender register to disable the plane. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> [narmstrong: fixed typo in commit log] Tested-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190325141824.21259-6-narmstrong@baylibre.com
2019-04-09drm/meson: Add G12A Support for VIU setupNeil Armstrong
Amlogic G12A SoC needs a different VIU setup code, handle it. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190325141824.21259-5-narmstrong@baylibre.com
2019-04-09drm/meson: Add G12A Support for VPP setupNeil Armstrong
Amlogic G12A needs a different VPP setup code, handle it here. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190325141824.21259-4-narmstrong@baylibre.com
2019-04-09drm/meson: Add registers for G12A SoCNeil Armstrong
This patch adds the new VPU registers added since the Amlogic GXM SoCs. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190325141824.21259-3-narmstrong@baylibre.com
2019-04-09drm/meson: Switch PLL to 5.94GHz base for 297Mhz pixel clockNeil Armstrong
On Amlogic G12A SoC, the 2,97GHz PLL frequency is not stable enough to provide a correct 297MHz pixel clock, so switch the PLL base frequency with a /2 OD when the 297MHz pixel clock is requested. This solves the issue on G12A and also works fine on GXBB, GXL & GXM. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190325141824.21259-2-narmstrong@baylibre.com
2019-04-09dt-bindings: display: amlogic, meson-dw-hdmi: Add G12A compatible and portsNeil Armstrong
The Amlogic G12A SoC has a slighly modified DW-HDMI Glue with support for HDMI 2.1 and a different DW-HDMI register access. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20190313141030.5958-3-narmstrong@baylibre.com
2019-04-09dt-bindings: display: amlogic, meson-vpu: Add G12A compatible and portsNeil Armstrong
The Amlogic G12A VPU is very similar to the Amlogic GXM VPU but with : - an enhanced plane blender, with up to 3 OSD planes - support for AFBC 1.2 decoder (for Bifrost GPU) - support display mode up to 4k60@75Hz Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20190313141030.5958-2-narmstrong@baylibre.com
2019-04-09dt-bindings: gpu: add bindings for the ARM Mali Bifrost GPUNeil Armstrong
Add the bindings for the Bifrost family of ARM Mali GPUs. The Bifrost GPU architecture is similar to the Midgard family, but with a different Shader Core & Execution Engine structures. Bindings are based on the Midgard family bindings, but the inner architectural changes makes it a separate family needing separate bindings. The Bifrost GPUs are present in a number of recent SoCs, like the Amlogic G12A Family, and many other vendors. The Amlogic vendor specific compatible is added to handle the specific IP integration differences and dependencies. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Rob Herring <robh@kernel.org> [narmstrong: fixed small typo in compatible description] Link: https://patchwork.freedesktop.org/patch/msgid/20190401080949.14550-1-narmstrong@baylibre.com
2019-04-08MAINTAINERS: mark lima mailing list as moderatedRandy Dunlap
Note that the lima mailing list is moderated. Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Cc: Qiang Yu <yuq825@gmail.com> Cc: dri-devel@lists.freedesktop.org Cc: lima@lists.freedesktop.org Signed-off-by: Qiang Yu <yuq825@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/9138d8e8-5390-0650-9bc3-050b869e978c@infradead.org Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
2019-04-08drm/cirrus: rewrite and modernize driver.Gerd Hoffmann
Time to kill some bad sample code people are copying from ;) This is a complete rewrite of the cirrus driver. The cirrus_mode_set() function is pretty much the only function which is carried over largely unmodified. Everything else is upside down. It is a single monster patch. But given that it does some pretty fundamental changes to the drivers workflow and also reduces the code size by roughly 70% I think it'll still be alot easier to review than a longish baby-step patch series. Changes summary: - Given the small amout of video memory (4 MB) the cirrus device has the rewritten driver doesn't try to manage buffers there. Instead it will blit (memcpy) the active framebuffer to video memory. - All gem objects are stored in main memory and are manged using the new shmem helpers. ttm is out. - It supports RG16, RG24 and XR24 formats. XR24 gets converted to RG24 or RG16 at blit time if needed, to avoid the pitch becoming larger than what the cirrus hardware can handle. - The simple display pipeline is used. - The generic fbdev emulation is used. - It's a atomic driver now. - It runs wayland. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Acked-by: Noralf Trønnes <noralf@tronnes.org> Link: http://patchwork.freedesktop.org/patch/msgid/20190405095219.9231-6-kraxel@redhat.com
2019-04-08drm: add drm_fb_xrgb8888_to_rgb888_dstclip()Gerd Hoffmann
Simliar to drm_fb_xrgb8888_to_rgb565_dstclip() but converts to rgb888 instead of rgb565. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Noralf Trønnes <noralf@tronnes.org> Link: http://patchwork.freedesktop.org/patch/msgid/20190405095219.9231-5-kraxel@redhat.com
2019-04-08drm: add drm_fb_xrgb8888_to_rgb565_dstclip()Gerd Hoffmann
It is a drm_fb_xrgb8888_to_rgb565() variant which checks the clip rectangle for the destination too. Common code between drm_fb_xrgb8888_to_rgb565() and drm_fb_xrgb8888_to_rgb565_dstclip() was factored out into the drm_fb_xrgb8888_to_rgb565_lines() helper function. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Noralf Trønnes <noralf@tronnes.org> Link: http://patchwork.freedesktop.org/patch/msgid/20190405095219.9231-4-kraxel@redhat.com
2019-04-08drm: add drm_fb_memcpy_dstclip() helperGerd Hoffmann
It is a drm_fb_memcpy() variant which checks the clip rectangle for the destination too. Common code between drm_fb_memcpy() and drm_fb_memcpy_dstclip() was factored out into the drm_fb_memcpy_lines() helper function. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Noralf Trønnes <noralf@tronnes.org> Link: http://patchwork.freedesktop.org/patch/msgid/20190405095219.9231-3-kraxel@redhat.com
2019-04-08drm: move tinydrm format conversion helpers to new drm_format_helper.cGerd Hoffmann
Also rename them from tinydrm_* to drm_fb_* Pure code motion, no functional change. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Reviewed-by: Noralf Trønnes <noralf@tronnes.org> Link: http://patchwork.freedesktop.org/patch/msgid/20190405095219.9231-2-kraxel@redhat.com
2019-04-05Documentation/gpu/meson: Remove link to meson_canvas.cSean Paul
The file was removed in the below patch and is causing this error: WARNING: kernel-doc '../scripts/kernel-doc -rst -enable-lineno -function Canvas ../drivers/gpu/drm/meson/meson_canvas.c' failed with return code Fixes: 2bf6b5b0e374 ("drm/meson: exclusively use the canvas provider module") Cc: Maxime Jourdan <mjourdan@baylibre.com> Cc: Neil Armstrong <narmstrong@baylibre.com> Cc: Kevin Hilman <khilman@baylibre.com> Cc: dri-devel@lists.freedesktop.org Cc: linux-amlogic@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20190403205652.183496-1-sean@poorly.run
2019-04-05Merge tag 'drm-misc-next-2019-04-04' of ↵Dave Airlie
git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for 5.2: UAPI Changes: -syncobj: Add TIMELINE_WAIT|QUERY|TRANSFER|TIMELINE_SIGNAL ioctls (Chunming) -Clarify that 1.0 can be represented by drm_color_lut (Daniel) Cross-subsystem Changes: -dt-bindings: Add binding for rk3066 hdmi (Johan) -dt-bindings: Add binding for Feiyang FY07024DI26A30-D panel (Jagan) -dt-bindings: Add Rocktech vendor prefix and jh057n00900 panel bindings (Guido) -MAINTAINERS: Add lima and ASPEED entries (Joel & Qiang) Core Changes: -memory: use dma_alloc_coherent when mem encryption is active (Christian) -dma_buf: add support for a dma_fence chain (Christian) -shmem_gem: fix off-by-one bug in new shmem gem helpers (Dan) Driver Changes: -rockchip: Add support for rk3066 hdmi (Johan) -ASPEED: Add driver supporting ASPEED BMC display controller to drm (Joel) -lima: Add driver supporting Arm Mali4xx gpus to drm (Qiang) -vc4/v3d: Various cleanups and improved error handling (Eric) -panel: Add support for Feiyang FY07024DI26A30-D MIPI-DSI panel (Jagan) -panel: Add support for Rocktech jh057n00900 MIPI-DSI panel (Guido) Cc: Johan Jonker <jbx6244@gmail.com> Cc: Christian König <christian.koenig@amd.com> Cc: Chunming Zhou <david1.zhou@amd.com> Cc: Dan Carpenter <dan.carpenter@oracle.com> Cc: Eric Anholt <eric@anholt.net> Cc: Qiang Yu <yuq825@gmail.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Guido Günther <agx@sigxcpu.org> Cc: Joel Stanley <joel@jms.id.au> [airlied: fixed XA limit build breakage, Rodrigo also submitted the same patch, but I squashed it in the merge.] Signed-off-by: Dave Airlie <airlied@redhat.com> From: Sean Paul <sean@poorly.run> Link: https://patchwork.freedesktop.org/patch/msgid/20190404201016.GA139524@art_vandelay
2019-04-04drm/pl111: fix possible object reference leakWen Yang
The call to of_find_matching_node_and_match returns a node pointer with refcount incremented thus it must be explicitly decremented after the last usage. Detected by coccinelle with the following warnings: drivers/gpu/drm/pl111/pl111_versatile.c:333:3-9: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 317, but without a corresponding object release within this function. drivers/gpu/drm/pl111/pl111_versatile.c:340:3-9: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 317, but without a corresponding object release within this function. drivers/gpu/drm/pl111/pl111_versatile.c:346:3-9: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 317, but without a corresponding object release within this function. drivers/gpu/drm/pl111/pl111_versatile.c:354:2-8: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 317, but without a corresponding object release within this function. drivers/gpu/drm/pl111/pl111_versatile.c:395:3-9: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 317, but without a corresponding object release within this function. drivers/gpu/drm/pl111/pl111_versatile.c:402:1-7: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 317, but without a corresponding object release within this function. Signed-off-by: Wen Yang <wen.yang99@zte.com.cn> Cc: Eric Anholt <eric@anholt.net> (supporter:DRM DRIVER FOR ARM PL111 CLCD) Cc: David Airlie <airlied@linux.ie> (maintainer:DRM DRIVERS) Cc: Daniel Vetter <daniel@ffwll.ch> (maintainer:DRM DRIVERS) Cc: dri-devel@lists.freedesktop.org (open list:DRM DRIVERS) Cc: linux-kernel@vger.kernel.org (open list) Signed-off-by: Eric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/1554307455-40361-6-git-send-email-wen.yang99@zte.com.cn
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