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2020-07-27arm64: dts: qcom: SDM845: Enable GPU DDR bw scalingSharat Masetty
This patch adds the interconnects property for the gpu node and the opp-peak-kBps property to the opps of the gpu opp table. This should help enable DDR bandwidth scaling dynamically and proportionally to the GPU frequency. Signed-off-by: Sharat Masetty <smasetty@codeaurora.org> Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org> Link: https://lore.kernel.org/r/1594992579-20662-5-git-send-email-akhilpo@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: sc7180: Add support for context losing replicatorSai Prakash Ranjan
Add "qcom,replicator-loses-context" property to the replicator in Always-on domain in SC7180 SoC to enable coresight replicator driver to handle this variation of replicator designs. Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Link: https://lore.kernel.org/r/5072d94849cfaee46748d26ac997212fb2d783c2.1591708204.git.saiprakash.ranjan@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: sc7180: Add iommus property to ETRSai Prakash Ranjan
Define iommus property for Coresight ETR component in SC7180 SoC with the SID and mask to enable SMMU translation for this master. Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Link: https://lore.kernel.org/r/2312c9a10e7251d69e31e4f51c0f1d70e6f2f2f5.1591708204.git.saiprakash.ranjan@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: sc7180: Add support to skip powering up of ETMSai Prakash Ranjan
Add "qcom,skip-power-up" property to skip powering up ETM on SC7180 SoC to workaround a hardware errata where CPU watchdog counter is stopped when ETM power up bit is set (i.e., when TRCPDCR.PU = 1). Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Link: https://lore.kernel.org/r/8c5ff297d8c89d9d451352f189baf26c8938842a.1591708204.git.saiprakash.ranjan@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: sc7180: Add properties to qfprom for fuse blowingRavi Kumar Bokka
This patch adds properties to the qfprom node to enable fuse blowing. Signed-off-by: Ravi Kumar Bokka <rbokka@codeaurora.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20200710073439.v5.4.I70c17309f8b433e900656d7c53a2e6b61888bb68@changeid Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-21arm64: dts: qcom: sc7180: Add maximum speed property for DWC3 USB nodeSandeep Maheswaram
Adding maximum speed property for DWC3 USB node which can be used for setting interconnect bandwidth. Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Link: https://lore.kernel.org/r/1595317489-18432-3-git-send-email-sanm@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-21arm64: dts: qcom: sdm845: Support ETMv4 power managementSai Prakash Ranjan
Add "arm,coresight-loses-context-with-cpu" property to coresight ETM nodes to avoid failure of trace session because of losing context on entering deep idle states. Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Link: https://lore.kernel.org/r/20200721071343.2898-1-saiprakash.ranjan@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-18arm64: dts: qcom: pmi8998: Add nodes for LAB and IBB regulatorsNisha Kumari
This patch adds devicetree nodes for LAB and IBB regulators. Signed-off-by: Nisha Kumari <nishakumari@codeaurora.org> [sumits: Updated for better compatible strings and names] Signed-off-by: Sumit Semwal <sumit.semwal@linaro.org> Link: https://lore.kernel.org/r/20200622124110.20971-4-sumit.semwal@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-17arm64: dts: sc7180: Add DSI and MDP OPP tables and power-domainsRajendra Nayak
Add the OPP tables for DSI and MDP based on the perf state/clk requirements, and add the power-domains property to specify the scalable power domain. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Link: https://lore.kernel.org/r/1594292674-15632-5-git-send-email-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-17arm64: dts: sdm845: Add DSI and MDP OPP tables and power-domainsRajendra Nayak
Add the OPP tables for DSI and MDP based on the perf state/clk requirements, and add the power-domains property to specify the scalable power domain. Tested-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Link: https://lore.kernel.org/r/1594292674-15632-4-git-send-email-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-16arm64: dts: qcom: sc7180: Move the fixed-perm property to SoC dtsiSibi Sankar
All the platforms using SC7180 SoC are expected to have the wlan firmware memory statically mapped by the Trusted Firmware. Hence move back the qcom,msa-fixed-perm property to the SoC dtsi. Reviewed-by: Douglas Anderson <dianders@chromium.org> Fixes: 7d484566087c0 ("arm64: dts: qcom: sc7180: Add missing properties for Wifi node") Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200716191746.23196-1-sibis@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-15arm64: dts: qcom: msm8916-samsung-a2015: Add accelerometer/magnetometerStephan Gerhold
A3U/A5U both use a Bosch BMC150 accelerometer/magnetometer combo. The chip provides two separate I2C devices for the accelerometer and magnetometer that are already supported by the bmc150-accel and bmc150-magn driver. The only difference between A3U/A5U is the way the sensor is mounted on the mainboard - set the mount-matrix in the device-specific device tree part to handle that difference. Co-developed-by: Michael Srba <michael.srba@seznam.cz> Signed-off-by: Michael Srba <michael.srba@seznam.cz> Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Link: https://lore.kernel.org/r/20200622151751.408995-5-stephan@gerhold.net Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-15arm64: dts: qcom: msm8916: Use higher I2C drive-strength only on DB410cStephan Gerhold
Commit c240f29e75e6 ("arm64: dts: set the default i2c pin drive strength to 16mA") changed the default drive-strength for I2C pins in msm8916-pins.dtsi to the maximum possible (16 mA). While this makes sense for apq8016-sbc (DB410c) where you can connect an arbitrary amount of I2C devices with level shifters etc, there is no need to use a higher drive strength for other MSM8916 devices. The minimum drive strength (2 mA) seems to be totally sufficient to have everything work there. With the short pinctrl nodes introduced earlier we can easily override the drive-strength only for apq8016-sbc now. Use that and change the default back to 2 mA. i2c1_default/i2c5_default are already using 2 mA because they were added separately later and are not used in apq8016-sbc. Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Link: https://lore.kernel.org/r/20200622151751.408995-4-stephan@gerhold.net Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-15arm64: dts: qcom: msm8916: Simplify pinctrl configurationStephan Gerhold
So far we have been separating pinctrl entries into pinmux/pinconf. It turns out it is also possible to combine them: The advantage is that the device tree is overall more concise because the "pins" to configure just need to be specified once, not separately for pinmux/pinconf. Using the simpler form only for new entries would be rather confusing. This commit makes all MSM8916 device trees use the simplfied form. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Link: https://lore.kernel.org/r/20200622151751.408995-3-stephan@gerhold.net Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-15arm64: dts: msm8916-samsung/longcheer: Move pinctrl/regulators to end of fileStephan Gerhold
It is helpful to be able to see all hardware components in one part of the device tree, without having to scroll over the large amount of regulator/pinctrl nodes. Keep those separated at the end of the file to make navigation a bit easier. This also makes it consistent with the order used in apq8016-sbc.dtsi. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Link: https://lore.kernel.org/r/20200622151751.408995-2-stephan@gerhold.net Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-15arm64: dts: qcom: sm8250: Drop tcsr_mutex sysconBjorn Andersson
Now that we don't need the intermediate syscon to represent the TCSR mutexes, update the dts to describe the TCSR mutex directly under /soc. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20200622075956.171058-5-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-15arm64: dts: qcom: sc7180: Add missing properties for Wifi nodeRakesh Pillai
The wlan firmware memory is statically mapped in the Trusted Firmware, hence the wlan driver does not need to map/unmap this region dynamically. Hence add the property to indicate the wlan driver to not map/unamp the firmware memory region dynamically. Also add the chain1 voltage supply for wlan. Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Rakesh Pillai <pillair@codeaurora.org> Link: https://lore.kernel.org/r/1594615586-17055-1-git-send-email-pillair@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-15arm64: dts: qcom: Fix WiFi supplies on sc7180-idpDouglas Anderson
The WiFi supplies that were added recently can't have done anything useful because they were missing the "-supply" suffix. Booting without the "-supply" suffix would give these messages: ath10k_snoc 18800000.wifi: 18800000.wifi supply vdd-0.8-cx-mx not found, using dummy regulator ath10k_snoc 18800000.wifi: 18800000.wifi supply vdd-1.8-xo not found, using dummy regulator ath10k_snoc 18800000.wifi: 18800000.wifi supply vdd-1.3-rfa not found, using dummy regulator ath10k_snoc 18800000.wifi: 18800000.wifi supply vdd-3.3-ch0 not found, using dummy regulator Let's add the "-supply" suffix. Tested-by: Rakesh Pillai <pillair@codeaurora.org> Reviewed-by: Rakesh Pillai <pillair@codeaurora.org> Fixes: 1e7594a38f37 ("arm64: dts: qcom: sc7180: Add WCN3990 WLAN module device node") Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20200625131658.REPOST.1.I32960cd32bb84d6db4127c906d7e371fa29caebf@changeid Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-14arm64: dts: sdm845: add Inline Crypto Engine registers and clockEric Biggers
Add the vendor-specific registers and clock for Qualcomm ICE (Inline Crypto Engine) to the device tree node for the UFS host controller on sdm845, so that the ufs-qcom driver will be able to use inline crypto. Use a separate register range rather than extending the main UFS range because there's a gap between the two, and the ICE registers are vendor-specific. (Actually, the hardware claims that the ICE range also includes the array of standard crypto configuration registers; however, on this SoC the Linux kernel isn't permitted to access them directly.) Signed-off-by: Eric Biggers <ebiggers@google.com> Link: https://lore.kernel.org/r/20200710072013.177481-4-ebiggers@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-13arm64: dts: sc7180: Add sdhc opps and power-domainsRajendra Nayak
Add the power domain supporting performance state and the corresponding OPP tables for the sdhc device on sc7180. Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Link: https://lore.kernel.org/r/1593506712-24557-5-git-send-email-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-13arm64: dts: sdm845: Add sdhc opps and power-domainsRajendra Nayak
Add the power domain supporting performance state and the corresponding OPP tables for the sdhc device on sdm845. Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Link: https://lore.kernel.org/r/1593506712-24557-4-git-send-email-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-13arm64: dts: sc7180: Add OPP table for all qup devicesRajendra Nayak
qup has a requirement to vote on the performance state of the CX domain in sc7180 devices. Add OPP tables for these and also add power-domains property for all qup instances for uart and spi. i2c does not support scaling and uses a fixed clock. Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Link: https://lore.kernel.org/r/1593506712-24557-3-git-send-email-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-13arm64: dts: sdm845: Add OPP table for all qup devicesRajendra Nayak
qup has a requirement to vote on the performance state of the CX domain in sdm845 devices. Add OPP tables for these and also add power-domains property for all qup instances for uart and spi. i2c does not support scaling and uses a fixed clock. Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/1593506712-24557-2-git-send-email-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-13arm64: dts: sc7180: Add qspi opps and power-domainsRajendra Nayak
Add the power domain supporting performance state and the corresponding OPP tables for the qspi device on sc7180 Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Link: https://lore.kernel.org/r/1593769293-6354-4-git-send-email-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-13arm64: dts: sdm845: Add qspi opps and power-domainsRajendra Nayak
Add the power domain supporting performance state and the corresponding OPP tables for the qspi device on sdm845 Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Link: https://lore.kernel.org/r/1593769293-6354-3-git-send-email-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-09arm64: dts: qcom: sdm845: Add cpu OPP tablesSibi Sankar
Add OPP tables required to scale DDR/L3 per freq-domain on SDM845 SoCs. Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200702204643.25785-1-sibis@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-08arm64: dts: qcom: sc7180: Drop the unused non-MSA SIDSibi Sankar
Having a non-MSA (Modem Self-Authentication) SID bypassed breaks modem sandboxing i.e if a transaction were to originate from it, the hardware memory protections units (XPUs) would fail to flag them (any transaction originating from modem are historically termed as an MSA transaction). Drop the unused non-MSA modem SID on SC7180 SoCs and cheza so that SMMU continues to block them. Tested-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Fixes: bec71ba243e95 ("arm64: dts: qcom: sc7180: Update Q6V5 MSS node") Fixes: 68aee4af5f620 ("arm64: dts: qcom: sdm845-cheza: Add iommus property") Cc: stable@vger.kernel.org Reported-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200630081938.8131-1-sibis@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-01arm64: dts: qcom: sdm845: Add IMEM and PIL info regionBjorn Andersson
Add a simple-mfd representing IMEM on SDM845 and define the PIL relocation info region, so that post mortem tools will be able to locate the loaded remoteprocs. Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20200622191942.255460-6-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-01arm64: dts: qcom: qcs404: Add IMEM and PIL info regionBjorn Andersson
Add a simple-mfd representing IMEM on QCS404 and define the PIL relocation info region, so that post mortem tools will be able to locate the loaded remoteprocs. Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20200622191942.255460-5-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-30arm64: dts: qcom: sc7180: Add cpu OPP tablesSibi Sankar
Add OPP tables required to scale DDR/L3 per freq-domain on SC7180 SoCs. Reviewed-by: Douglas Anderson <dianders@chromium.org> Tested-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200626190808.8716-1-sibis@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-24arm64: dts: sc7180: Add interconnect for QUP and QSPIAkash Asthana
Add interconnect ports for GENI QUPs and QSPI to set bus capabilities. Signed-off-by: Akash Asthana <akashast@codeaurora.org> Link: https://lore.kernel.org/r/1592908737-7068-9-git-send-email-akashast@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-24arm64: dts: ipq8074: enable USB supportSivaprakash Murugesan
IPQ8074 has two super speed usb ports, add phy and dwc3 nodes to enable them. Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org> Link: https://lore.kernel.org/r/1591625479-4483-6-git-send-email-sivaprak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23arm64: dts: qcom: angler: Add qcom,msm-id and pmic-idKonrad Dybcio
Add properties required for the bootloader to select the correct bootloader blob. They have been removed from the SoC device tree as they should be set on a per-device basis. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200623224813.297077-11-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23arm64: dts: qcom: msm8994: Add PSCI nodeKonrad Dybcio
Add PSCI node to enable multi-processor startup. Note that not every 8994 device firmware supports PSCI, and even if, then it can only start the cores and not shut them down. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200623224813.297077-10-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23arm64: dts: qcom: msm8994: Add pmu nodeKonrad Dybcio
Add the CPU PMU to get perf support for hardware events. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200623224813.297077-9-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23arm64: dts: qcom: msm8994: Add I2C, SPI and BLSP DMA nodesKonrad Dybcio
Add support for I2C and SPI buses to enable peripherals such as touchscreens or sensors. Also add DMA nodes, configuration and BLSP2 UART2 interface. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200623224813.297077-8-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23arm64: dts: qcom: msm8994: Add SDHCI1 nodeKonrad Dybcio
Enable support for SDHCI on msm8994-based devices. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200623224813.297077-6-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23arm64: dts: qcom: msm8994: Add a proper CPU mapKonrad Dybcio
Add a proper CPU map to enable the use of all 8 cores. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200623224813.297077-4-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23arm64: dts: qcom: msm8994: Add SPMI PMIC arbiter deviceKonrad Dybcio
Add SPMI PMIC arbiter device to communicate with PMICs attached to SPMI bus. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200623224813.297077-3-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23arm64: dts: qcom: msm8994: Modernize the DTS styleKonrad Dybcio
Following changes have been made: - remove name, compatible and msm-id - wrap clocks in clocks{} - order nodes by name and by address - clock_gcc -> gcc - msmgpio -> tlmm - qcom,smem -> smem - remove unit-address from smem - retire msm8994-pins.dtsi - add some of the missing pins - make comments C-style Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200623224813.297077-2-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23arm64: dts: qcom: sm8250: Add remoteprocsBjorn Andersson
Add remoteproc nodes for the audio, compute and sensor cores, define glink for each one and enable them on the MTP with appropriate firmware defined. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20200622222747.717306-6-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23arm64: dts: qcom: sm8250: Add SMP2P nodesBjorn Andersson
SMP2P is used for interrupting and being interrupted about remoteproc state changes related to the audio, compute and sensor subsystems. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20200622222747.717306-5-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23arm64: dts: qcom: sm8250: Add QMP AOSS nodeBjorn Andersson
Add a node for the QMP AOSS. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20200622222747.717306-4-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23arm64: dts: qcom: sm8250: Add IPCCBjorn Andersson
Add the IPCC node, used to send and receive IPC signals with remoteprocs. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20200622222747.717306-3-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23arm64: dts: qcom: sm8250-mtp: Drop PM8150 ldo11Bjorn Andersson
PM8150 ldo11 on the MTP is wired to VDD_SSC_CX and controlled in levels, rather than as a regulator. As such it's available from the rpmhpd as the SM8250_LCX power domain. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Fixes: ec13d5c23a33 ("arm64: dts: qcom: sm8250-mtp: Add pm8150, pm8150l and pm8009") Link: https://lore.kernel.org/r/20200622222747.717306-2-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23arm64: dts: qcom: Add support for Sony Xperia 10/10 Plus (Ganges platform)Martin Botka
Add device tree support for the Sony Xperia 10 and 10 Plus smartphones. They are all based on the Sony Ganges platform (sdm630/636) and share a lot of common code. The differences are really minor, so a Ganges-common DTSI has been created to reduce clutter. 10 - Kirin 10 Plus - Mermaid This platform is based on SoMC Nile, but there are some major differences when it comes to pin configuration and panel setup (among others). The boards currently support: * Screen console * SDHCI * I2C * pstore log dump * GPIO keys * PSCI idle states Signed-off-by: Martin Botka <martin.botka1@gmail.com> Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Tested-by: Martin Botka <martin.botka1@gmail.com> Link: https://lore.kernel.org/r/20200622192558.152828-7-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23arm64: dts: qcom: Add support for Sony Xperia XA2/Plus/Ultra (Nile platform)Konrad Dybcio
Add device tree support for the Sony Xperia XA2, XA2 Plus and XA2 Ultra smartphones. They are all based on the Sony Nile platform (sdm630) and share a lot of common code. The differences are really minor, so a Nile-common DTSI has been created to reduce clutter. XA2 - Pioneer XA2 Plus - Voyager XA2 Ultra - Discovery The boards currently support: * Screen console * SDHCI * I2C * pstore log dump * GPIO keys * PSCI idle states Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Tested-by: Łukasz Patron <priv.luk@gmail.com> Link: https://lore.kernel.org/r/20200622192558.152828-6-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23arm64: dts: qcom: sdm630: Add sdm630 dts fileKonrad Dybcio
Add devicetree files for SDM630 SoC and its pin configuration. This commit adds basic nodes like cpu, psci and other required configuration for booting up from eMMC to the serial console. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200622192558.152828-5-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-23arm64: dts: qcom: pm660(l): Add base dts filesKonrad Dybcio
Add base DTS files for pm660(l) along with GPIOs, power-on and rtc nodes. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200622192558.152828-4-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-21arm64: dts: qcom: sm8250: add I2C and SPI nodesDmitry Baryshkov
Much like SDM845 each serial engine has 4 pins attached. Add all possible I2C and SPI nodes for all 20 serial engines. Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20200606131300.3874987-1-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
generated by cgit v1.2.3 (git 2.39.1) at 2025-07-29 08:15:02 +0000