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2021-01-11spi: cadence-quadspi: Fix build warning on 32-bit platformsPratyush Yadav
The kernel test robot reports the following warning. drivers/spi/spi-cadence-quadspi.c:966:24: warning: comparison of distinct pointer types ('typeof (len) *' (aka 'unsigned int *') and 'typeof (500UL) *' (aka 'unsigned long *')) [-Wcompare-distinct-pointer-types] msecs_to_jiffies(max(len, 500UL)))) { ^~~~~~~~~~~~~~~ include/linux/minmax.h:58:19: note: expanded from macro 'max' #define max(x, y) __careful_cmp(x, y, >) ^~~~~~~~~~~~~~~~~~~~~~ include/linux/minmax.h:42:24: note: expanded from macro '__careful_cmp' __builtin_choose_expr(__safe_cmp(x, y), \ ^~~~~~~~~~~~~~~~ include/linux/minmax.h:32:4: note: expanded from macro '__safe_cmp' (__typecheck(x, y) && __no_side_effects(x, y)) ^~~~~~~~~~~~~~~~~ include/linux/minmax.h:18:28: note: expanded from macro '__typecheck' (!!(sizeof((typeof(x) *)1 == (typeof(y) *)1))) ~~~~~~~~~~~~~~ ^ ~~~~~~~~~~~~~~ 1 warning generated. This happens because size_t is unsigned long on 64-bit platforms like arm64 but it is unsigned int on 32-bit platforms like arm. Omitting the "UL" would result in a warning on 64-bit platforms. Squash it by type casting the arguments to size_t using max_t(). This way builds on both type of platforms can be satisfied. There is no chance of any truncation since 500 is small enough to fit into both int and long. Fixes: f453f293979f ("spi: cadence-quadspi: Wait at least 500 ms for direct reads") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20210108181457.30291-1-p.yadav@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-01-11spi: spi-bcm-qspi: style: Simplify bool comparisonYANG LI
Fix the following coccicheck warning: ./drivers/spi/spi-bcm-qspi.c:884:5-34: WARNING: Comparison to bool Signed-off-by: YANG LI <abaci-bugfix@linux.alibaba.com> Reported-by: Abaci Robot<abaci@linux.alibaba.com> Link: https://lore.kernel.org/r/1610357189-60031-1-git-send-email-abaci-bugfix@linux.alibaba.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-01-08spi: renesas,sh-msiof: Add r8a779a0 supportWolfram Sang
Document R-Car V3U (R8A779A0) SoC bindings. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20210108103522.2025880-1-geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
2021-01-08spi: Fix distinct pointer types warning for ARCH=mipsYanteng Si
Fix a new warning report by build for make ARCH=MIPS allmodconfig: drivers/spi/spi-cadence-quadspi.c: In function 'cqspi_direct_read_execute': ./include/linux/minmax.h:18:28: warning: comparison of distinct pointer types lacks a cast 18 | (!!(sizeof((typeof(x) *)1 == (typeof(y) *)1))) | ^~ ./include/linux/minmax.h:32:4: note: in expansion of macro '__typecheck' 32 | (__typecheck(x, y) && __no_side_effects(x, y)) | ^~~~~~~~~~~ ./include/linux/minmax.h:42:24: note: in expansion of macro '__safe_cmp' 42 | __builtin_choose_expr(__safe_cmp(x, y), \ | ^~~~~~~~~~ ./include/linux/minmax.h:58:19: note: in expansion of macro '__careful_cmp' 58 | #define max(x, y) __careful_cmp(x, y, >) | ^~~~~~~~~~~~~ drivers/spi/spi-cadence-quadspi.c:1153:24: note: in expansion of macro 'max' 1153 | msecs_to_jiffies(max(len, 500UL)))) { | ^~~ "len" is unsigned,however,"500" is unsigned long. Signed-off-by: Yanteng Si <siyanteng@loongson.cn> Link: https://lore.kernel.org/r/20210107115704.3835282-1-siyanteng@loongson.cn Signed-off-by: Mark Brown <broonie@kernel.org>
2021-01-06Merge series "Add Tegra Quad SPI driver" from Sowjanya Komatineni ↵Mark Brown
<skomatineni@nvidia.com>: This series adds Tegra210, Tegra186, and Tegra194 Quad SPI driver and enables Quad SPI on Jetson Nano and Jetson Xavier NX. QSPI controller is available on Tegra210, Tegra186 and Tegra194. Tegra186 and Tegra194 has additional feature of combined sequence mode where command, address and data can all be transferred in a single transfer. Combined sequence mode is useful only when using DMA mode transfer. This series does not have combined sequence mode feature as Tegra186/Tegra194 GPCDMA driver is not upstreamed yet. This series includes - dt-binding document - QSPI driver for Tegra210/Tegra186/Tegra194 - Enables QSPI on Jetson Nano and Jetson Xavier NX. Delta between patch versions: [v5]: Simplified implementation in Patch-0006 [v4]: Updated dummy cycles implementation based on v3 feedback - Added dummy_data bit field int spi_transfer to indicate corresponding transfer is dummy bytes transfer. - Updated Tegra QSPI transfer_one_message to identify dummy transfer and to use HW supported dummy bytes transfer when dummy cycles are with in Tegra QSPI supported max HW dummy cycles otherwise fallsback to transfer dummy bytes from software. - Updated dt-bindings based on v3 feedback. [v3]: v2 has some mixed patches sent out accidentally. v3 sends proper patches with fixes mentioned in v2. [v2]: below v1 feedback - Added SPI_MASTER_USES_HW_DUMMY_CYCLES flag for controllers supporting hardware dummy cycles and skips dummy bytes transfer from software for these controllers. - Updated dt-binding doc with tx/rx tap delay properties. - Added qspi_out clock to dt-binding doc which will be used later with ddr mode support. - All other v1 feedback on some cleanup. Sowjanya Komatineni (9): dt-bindings: clock: tegra: Add clock ID TEGRA210_CLK_QSPI_PM dt-bindings: spi: Add Tegra Quad SPI device tree binding MAINTAINERS: Add Tegra Quad SPI driver section spi: tegra210-quad: Add support for Tegra210 QSPI controller spi: spi-mem: Mark dummy transfers by setting dummy_data bit spi: tegra210-quad: Add support for hardware dummy cycles transfer arm64: tegra: Enable QSPI on Jetson Nano arm64: tegra: Add QSPI nodes on Tegra194 arm64: tegra: Enable QSPI on Jetson Xavier NX .../bindings/spi/nvidia,tegra210-quad.yaml | 117 ++ MAINTAINERS | 8 + .../dts/nvidia/tegra194-p3509-0000+p3668-0000.dts | 12 + arch/arm64/boot/dts/nvidia/tegra194.dtsi | 28 + arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts | 12 + arch/arm64/boot/dts/nvidia/tegra210.dtsi | 5 +- drivers/spi/Kconfig | 9 + drivers/spi/Makefile | 1 + drivers/spi/spi-mem.c | 1 + drivers/spi/spi-tegra210-quad.c | 1410 ++++++++++++++++++++ include/dt-bindings/clock/tegra210-car.h | 2 +- include/linux/spi/spi.h | 2 + 12 files changed, 1604 insertions(+), 3 deletions(-) create mode 100644 Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml create mode 100644 drivers/spi/spi-tegra210-quad.c -- 2.7.4
2021-01-06spi: tegra210-quad: Add support for hardware dummy cycles transferSowjanya Komatineni
Tegra Quad SPI controller hardware supports sending dummy bytes based on programmed dummy clock cycles after the actual transfer bytes. This patch adds this support of hardware dummy bytes transfer and skips transfer of dummy bytes from the software. For dummy cycles more than Tegra Quad SPI hardware maximum dummy cycles limit, driver transfers dummy bytes from the software. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Link: https://lore.kernel.org/r/1608585459-17250-7-git-send-email-skomatineni@nvidia.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-01-06spi: spi-mem: Mark dummy transfers by setting dummy_data bitSowjanya Komatineni
This patch marks dummy transfer by setting dummy_data bit to 1. Controllers supporting dummy transfer by hardware use this bit field to skip software transfer of dummy bytes and use hardware dummy bytes transfer. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Link: https://lore.kernel.org/r/1608585459-17250-6-git-send-email-skomatineni@nvidia.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-01-06spi: tegra210-quad: Add support for Tegra210 QSPI controllerSowjanya Komatineni
Tegra SoC has a Quad SPI controller starting from Tegra210. This patch adds support for Tegra210 QSPI controller. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Link: https://lore.kernel.org/r/1608585459-17250-5-git-send-email-skomatineni@nvidia.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-01-06MAINTAINERS: Add Tegra Quad SPI driver sectionSowjanya Komatineni
Add maintainers and mailing list entries to Tegra Quad SPI driver section. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Link: https://lore.kernel.org/r/1608585459-17250-4-git-send-email-skomatineni@nvidia.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-01-06dt-bindings: spi: Add Tegra Quad SPI device tree bindingSowjanya Komatineni
This patch adds YAML based device tree binding document for Tegra Quad SPI driver. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Link: https://lore.kernel.org/r/1608585459-17250-3-git-send-email-skomatineni@nvidia.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-01-06dt-bindings: clock: tegra: Add clock ID TEGRA210_CLK_QSPI_PMSowjanya Komatineni
Tegra210 QSPI clock output has divider DIV2_SEL which will be enabled when using DDR interface mode. This patch adds clock ID for this to dt-binding. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Link: https://lore.kernel.org/r/1608585459-17250-2-git-send-email-skomatineni@nvidia.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-01-06spi: cadence-quadspi: Add DTR supportPratyush Yadav
Double Transfer Rate (DTR) mode transfers data twice per clock cycle. Add support for parsing DTR ops and set up the registers to allow it. Most SPI NOR flashes expect 2 byte commands. Parse the 2-byte opcode from SPI MEM and set it up in the CQSPI_REG_OP_EXT_LOWER register. Increment the delay needed before issuing indirect writes because larger delay is needed for DTR mode. With the current delay some writes end up missing. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20201222184425.7028-8-p.yadav@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-01-06spi: cadence-quadspi: Wait at least 500 ms for direct readsPratyush Yadav
When performing a direct read via DMA the timeout for completion is set equal to the read length. This is fine for larger reads. For a small read like the Read Status Register command, the timeout would be 1 or 2 milliseconds. This is not enough to cover the overhead needed in setting up DMA. Make sure the timeout is at least 500 ms to allow DMA ample time to finish. For reads larger than 500 bytes, the timeout will continue to be equal to the read length. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Reported-by: kernel test robot <lkp@intel.com> Link: https://lore.kernel.org/r/20201222184425.7028-7-p.yadav@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-01-06spi: cadence-quadspi: Implement a simple supports_op hookPratyush Yadav
The default SPI MEM supports_op hook rejects DTR ops by default. Add a simple supports_op hook that very closely imitates the SPI MEM one. It will be extended in later commits to allow DTR ops. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20201222184425.7028-6-p.yadav@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-01-06spi: cadence-quadspi: Fix dummy cycle calculation when buswidth > 1Pratyush Yadav
SPI MEM deals with dummy bytes but the controller deals with dummy cycles. Multiplying bytes by 8 is correct if the dummy phase uses 1S mode since 1 byte will be sent in 8 cycles. But if the dummy phase uses 4S mode then 1 byte will be sent in 2 cycles. To correctly translate dummy bytes to dummy cycles, the dummy buswidth also needs to be taken into account. Divide 8 by the buswidth to get the correct multiplier for getting the number of cycles. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20201222184425.7028-5-p.yadav@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-01-06spi: cadence-quadspi: Set dummy cycles from STIG commandsPratyush Yadav
If a command does not have an address phase it goes via the STIG path. The dummy cycles are not initialized for the STIG commands. As a result, STIG commands with dummy cycles will not work. Initialize the dummy cycle field before issuing the STIG command to make sure it is sent correctly. Move the code to calculate dummy cycle value to a separate function so it is not repeated twice. DTR support will add some more logic here to it is worth it to extract it out in a function. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20201222184425.7028-4-p.yadav@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-01-06spi: cadence-quadspi: Abort read if dummy cycles required are too manyPratyush Yadav
The controller can only support up to 31 dummy cycles. If the command requires more it falls back to using 31. This command is likely to fail because the correct number of cycles are not waited upon. Rather than silently issuing an incorrect command, fail loudly so the caller can get a chance to find out the command can't be supported by the controller. Fixes: 140623410536 ("mtd: spi-nor: Add driver for Cadence Quad SPI Flash Controller") Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20201222184425.7028-3-p.yadav@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-01-06spi: cadence-quadspi: Set master max_speed_hzPratyush Yadav
As of commit 9326e4f1e5dd ("spi: Limit the spi device max speed to controller's max speed"), the SPI device max speed is set to the controller's max speed if it is larger. The Cadence QSPI controller does not set the controller's max speed so it is left at its initial value of 0. This means the SPI device max speed is always set to 0. The SPI device max speed is used to calculate the baud rate divider when performing an operation. If this speed is 0, the default divider of 32 is used. No matter what speed is specified by the device tree property 'spi-max-frequency', the device will always operate at ref_clk / 32. Fix this by setting master->max_speed_hz to the ref clock speed so the correct divider can be calculated. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20201222184425.7028-2-p.yadav@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-01-05spi: txx9: Remove driverThomas Bogendoerfer
CPU support for TX49xx is getting removed, so remove support SPI driver for it. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Link: https://lore.kernel.org/r/20210105140305.141401-5-tsbogend@alpha.franken.de Signed-off-by: Mark Brown <broonie@kernel.org>
2021-01-05spi: stm32: update dev_dbg() print format for SPI paramsAlexandru Ardelean
With the introduction of the 'include/uapi/linux/spi/spi.h' header, the type of the macros are enforced to 'unsigned long int' via the _BITUL() macro. This causes some -Wformat warnings in the spi-stm32 driver. This patch adds a double-negation operator to the bit-masks. Essentially, the important values for debugging are 0 or 1, while masking them directly would show 0 or BIT(x) values. This way, the type of the arguments are automatically re-cast. Fixes: f7005142dace ("spi: uapi: unify SPI modes into a single spi.h header") Reported-by: kernel test robot <lkp@intel.com> Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20210104143103.56510-1-alexandru.ardelean@analog.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-01-04spi: renesas rpc-if: Update Add RZ/G2 to Kconfig descriptionAdam Ford
The SPI driver for the Renesas RPC-IF is present on the RZ/G2 Series. Add that to the description. Suggested-by: Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20210102115412.3402059-3-aford173@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-12-31spi: rpc-if: Remove CONFIG_PM_SLEEP ifdeferyLad Prabhakar
Use __maybe_unused for the suspend()/resume() hooks and get rid of the CONFIG_PM_SLEEP ifdefery to improve the code. Suggested-by: Pavel Machek <pavel@denx.de> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Acked-by: Pavel Machek <pavel@denx.de> Link: https://lore.kernel.org/r/20201230145708.28544-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-12-28spi: dt-bindings: document zero value for spi-{rx,tx}-bus-width propertiesAlexandru Ardelean
Following a change to the SPI framework, providing a value of zero for 'spi-rx-bus-width' and 'spi-tx-bus-width' is now possible and will essentially mean that no RX or TX is allowed. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Link: https://lore.kernel.org/r/20201221152936.53873-3-alexandru.ardelean@analog.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-12-28spi: Add SPI_NO_TX/RX supportDragos Bogdan
Transmit/receive only is a valid SPI mode. For example, the MOSI/TX line might be missing from an ADC while for a DAC the MISO/RX line may be optional. This patch adds these two new modes: SPI_NO_TX and SPI_NO_RX. This way, the drivers will be able to identify if any of these two lines is missing and to adjust the transfers accordingly. Signed-off-by: Dragos Bogdan <dragos.bogdan@analog.com> Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Link: https://lore.kernel.org/r/20201221152936.53873-2-alexandru.ardelean@analog.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-12-28spi: uapi: unify SPI modes into a single spi.h headerAlexandru Ardelean
This change moves all the SPI mode bits into a separate 'spi.h' header in uAPI. This is meant to re-use these definitions inside the kernel as well as export them to userspace (via uAPI). The SPI mode definitions have usually been duplicated between between 'include/linux/spi/spi.h' and 'include/uapi/linux/spi/spidev.h', so whenever adding a new entry, this would need to be put in both headers. They've been moved from 'include/linux/spi/spi.h', since that seems a bit more complete; the bits have descriptions and there is the SPI_MODE_X_MASK. This change also does a conversion of these bitfields to _BITUL() macro. Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Link: https://lore.kernel.org/r/20201221152936.53873-1-alexandru.ardelean@analog.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-12-28spi: orion: enable support for switching CS every transferred byteMarcin Wojtas
Some SPI devices, require toggling the CS every transferred byte. Enable such possibility in the spi-orion driver. Note that in order to use it, in the driver of a secondary device attached to this controller, the SPI bus 'mode' field must be updated with SPI_CS_WORD flag before calling spi_setup() routine. In addition to that include a work-around - some devices, such as certain models of SLIC (Subscriber Line Interface Card), may require extra delay after CS toggling, so add a minimal timing relaxation in relevant places. Signed-off-by: Marcin Wojtas <mw@semihalf.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Link: https://lore.kernel.org/r/20201223103827.29721-3-kostap@marvell.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-12-28spi: orion: enable clocks before spi_setupMarcin Wojtas
The spi-orion driver disables its clocks whenever it is not used. In usual case during boot (i.e. using SPI flash) it is not a problem, as the child device driver is present and probed along with spi_register_master() execution. However in case the child device driver is not ready (e.g. when its type is module_spi_driver) the spi_setup() callback can be called after the spi-orion probe. It may happen, that as a result there will be an attempt to access controller's registers with the clocks disabled. Prevent such situations and make sure the clocks are on, each time the spi_setup() is called. Signed-off-by: Marcin Wojtas <mw@semihalf.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Link: https://lore.kernel.org/r/20201223103827.29721-2-kostap@marvell.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-12-28Merge existing fixes from spi/for-5.11Mark Brown
2020-12-27Linux 5.11-rc1v5.11-rc1Linus Torvalds
2020-12-27proc mountinfo: make splice available againLinus Torvalds
Since commit 36e2c7421f02 ("fs: don't allow splice read/write without explicit ops") we've required that file operation structures explicitly enable splice support, rather than falling back to the default handlers. Most /proc files use the indirect 'struct proc_ops' to describe their file operations, and were fixed up to support splice earlier in commits 40be821d627c..b24c30c67863, but the mountinfo files interact with the VFS directly using their own 'struct file_operations' and got missed as a result. This adds the necessary support for splice to work for /proc/*/mountinfo and friends. Reported-by: Joan Bruguera Micó <joanbrugueram@gmail.com> Reported-by: Jussi Kivilinna <jussi.kivilinna@iki.fi> Link: https://bugzilla.kernel.org/show_bug.cgi?id=209971 Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Christoph Hellwig <hch@lst.de> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-12-27Merge tag 'ntb-5.11' of git://github.com/jonmason/ntbLinus Torvalds
Pull NTB fixes from Jon Mason: "Bug fix for IDT NTB and Intel NTB LTR management support" * tag 'ntb-5.11' of git://github.com/jonmason/ntb: ntb: intel: add Intel NTB LTR vendor support for gen4 NTB ntb: idt: fix error check in ntb_hw_idt.c
2020-12-27Merge branch 'linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6 Pull crypto fixes from Herbert Xu: "Fix a number of autobuild failures due to missing Kconfig dependencies" * 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: crypto: qat - add CRYPTO_AES to Kconfig dependencies crypto: keembay - Add dependency on HAS_IOMEM crypto: keembay - CRYPTO_DEV_KEEMBAY_OCS_AES_SM4 should depend on ARCH_KEEMBAY
2020-12-27Merge tag 'objtool-urgent-2020-12-27' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull objtool fix from Ingo Molnar: "Fix a segfault that occurs when built with Clang" * tag 'objtool-urgent-2020-12-27' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: objtool: Fix seg fault with Clang non-section symbols
2020-12-27Merge tag 'locking-urgent-2020-12-27' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull locking fixes from Ingo Molnar: "Misc fixes/updates: - Fix static keys usage in module __init sections - Add separate MAINTAINERS entry for static branches/calls - Fix lockdep splat with CONFIG_PREEMPTIRQ_EVENTS=y tracing" * tag 'locking-urgent-2020-12-27' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: softirq: Avoid bad tracing / lockdep interaction jump_label/static_call: Add MAINTAINERS jump_label: Fix usage in module __init
2020-12-27Merge tag 'timers-urgent-2020-12-27' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull timer fixes from Ingo Molnar: "Update/fix two CPU sanity checks in the hotplug and the boot code, and fix a typo in the Kconfig help text. [ Context: the first two commits are the result of an ongoing annotation+review work of (intentional) tick_do_timer_cpu() data races reported by KCSAN, but the annotations aren't fully cooked yet ]" * tag 'timers-urgent-2020-12-27' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: timekeeping: Fix spelling mistake in Kconfig "fullfill" -> "fulfill" tick/sched: Remove bogus boot "safety" check tick: Remove pointless cpu valid check in hotplug code
2020-12-27Merge tag 'sched-urgent-2020-12-27' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull scheduler fix from Ingo Molnar: "Fix a context switch performance regression" * tag 'sched-urgent-2020-12-27' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: sched: Optimize finish_lock_switch()
2020-12-26mfd: ab8500-debugfs: Remove extraneous seq_putcLinus Torvalds
Commit c9a3c4e637ac ("mfd: ab8500-debugfs: Remove extraneous curly brace") removed a left-over curly brace that caused build failures, but Joe Perches points out that the subsequent 'seq_putc()' should also be removed, because the commit that caused all these problems already added the final '\n' to the seq_printf() above it. Reported-by: Joe Perches <joe@perches.com> Fixes: 886c8121659d ("mfd: ab8500-debugfs: Remove the racy fiddling with irq_desc") Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Nathan Chancellor <natechancellor@gmail.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-12-25Merge tag 'pci-v5.11-fixes-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI fixes from Bjorn Helgaas: - Fix a tegra enumeration regression (Rob Herring) - Fix a designware-host check that warned on *success*, not failure (Alexander Lobakin) * tag 'pci-v5.11-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: PCI: dwc: Fix inverted condition of DMA mask setup warning PCI: tegra: Fix host link initialization
2020-12-25mfd: ab8500-debugfs: Remove extraneous curly braceNathan Chancellor
Clang errors: drivers/mfd/ab8500-debugfs.c:1526:2: error: non-void function does not return a value [-Werror,-Wreturn-type] } ^ drivers/mfd/ab8500-debugfs.c:1528:2: error: expected identifier or '(' return 0; ^ drivers/mfd/ab8500-debugfs.c:1529:1: error: extraneous closing brace ('}') } ^ 3 errors generated. The cleanup in ab8500_interrupts_show left a curly brace around, remove it to fix the error. Fixes: 886c8121659d ("mfd: ab8500-debugfs: Remove the racy fiddling with irq_desc") Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-12-25PCI: dwc: Fix inverted condition of DMA mask setup warningAlexander Lobakin
Commit 660c486590aa ("PCI: dwc: Set 32-bit DMA mask for MSI target address allocation") added dma_mask_set() call to explicitly set 32-bit DMA mask for MSI message mapping, but for now it throws a warning on ret == 0, while dma_set_mask() returns 0 in case of success. Fix this by inverting the condition. [bhelgaas: join string to make it greppable] Fixes: 660c486590aa ("PCI: dwc: Set 32-bit DMA mask for MSI target address allocation") Link: https://lore.kernel.org/r/20201222150708.67983-1-alobakin@pm.me Signed-off-by: Alexander Lobakin <alobakin@pm.me> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2020-12-25PCI: tegra: Fix host link initializationRob Herring
Commit b9ac0f9dc8ea ("PCI: dwc: Move dw_pcie_setup_rc() to DWC common code") broke enumeration of downstream devices on Tegra: In non-working case (next-20201211): 0001:00:00.0 PCI bridge: NVIDIA Corporation Device 1ad2 (rev a1) 0001:01:00.0 SATA controller: Marvell Technology Group Ltd. Device 9171 (rev 13) 0005:00:00.0 PCI bridge: NVIDIA Corporation Device 1ad0 (rev a1) In working case (v5.10-rc7): 0001:00:00.0 PCI bridge: Molex Incorporated Device 1ad2 (rev a1) 0001:01:00.0 SATA controller: Marvell Technology Group Ltd. Device 9171 (rev 13) 0005:00:00.0 PCI bridge: Molex Incorporated Device 1ad0 (rev a1) 0005:01:00.0 PCI bridge: PLX Technology, Inc. Device 3380 (rev ab) 0005:02:02.0 PCI bridge: PLX Technology, Inc. Device 3380 (rev ab) 0005:03:00.0 USB controller: PLX Technology, Inc. Device 3380 (rev ab) The problem seems to be dw_pcie_setup_rc() is now called twice before and after the link up handling. The fix is to move Tegra's link up handling to .start_link() function like other DWC drivers. Tegra is a bit more complicated than others as it re-inits the whole DWC controller to retry the link. With this, the initialization ordering is restored to match the prior sequence. Fixes: b9ac0f9dc8ea ("PCI: dwc: Move dw_pcie_setup_rc() to DWC common code") Link: https://lore.kernel.org/r/20201218143905.1614098-1-robh@kernel.org Reported-by: Mian Yousaf Kaukab <ykaukab@suse.de> Tested-by: Mian Yousaf Kaukab <ykaukab@suse.de> Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Jonathan Hunter <jonathanh@nvidia.com> Cc: Vidya Sagar <vidyas@nvidia.com>
2020-12-25drm/amd/display: avoid uninitialized variable warningLinus Torvalds
clang (quite rightly) complains fairly loudly about the newly added mpc1_get_mpc_out_mux() function returning an uninitialized value if the 'opp_id' checks don't pass. This may not happen in practice, but the code really shouldn't return garbage if the sanity checks don't pass. So just initialize 'val' to zero to avoid the issue. Fixes: 110b055b2827 ("drm/amd/display: add getter routine to retrieve mpcc mux") Cc: Josip Pavic <Josip.Pavic@amd.com> Cc: Bindu Ramamurthy <bindu.r@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-12-25Merge tag 'perf-tools-2020-12-24' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux Pull more perf tools updates from Arnaldo Carvalho de Melo: - Refactor 'perf stat' per CPU/socket/die/thread aggregation fixing use cases in ARM machines. - Fix memory leak when synthesizing SDT probes in 'perf probe'. - Update kernel header copies related to KVM, epol_pwait. msr-index and powerpc and s390 syscall tables. * tag 'perf-tools-2020-12-24' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux: (24 commits) perf probe: Fix memory leak when synthesizing SDT probes perf stat aggregation: Add separate thread member perf stat aggregation: Add separate core member perf stat aggregation: Add separate die member perf stat aggregation: Add separate socket member perf stat aggregation: Add separate node member perf stat aggregation: Start using cpu_aggr_id in map perf cpumap: Drop in cpu_aggr_map struct perf cpumap: Add new map type for aggregation perf stat: Replace aggregation ID with a struct perf cpumap: Add new struct for cpu aggregation perf cpumap: Use existing allocator to avoid using malloc perf tests: Improve topology test to check all aggregation types perf tools: Update s390's syscall.tbl copy from the kernel sources perf tools: Update powerpc's syscall.tbl copy from the kernel sources perf s390: Move syscall.tbl check into check-headers.sh perf powerpc: Move syscall.tbl check to check-headers.sh tools headers UAPI: Synch KVM's svm.h header with the kernel tools kvm headers: Update KVM headers from the kernel sources tools headers UAPI: Sync KVM's vmx.h header with the kernel sources ...
2020-12-25Merge branch 'for-5.11' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/jlawall/linux Pull coccinelle updates from Julia Lawall. * 'for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/jlawall/linux: scripts: coccicheck: Correct usage of make coccicheck coccinelle: update expiring email addresses coccinnelle: Remove ptr_ret script kbuild: do not use scripts/ld-version.sh for checking spatch version remove boolinit.cocci
2020-12-25genirq: Fix export of irq_to_desc() for powerpc KVMMichael Ellerman
Commit 64a1b95bb9fe ("genirq: Restrict export of irq_to_desc()") removed the export of irq_to_desc() unless powerpc KVM is being built, because there is still a use of irq_to_desc() in modular code there. However it used: #ifdef CONFIG_KVM_BOOK3S_64_HV Which doesn't work when that symbol is =m, leading to a build failure: ERROR: modpost: "irq_to_desc" [arch/powerpc/kvm/kvm-hv.ko] undefined! Fix it by checking for the definedness of the correct symbol which is CONFIG_KVM_BOOK3S_64_HV_MODULE. Fixes: 64a1b95bb9fe ("genirq: Restrict export of irq_to_desc()") Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-12-25Merge branch 'work.misc' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs Pull misc vfs updates from Al Viro: "Assorted patches from previous cycle(s)..." * 'work.misc' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs: fix hostfs_open() use of ->f_path.dentry Make sure that make_create_in_sticky() never sees uninitialized value of dir_mode fs: Kill DCACHE_DONTCACHE dentry even if DCACHE_REFERENCED is set fs: Handle I_DONTCACHE in iput_final() instead of generic_drop_inode() fs/namespace.c: WARN if mnt_count has become negative
2020-12-24Merge tag 'docs-5.11-2' of git://git.lwn.net/linuxLinus Torvalds
Pull documentation fixes from Jonathan Corbet: "A small set of late-arriving, small documentation fixes" * tag 'docs-5.11-2' of git://git.lwn.net/linux: docs: admin-guide: Fix default value of max_map_count in sysctl/vm.rst Documentation/submitting-patches: Document the SoB chain Documentation: process: Correct numbering docs: submitting-patches: Trivial - fix grammatical error
2020-12-24Merge tag 'ext4_for_linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tytso/ext4 Pull ext4 updates from Ted Ts'o: "Various bug fixes and cleanups for ext4; no new features this cycle" * tag 'ext4_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tytso/ext4: (29 commits) ext4: remove unnecessary wbc parameter from ext4_bio_write_page ext4: avoid s_mb_prefetch to be zero in individual scenarios ext4: defer saving error info from atomic context ext4: simplify ext4 error translation ext4: move functions in super.c ext4: make ext4_abort() use __ext4_error() ext4: standardize error message in ext4_protect_reserved_inode() ext4: remove redundant sb checksum recomputation ext4: don't remount read-only with errors=continue on reboot ext4: fix deadlock with fs freezing and EA inodes jbd2: add a helper to find out number of fast commit blocks ext4: make fast_commit.h byte identical with e2fsprogs/fast_commit.h ext4: fix fall-through warnings for Clang ext4: add docs about fast commit idempotence ext4: remove the unused EXT4_CURRENT_REV macro ext4: fix an IS_ERR() vs NULL check ext4: check for invalid block size early when mounting a file system ext4: fix a memory leak of ext4_free_data ext4: delete nonsensical (commented-out) code inside ext4_xattr_block_set() ext4: update ext4_data_block_valid related comments ...
2020-12-24Merge tag 'Smack-for-5.11-io_uring-fix' of ↵Linus Torvalds
git://github.com/cschaufler/smack-next Pull smack fix from Casey Schaufler: "Provide a fix for the incorrect handling of privilege in the face of io_uring's use of kernel threads. That invalidated an long standing assumption regarding the privilege of kernel threads. The fix is simple and safe. It was provided by Jens Axboe and has been tested" * tag 'Smack-for-5.11-io_uring-fix' of git://github.com/cschaufler/smack-next: Smack: Handle io_uring kernel thread privileges
2020-12-24Merge tag 'riscv-for-linus-5.11-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V fix from Palmer Dabbelt "Avoid trying to initialize memory regions outside the usable range" * tag 'riscv-for-linus-5.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: RISC-V: Fix usage of memblock_enforce_memory_limit
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