summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2019-04-23drm/amd/display: 3.2.27Aric Cyr
Signed-off-by: Aric Cyr <aric.cyr@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-23drm/amd/display: Fix eDP Black screen after S4 resumeAnthony Koo
[Why] Power down of PHY on eDP requires us to call eDP power control to power on again [How] 1. In the case link rates don't match, disable PHY requires calling of eDP power control ON after 2. Link disable case limit to eDP path since this is not really applicable to DP since we do power down PHY as part of verify link cap 3. Move detection of eDP link settings to be done even for S4 resume cases where other dpcd cap read and edid read can be skipped Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-23drm/amd/display: Send DMCU messages only if FW loadedAnthony Koo
[Why] Some DMCU messages were being sent in cases where there was no DMCU FW at all, which resulted in some wait timeouts [How] Delay sending some of the DMCU messages after FW init is called and DMCU is running. Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-23drm/amd/display: Add function to copy DC streamsWenjing Liu
We'll need the ability to copy a dc_stream_state for some features. Implement it here. Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-23drm/amd/display: Allow system to enter stutter on initAnthony Koo
[Why] Workaround was missing in one HW disable path, meaning when all pipes are power gated, stutter was not working [How] Add workaround for init_hw path for stutter workaround Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-23drm/amdgpu: Check if SW SMU is supported before accessing funcsLeo Li
smu.ppt_funcs is only initialized for ASICs supporting SW SMU. On a Hawaii ASIC, attempting to access the udev attribute ATTRS{power_dpm_state} will cause a null pointer deref in amdgpu_get_dpm_state() because of this. Fix by checking if SW SMU is supported first. Signed-off-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-23drm/amd/include: Add HUBPREQ_DEBUG register offsetsLeo Li
They will be used by DC when runing ASIC-specific HUBP initialization. Signed-off-by: Leo Li <sunpeng.li@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-24Merge branch 'vmwgfx-next' of https://gitlab.freedesktop.org/drawat/linux ↵Dave Airlie
into drm-next Resource dirtying improvement by Thomas, user-space error logging improvement and some other minor fixes. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Deepak Rawat <drawat@vmware.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190423211630.61874-1-drawat@vmware.com
2019-04-23drm/amd/display: Use a reasonable timeout for framebuffer fence waitsAndrey Grodzovsky
Patch '5edb0c9b Fix deadlock with display during hanged ring recovery' was accidentaly removed during one of DALs code merges. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-23drm/amd/display: wait for fence without holding reservation lockChristian König
Don't block others while waiting for the fences to finish, concurrent submission is perfectly valid in this case and holding the lock can prevent killed applications from terminating. Signed-off-by: Christian König <ckoenig.leichtzumerken@gmail.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-23drm/amdgpu: Change VRAM lost print from ERR to INFAndrey Grodzovsky
It's normal for VRAM to lost during GPU reset and so change the log level to INFO to avoid confusing users. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-23drm/amd/powerplay: enable UMDPSTATE support on raven2 (v2)Chengming Gui
enable UMDPSTATE support to force performance level for raven2. v2: squash in warning fix (Alex) Signed-off-by: Chengming Gui <Jack.Gui@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-23drm/amd/powerplay: add set/get_power_profile_mode for Raven (v2)Chengming Gui
The power profile allows the user to adjust the power state heuristics for clock level transitions. v2: squash in warning fix (Alex) Reviewed-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Chengming Gui <Jack.Gui@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-23drm/panel: simple: Add Evervision VGG804821 panel supportMarco Felsch
Add support the Evervision VGG804821 800x480 5.0" WVGA TFT panel. Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190416100645.21689-4-m.felsch@pengutronix.de
2019-04-23dt-bindings: Add Evervision VGG804821 panelMarco Felsch
Add device tree bindings for the Evervision VG804821 800x480 5.0" LCD TFT parallel panel. Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190416100645.21689-3-m.felsch@pengutronix.de
2019-04-23dt-bindings: Add vendor prefix for Evervision ElectronicsMarco Felsch
Evervision Electronics is a panel manufacturer from Taipei. http://www.evervisionlcd.com/index.php?lang=en Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190416100645.21689-2-m.felsch@pengutronix.de
2019-04-23drm/panel: simple: Add support for EDT ET035012DM6Andreas Pretzsch
Add support for the EDT ET035012DM6 3.5" 320x240 QVGA 24-bit RGB TFT. The datasheet with all specs can be retrieved online: https://www.glynshop.com/erp/owweb/Daten/DSS/EDT/Products/ \ Specifications/Active%20Displays/ET035012DM6.pdf Signed-off-by: Andreas Pretzsch <apr@cn-eng.de> [m.felsch@pengutronix.de: adapt commit message] [m.felsch@pengutronix.de: rm unecessary comments] [m.felsch@pengutronix.de: correct data_enable polarity] Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190416101630.3482-2-m.felsch@pengutronix.de
2019-04-23dt-bindings: display: add EDT ET035012DM6 display descriptionMarco Felsch
Add support for the ET035012DM6 3.5" QVGA TFT LCD panel. The datasheet can be retrieved online: https://www.glynshop.com/erp/owweb/Daten/DSS/EDT/Products/ \ Specifications/Active%20Displays/ET035012DM6.pdf Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190416101630.3482-1-m.felsch@pengutronix.de
2019-04-23drm/panel: Remove duplicate headerSouptick Joarder
Remove duplicate header which is included twice. Signed-off-by: Souptick Joarder <jrdr.linux@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/1555183750-11028-1-git-send-email-jrdr.linux@gmail.com
2019-04-23drm/panel: simple: Add TFC S9700RTWV43TR-01B 800x480 panel supportJyri Sarha
Add support for Three Five displays TFC S9700RTWV43TR-01B 800x480 panel with resistive touch found on TI's AM335X-EVM. Signed-off-by: Jyri Sarha <jsarha@ti.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/ba4b2c26beec014b7b3c84a27b9413cec7ef2902.1553243203.git.jsarha@ti.com
2019-04-23dt-bindings: drm/panel: simple: Add binding for TFC S9700RTWV43TR-01BJyri Sarha
Add bindign for TFC S9700RTWV43TR-01B 7" Three Five Corp 800x480 LCD panel with resistive touch. The panel is found on TI AM335x-evm. Signed-off-by: Jyri Sarha <jsarha@ti.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/24fea39438decd1e17a9c9afa320d49aca03f60d.1553243203.git.jsarha@ti.com
2019-04-23drm/panel: Add support for EDT ETM0430G0DH6Marek Vasut
The EDT ETM0430G0DH6 is 4.3" 480x272 panel, which can be supported by the simple panel driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Philipp Zabel <p.zabel@pengutronix.de> Cc: Thierry Reding <treding@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190219140438.17063-2-marex@denx.de
2019-04-23dt-bindings: display: Add ETM0430G0DH6 bindingsMarek Vasut
Document the Emerging Display Technology Corp. (EDT) ETM0430G0DH6 display, which is a 480x272 4.3" TFT display. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Rob Herring <robh+dt@kernel.org> Cc: Jan Tuerk <jan.tuerk@emtrion.com> Cc: Thierry Reding <treding@nvidia.com> Cc: devicetree@vger.kernel.org Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190219140438.17063-1-marex@denx.de
2019-04-23drm/panel: simple: Fix panel_simple_dsi_probePeter Ujfalusi
In case mipi_dsi_attach() fails remove the registered panel to avoid added panel without corresponding device. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190226081153.31334-1-peter.ujfalusi@ti.com
2019-04-23drm/panel: Add OSD101T2587-53TS driverPeter Ujfalusi
The panel is similar to OSD101T2045-53TS (which is handled by panel-simple) with one big difference: osd101t2587-53ts needs MIPI_DSI_TURN_ON_PERIPHERAL message to be sent from the host to be operational and thus can not be handled by panel-simple. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190226075523.28997-5-peter.ujfalusi@ti.com
2019-04-23dt-bindings: display: Add bindings for OSD101T2587-53TS panelPeter Ujfalusi
This adds the device-tree bindings for the OSD101T2587-53TS 10.1" 1920x1200 panel from One Stop Displays. Note: the panel is similar to OSD101T2045-53TS, but it needs additional MIPI_DSI_TURN_ON_PERIPHERAL message from the host. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190226075523.28997-4-peter.ujfalusi@ti.com
2019-04-23drm/panel: simple: Add support for OSD101T2045-53TSPeter Ujfalusi
Add support for the OSD101T2045-53TS 10.1" 1920x1200 panel from One Stop Displays to the panel-simple driver Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190226075523.28997-3-peter.ujfalusi@ti.com
2019-04-23dt-bindings: display: Add bindings for OSD101T2045-53TSPeter Ujfalusi
This adds the device-tree bindings for the OSD101T2045-53TS 10.1" 1920x1200 panel from One Stop Displays. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190226075523.28997-2-peter.ujfalusi@ti.com
2019-04-23drm/panel: Add driver for Samsung S6E63M0 panelPaweł Chmiel
This patch adds Samsung S6E63M0 AMOLED LCD panel driver, connected over spi. It's based on already removed, non-device-tree S6E63M0 driver and panel-samsung-ld9040. It can be found for example in some of Samsung Aries based phones. Signed-off-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com> Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190222175153.20567-2-pawel.mikolaj.chmiel@gmail.com
2019-04-23dt-bindings: panel: Add Samsung S6E63M0 panel documentationJonathan Bakker
This commit adds documentation for Samsung S6E63M0 AMOLED LCD panel driver. Signed-off-by: Jonathan Bakker <xc-racer2@live.ca> Signed-off-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190222175153.20567-1-pawel.mikolaj.chmiel@gmail.com
2019-04-23drm/panel: simple: Add support for VXT VL050-8048NT-C01 panelFabio Estevam
Add support for the VXT VL050-8048NT-C01 800x480 panel to the panel-simple driver. This panel is used on some boards manufactured by TechNexion, such as imx7d-pico. Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190219002706.20077-3-festevam@gmail.com
2019-04-23dt-bindings: Add VXT VL050-8048NT-C01 panel bindingsFabio Estevam
The VXT VL050-8048NT-C01 is a TFT LCD panel with a 800x480 resolution connected via 24 width parallel interface. Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190219002706.20077-2-festevam@gmail.com
2019-04-23dt-bindings: Add vendor prefix for VXT LtdFabio Estevam
VXT Ltd is a manufacturer of projected capacitive touch panel and display solutions: http://www.vxt.com.tw/ Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190219002706.20077-1-festevam@gmail.com
2019-04-23dma-buf: Remove unused sync_dump()Chris Wilson
sync_dump() is an unused, unexported, function that adds 64k to the kernel image and doesn't even provide locking around the global array it uses. add/remove: 0/2 grow/shrink: 0/0 up/down: 0/-65734 (-65734) Function old new delta sync_dump 198 - -198 sync_dump_buf 65536 - -65536 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Sumit Semwal <sumit.semwal@linaro.org> Cc: Gustavo Padovan <gustavo@padovan.org> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20190419181904.6199-1-chris@chris-wilson.co.uk
2019-04-22MAINTAINERS: Add Sam as reviewer for drm/panelThierry Reding
Sam has been helping out a lot with reviewing DRM panel patches. Add him as reviewer to help him do this important work. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Link: https://patchwork.freedesktop.org/patch/msgid/20190416075910.12015-1-thierry.reding@gmail.com
2019-04-21drm/msm/a6xx: Don't enable GPU state code if dependencies are missingJordan Crouse
Add CONFIG_DRM_MSM_GPU_STATE to conditionally compile Adreno GPU state code depending on the availability of the dependencies. Reported-by: Hulk Robot <hulkci@huawei.com> Reported-by: YueHaibing <yuehaibing@huawei.com> Fixes: 1707add81551 ("drm/msm/a6xx: Add a6xx gpu state") Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-04-21dt-bindings: drm/msm/gpu: Document a5xx / a6xx zap shader regionJordan Crouse
Describe the zap-shader node that defines a reserved memory region to store the zap shader. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-04-21drm/msm/a6xx: Add zap shader loadJordan Crouse
The a6xx GPU powers on in secure mode which restricts what memory it can write to. To get out of secure mode the GPU driver can write to REG_A6XX_RBBM_SECVID_TRUST_CNTL but on targets that are "secure" that register region is blocked and writes will cause the system to go down. For those targets we need to execute a special sequence that involves loadinga special shader that clears the GPU registers and use a PM4 sequence to pull the GPU out of secure. Add support for loading the zap shader and executing the secure sequence. For targets that do not support SCM or the specific SCM sequence this should fail and we would fall back to writing the register. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-04-21drm/msm/gpu: Move zap shader loading to adrenoJordan Crouse
a5xx and a6xx both share (mostly) the same code to load the zap shader and bring the GPU out of secure mode. Move the formerly 5xx specific code to adreno to make it available for a6xx too. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-04-21dt-bindings: drm/msm/a6xx: Document interconnect properties for GPUJordan Crouse
Add documentation for the interconnect and interconnect-names bindings for the GPU node as detailed by bindings/interconnect/interconnect.txt. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-04-20drm/lima: handle shared irq case for lima_pp_bcast_irq_handlerPeter Griffin
On Hikey board all lima ip blocks are shared with one irq. This patch avoids a NULL ptr deref crash on this platform on startup. Tested with Weston and kmscube. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Cc: Rob Herring <robh@kernel.org> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Qiang Yu <yuq825@gmail.com> Signed-off-by: Qiang Yu <yuq825@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/1555662781-22570-7-git-send-email-peter.griffin@linaro.org
2019-04-19drm/msm: Split submit_lookup_objects() into two loopsKristian H. Kristensen
First loop does copy_from_user() without the table lock held and just stores the handle. Second loop looks up buffer objects with the table_lock held without potentially blocking or faulting. This lets us clean up a bunch of custom, non-faulting copy_from_user() code. Signed-off-by: Kristian H. Kristensen <hoegsberg@chromium.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-04-19drm/msm: Stop dropping struct_mutex in recover_worker()Kristian H. Kristensen
Now that we don't have the mmap_sem lock inversion, we don't need to jump through this particular hoop anymore. Signed-off-by: Kristian H. Kristensen <hoegsberg@chromium.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-04-19drm/msm: Implement .gem_free_object_unlockedKristian H. Kristensen
We use a llist and a worker to delay the object cleanup. This avoids taking mmap_sem and struct_mutex in the wrong order when calling drm_gem_object_put_unlocked() from drm_gem_mmap(). Fixes lockdep problem with copy_from_user() in msm_ioctl_gem_submit(). Signed-off-by: Kristian H. Kristensen <hoegsberg@chromium.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-04-19drm/msm/a6xx: Remove an unused struct memberJordan Crouse
The HFI tasklet was removed in df0dff1 ("drm/msm/a6xx: Poll for HFI responses") but the tasklet_struct was accidentally left behind. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-04-19msm/drm/a6xx: Turn off the GMU if resume failsJordan Crouse
Currently if the GMU resume function fails all we try to do is clear the BOOT_SLUMBER oob which usually times out and ends up in a cycle of death. If the resume function fails at any point remove any RPMh votes that might have been added and try to shut down the GMU hardware cleanly. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-04-19drm/msm/a6xx: Make GMU reset usefulJordan Crouse
Now that the GX domain is sorted we can wire up a working GMU reset. IF a GMU hang was detected then try to forcefully shut down the GMU in the power down sequence which should ensure that it can recover normally on the next power up. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-04-19drm/msm/gpu: Attach to the GPU GX power domainJordan Crouse
99.999% of the time during normal operation the GMU is responsible for power and clock control on the GX domain and the CPU remains blissfully unaware. However, there is one situation where the CPU needs to get involved: The power sequencing rules dictate that the GX needs to be turned off before the CX so that the CX can be turned on before the GX during power up. During normal operation when the CPU is taking down the CX domain a stop command is sent to the GMU which turns off the GX domain and then the CPU handles the CX domain. But if the GMU happened to be unresponsive while the GX domain was left then the CPU will need to step in and turn off the GX domain before resetting the CX and rebooting the GMU. This unfortunately means that the CPU needs to be marginally aware of the GX domain even though it is expected to usually keep its hands off. To support this we create a semi-disabled GX power domain that does nothing to the hardware on power up but tries to shut it down normally on power down. In this method the reference counting is correct and we can step in with the pm_runtime_put() at the right time during the failure path. This patch sets up the connection to the GX power domain and does the magic to "enable" and disable it at the right points. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-04-19dt-bindings: drm/msm/a6xx: Add GX power-domain for GMU bindingsJordan Crouse
The GMU should have two power domains defined: "cx" and "gx". "cx" is the actual power domain for the device and "gx" will be attached at runtime to manage reference counting on the GPU device in case of a GMU crash. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-04-19drm/msm/a6xx: Remove unwanted regulator codeJordan Crouse
The GMU code currently has some misguided code to try to work around a hardware quirk that requires the power domains on the GPU be collapsed in a certain order. Upcoming patches will do this the right way so get rid of the unused and unwanted regulator code. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
generated by cgit v1.2.3 (git 2.39.1) at 2025-07-31 00:53:16 +0000