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2019-08-23drm/amd/display: cleaned up coding error in init_hwMartin Leung
[why] during a refactor a redundant code that has unknown behaviour was added. [how] removed old bad code Fixes: 8a31820b1218 ("drm/amd/display: Make init_hw and init_pipes generic for seamless boot") Signed-off-by: Martin Leung <martin.leung@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: Add VM page fault handle implementationJaehyun Chung
[How] Allocate memory for default page and program memory block addr into default page addr register. Signed-off-by: Jaehyun Chung <jaehyun.chung@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: refactor Device ID for external chipsQingqing Zhuo
IEEE OUI will now be used while referring to certain vendors. instead of normal index Signed-off-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: Zero-out dsc init regsNikola Cornij
[why] Before a statically allocated PPS data structure, that did get zeroed-out at startup, had been re-used for making packed PPS SDP. With S3 fix, using a non-initialized PPS data structure was introduced, while wrongly assuming it'd get initialized before it's populated. As a consequence 'vbr_enable' and perhaps some other fields are left uninitialized when making packed PPS SDP. This can affect 'simple_422' as well because of the way PPS SDP packing is done (the fields are not masked first, only shifted). The behavior will be different, depending on the content of uninitialized data. [how] Zero-out PPS data structure at initialization time before it's populated Fixes: 1a9e3d4569fc ("drm/amd/display: Set DSC before DIG front-end is connected to its back-end") Signed-off-by: Nikola Cornij <nikola.cornij@amd.com> Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: Implement voltage limitation stubJoseph Gravenor
add new function to get the voltage at the end of dcn_validate_bandwidth, to check against the highest voltage we allow. Created a stub to allow for optimizations Signed-off-by: Joseph Gravenor <joseph.gravenor@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Acked-by: Sun peng Li <Sunpeng.Li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: add null checks before loggingWyatt Wood
Adding NULL checks to various parameters in log_tf, to avoid nullptr errors Signed-off-by: Wyatt Wood <wyatt.wood@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Acked-by: Nikola Cornij <Nikola.Cornij@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: set Hratio and VRatio in dmlIlya Bakoulin
Set the writeback Hratio and Vratio in dml. Signed-off-by: Ilya Bakoulin <Ilya.Bakoulin@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: fix dp stream enableDmytro Laktyushkin
A previous odm change broke stream enable by always setting n_multiply as if odm was on. This fixes the check for odm by making sure opp count is >1 rather than not 0. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: load iram for abm 2.3Josip Pavic
[Why] ABM 2.3 firmware expects information in iRAM that differs from previous versions of ABM, so a mechanism is required to provide it with that information. [How] Extend the existing iRAM definition to include parameters added by ABM 2.3, and load it if DMCU is running ABM 2.3. Signed-off-by: Josip Pavic <Josip.Pavic@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: fix MPO HUBP underflow with Scatter GatherZi Yu Liao
[why] With Scatter Gather enabled, HUBP underflows during MPO enabled video playback. hubp_init has a register write that fixes this problem, but the register is cleared when HUBP gets power gated. [how] Make a call to hubp_init during enable_plane, so that the fix can be applied after HUBP powers back on again. Signed-off-by: Zi Yu Liao <ziyu.liao@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: fix audio endpoint not getting disabled issueSu Sung Chung
[Why] Disable_audio_stream gets enum option as a paramenter which will decide if we free acquired resources or not. However checks for the option is guarded by the other condition which check if audio stream is getting diabled more than once. With both conditions combined, if we attempt to disable audio stream twice in a row, first with keep and second with free as an option, we will never free any resources, which will make system think there is audio endpoint connected even after we plug out the device [How] Get rid of option as parameter to disable_audio_stream and move the part of the code that free acquired resources to outside where to keep or to free resources is actually determined Signed-off-by: Su Sung Chung <Su.Chung@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: Delete dead code in command_table_helperJulian Parkin
[Why] dig_encoder_sel_to_atom will always return zero on any ASIC version past DCE80 since programming of the FE selection is handled by driver, but the translation code was left in the function, making it look like a coding error. [How] Remove code that has no effect, and replace with a comment describing why it returns zero. Signed-off-by: Julian Parkin <julian.parkin@amd.com> Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: re structure odm to allow 4 to 1 supportDmytro Laktyushkin
Currently odm is handled using top_bottom pipe by special casing the differing opps to differentiate from mpc combine. Since top/bottom pipe list was made to track mpc muxing this creates difficulties in adding a 4 pipe odm case support. Rather than continue using mpc combine list, this change reworks odm to use it's own linked list to keep track of odm combine pipes. This also opens up options for using mpo with odm, if a practical use case is ever found. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amdgpu: set adev->num_vmhubs for gmc6,7,8Alex Deucher
So that we properly handle them on older asics. Fixes: 3ff985485b29 ("drm/amdgpu: Export function to flush TLB of specific vm hub") Tested-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amdgpu/display: add flag for multi-display mclk switchingAlex Deucher
Add a dcfeaturemask flag for mclk switching. Disable by default; enable once the feature has seen more testing. Set amdgpu.dcfeaturemask=2 on the kernel command line in grub to enable this. Acked-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: update bw_calcs to take pipe sync into account (v3)Alex Deucher
Properly set all_displays_in_sync so that when the data is propagated to powerplay, it's set properly and we can enable mclk switching when all monitors are in sync. v2: fix logic, clean up v3: check for blending chains, simplify logic Acked-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amdgpu/powerplay/vega10: enable mclk switching if monitors are syncedAlex Deucher
If DC has synced the displays, we can enable mclk switching to save power. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amdgpu/powerplay/smu7: enable mclk switching if monitors are syncedAlex Deucher
If DC has synced the displays, we can enable mclk switching to save power. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/powerplay: Fix Vega20 power reading againKent Russell
For the 40.46 SMU release, they changed CurrSocketPower to AverageSocketPower, but this was changed back in 40.47 so just check if it's 40.46 and make the appropriate change Tested with 40.45, 40.46 and 40.47 successfully Signed-off-by: Kent Russell <kent.russell@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23amd/amdkfd: add Arcturus vf DID supportFrank.Min
Add the virtual function PCI device id. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Frank.Min <Frank.Min@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/powerpaly: fix navi series custom peak level value errorKevin Wang
fix other navi asic set peak performance level error. because the navi10_ppt.c will handle navi12 14 asic, it will use navi10 peak value to set other asic, it is not correct. after patch: only navi10 use custom peak value, other asic will used default value. Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amdgpu: correct ras error count typeGuchun Chen
Use unsigned long type for the same ras count variable. This will avoid overflow on 64 bit system. Signed-off-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23omapdrm: no need to check return value of debugfs_create functionsGreg Kroah-Hartman
When calling debugfs functions, there is no need to ever check the return value. The function can work or not, but the code logic should never do something different based on this. Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Sebastian Reichel <sebastian.reichel@collabora.com> Cc: Jyri Sarha <jsarha@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: zhong jiang <zhongjiang@huawei.com> Cc: dri-devel@lists.freedesktop.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190613115749.GC26335@kroah.com Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190704023557.4551-1-huangfq.daxian@gmail.com
2019-08-23drm/omap: Add 'alpha' and 'pixel blend mode' plane propertiesJean-Jacques Hiblot
Add the following properties for planes: * alpha * pixel blend mode. Only "Pre-multiplied" and "Coverage" are supported Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190711135219.23402-1-jjhiblot@ti.com
2019-08-23Merge branch 'linux-5.4' of git://github.com/skeggsb/linux into drm-nextDave Airlie
This is mostly just the stuff I missed last round. Various cleanup patches + fixes, improvements to display colour management, and some code to avoid loading when power cables aren't properly attached. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Ben Skeggs <skeggsb@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/CACAvsv7hqj9_VHq+YiGL8Z8XsU2vPbqbNPC=LeN1Rb0XxMQypQ@mail.gmail.com
2019-08-23drm/nouveau/volt: Fix for some cards having 0 maximum voltageMark Menzynski
Some, mostly Fermi, vbioses appear to have zero max voltage. That causes Nouveau to not parse voltage entries, thus users not being able to set higher clocks. When changing this value Nvidia driver still appeared to ignore it, and I wasn't able to find out why, thus the code is ignoring the value if it is zero. CC: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by: Mark Menzynski <mmenzyns@redhat.com> Reviewed-by: Karol Herbst <kherbst@redhat.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/dispnv50: Fix runtime PM ref tracking for non-blocking modesetsLyude Paul
This is something that got noticed a while ago back when I was fixing a large number of runtime PM related issues in nouveau, but never got fixed: https://patchwork.freedesktop.org/series/46815/#rev7 It's not safe to iterate the entire list of CRTCs in nv50_disp_atomic_commit(), as we could be doing a non-blocking modeset on one CRTC in parallel with one or more other CRTCs. Likewise, this means it's also not safe to do so in order to track runtime PM state. While this code is certainly wrong, so far the only issues I've seen this cause in the wild is the occasional PM ref unbalance after an atomic check failure + module reloading (since the PCI device will outlive nouveau in such scenarios). So, do this far more elegantly: grab a runtime PM ref across the modeset and commit tail, then grab/put references for each CRTC enable/disable. This also ends up being much simpler then the previous broken solution we had. Finally, since we've removed all it's users: get rid of nouveau_drm->have_disp_power_ref. Signed-off-by: Lyude Paul <lyude@redhat.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/dispnv04: Remove runtime PMLyude Paul
Originally when trying to fix the issue of runtime PM references with non-blocking CRTCs on nv50, I ended up stumbling on this code when trying to remove nouveau_drm->have_disp_power_ref, and attempted to fix it to remove the dependency on have_disp_power_ref. However, Ilia Mirkin pointed out that this code is actually completely useless, as pre-nv50 never had runtime PM support in the first place! Go figure. So, since it's useless just get rid of it. Note that since the only thing nouveau_crtc_set_config() was doing was grabbing a runtime PM ref, calling drm_crtc_helper_set_config() then dropping the ref; we can just remove the function entirely and just call drm_crtc_helper_set_config() directly. Signed-off-by: Lyude Paul <lyude@redhat.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/gpio: check function 76 in the power check as wellMark Menzynski
Added GPIO is "Power Alert". It's uncertain if this GPIO is set on GPU initialization or only if a change is detected by the GPU at runtime. This GPIO can be found on Tesla and sometimes on Fermi GPUs. Untested, wrote according to documentation. Signed-off-by: Mark Menzynski <mmenzyns@redhat.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/gpio: check the gpio function 16 in the power check as wellMark Menzynski
Added GPIO is "Thermal and External Power Detect". It's uncertain if this GPIO is set on GPU initialization or only if a change is detected by the GPU at runtime. This GPIO can be found in Rankine and Curie and rarely on Tesla GPUs VBIOS. Untested, wrote according to documentation. Signed-off-by: Mark Menzynski <mmenzyns@redhat.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/gpio: fail if gpu external power is missingMark Menzynski
Currently, nouveau doesn't check if GPU is missing power. This patch makes nouveau fail when this happens on latest GPUs. It checks GPIO function 121 (External Power Emergency), which should detect power problems on GPU initialization. This can be disabled with nouveau.config=NvPowerChecks=1 Tested on TU104, GP106 and GF100. v3: * Add config override for disabling power checks Signed-off-by: Mark Menzynski <mmenzyns@redhat.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/bios/gpio: sort gpios by valuesMark Menzynski
One gpio was in wrong place, moved it for better readability. Signed-off-by: Mark Menzynski <mmenzyns@redhat.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/therm: don't attempt fan control where PMU is already managing itBen Skeggs
There's already a condition in place which attempts to detect this, but since we've begun to require a PMU subdev even on boards where we don't load a custom FW, it's become inaccurate. This will prevent unnecessarily running a periodic fan update thread on GP100 and newer, where we don't yet override the default PMU FW. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/therm: skip probing for devices not specified in thermal tablesBen Skeggs
Saves some time during driver load, as described by the relevant section[1] of the DCB 4.x specification. [1] https://nvidia.github.io/open-gpu-doc/DCB/DCB-4.x-Specification.html#_i2c_device_table Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/kms/gv100-: attach pixel blend mode property to planesBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/kms/gv100-: attach alpha property to planesBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/kms/gv100-: add support for plane zpos propertyBen Skeggs
Has a nice side-effect that we only update HW for this when it changes now, rather than every time we do a page flip. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/kms/nv50-: attach immutable zpos property to planesBen Skeggs
Defaulting to the fixed layout enforced in HW by EVO, and that we currently use by default on NVD. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/kms/nv50-: create primary plane before overlay planesBen Skeggs
zpos normalisation uses plane id to determine ordering for duplicate zpos values, and we likely want to keep primary plane on the bottom here. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/kms/nv50-: use __drm_atomic_helper_plane_reset()Ben Skeggs
We have some of this open-coded already, use the helper to prevent problems when adding (for example) support for the alpha property. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/kms/gv100-: implement csc + enable modern colour managment ↵Ben Skeggs
properties Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/kms/gv100-: use premultiplied alpha blending between planesBen Skeggs
This is apparently the assumed default behaviour when blend properties are absent. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/kms/nv50-: enable modern color management propertiesIlia Mirkin
For GF119:GV100, we can enable DEGAMMA/CTM/GAMMA. For earlier GPUs, as there is no CTM, having both degamma and gamma is a bit pointless. Later GPUs currently lack an implementation. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/kms/gf119-: add ctm property supportIlia Mirkin
This adds support on GF119:GV100 (exclusive) for CTM (aka CSC). Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2019-08-23drm/nouveau/kms/nv50-: remove overlay alpha formatsIlia Mirkin
The overlay logic can only do colorkey-based selection, not alpha-blending. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/fifo/gk104-: fix parsing of mmu fault dataBen Skeggs
Pascal was particularly incorrect, as the register changed to be more in the same format as the MMU fault buffers are. Shouldn't have impacted much more than confusing MMU fault log messages. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/fifo/gf1xx: convert to using nvkm_fault_dataBen Skeggs
Would like to be able to reuse gf100_fifo_intr_fault() for (some of) the later chipsets too, as it's identical. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/bios/init: handle INIT_RESET_END devinit opcodeRhys Kidd
Signal that the reset sequence has completed. This opcode signals that the software reset sequence has completed. Ordinarily, no actual operations are performed by the opcode. However it allows for possible software work arounds by devinit engines in software agents other than the VBIOS, such as the resman, FCODE, and EFI driver. Signed-off-by: Rhys Kidd <rhyskidd@gmail.com> Reviewed-by: Lyude Paul <lyude@redhat.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/bios/init: handle INIT_RESET_BEGUN devinit opcodeRhys Kidd
Signal that the reset sequence has begun. This opcode signals that the software reset sequence has begun. Ordinarily, no actual operations are performed by the opcode. However it allows for possible software work arounds by devinit engines in software agents other than the VBIOS, such as the resman, FCODE, and EFI driver. Signed-off-by: Rhys Kidd <rhyskidd@gmail.com> Reviewed-by: Lyude Paul <lyude@redhat.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/bios: downgrade absence of tmds table to info from an errorRhys Kidd
Absence of a TMDS Info Table is common on Optimus setups where the NVIDIA gpu is not connected directly to any outputs. Reporting an error in this scenario is too harsh. Accordingly, change the error message to an info message. By default the error message also causes a boot flicker for these sytems. Signed-off-by: Rhys Kidd <rhyskidd@gmail.com> Reviewed-by: Lyude Paul <lyude@redhat.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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