summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2022-11-21dt-bindings: amlogic: document Odroid Go Ultra compatibleNeil Armstrong
This documents the Odroid Go Ultra, a portable gaming device, with the following characteristics: - Amlogic S922X SoC - RK817 & RK818 PMICs - 2GiB LPDDR4 - On board 16GiB eMMC - Micro SD Card slot - 5inch 854×480 MIPI-DSI TFT LCD - Earphone stereo jack, 0.5Watt 8Ω Mono speaker - Li-Polymer 3.7V/4000mAh Battery - USB-A 2.0 Host Connector - x16 GPIO Input Buttons - 2x ADC Analog Joysticks - USB-C Port for USB2 Device and Charging Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221031-b4-odroid-go-ultra-initial-v2-1-a3df1e09b0af@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2022-11-21Merge branch 'dt/dtbo-rename' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux into soc/dt * 'dt/dtbo-rename' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: kbuild: Cleanup DT Overlay intermediate files as appropriate staging: pi433: overlay: Rename overlay source file from .dts to .dtso of: overlay: rename overlay source files from .dts to .dtso kbuild: Allow DTB overlays to built into .dtbo.S files kbuild: Allow DTB overlays to built from .dtso named source files Link: https://lore.kernel.org/r/20221118211103.GA1334449-robh@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-21Merge tag 'sunxi-dt-for-6.2-1' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/dt - Added H616 USB node - Enabled bluetooth on Pinebook A64 - Added f1c100s PWM, I2C, CIR and LRADC nodes - Added USB HCI0 PHYs property to H3/H5 * tag 'sunxi-dt-for-6.2-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: ARM: dts: sunxi: H3/H5: Add phys property to USB HCI0 ARM: dts: suniv: f1c100s: add LRADC node ARM: dts: suniv: f1c100s: add CIR DT node dt-bindings: media: IR: Add F1C100s IR compatible string ARM: dts: suniv: f1c100s: add I2C DT nodes ARM: dts: suniv: f1c100s: add PWM node dt-bindings: pwm: allwinner,sun4i-a10: Add F1C100s compatible arm64: dts: allwinner: a64: enable Bluetooth on Pinebook arm64: dts: allwinner: h616: X96 Mate: Add USB nodes arm64: dts: allwinner: h616: OrangePi Zero 2: Add USB nodes arm64: dts: allwinner: h616: Add USB nodes dt-bindings: usb: Add H616 compatible string ARM: dts: axp22x/axp809: Add GPIO controller nodes ARM: dts: axp803/axp81x: Drop GPIO LDO pinctrl nodes Link: https://lore.kernel.org/r/Y3fuAosinWbrj+Dy@jernej-laptop Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-21Merge tag 'at91-dt-6.2-2' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/dt AT91 DT for 6.2 #2 It contains: - one typo fix for a SAMA7G5 pin; the pin is not used anywhere in the device trees. * tag 'at91-dt-6.2-2' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: dts: at91: sama7g5: fix signal name of pin PD8 Link: https://lore.kernel.org/r/20221118131214.301678-1-claudiu.beznea@microchip.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-21ARM: dts: uniphier: Add Pro5 board supportKunihiko Hayashi
Initial version of devicetree sources for Pro5 EPCORE and ProEX boards. These boards have UART, I2C, USB, eMMC and PCI endpoint in common. Pro5 EPCORE board is a kind of Pro5 reference board with PCIe endpoint card edge connector. ProEX board shares peripherals with Linux and other systems, and some of these ports are available in Linux. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Link: https://lore.kernel.org/r/20221117163219.3673-3-hayashi.kunihiko@socionext.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-21dt-bindings: arm: uniphier: Add Pro5 boardsKunihiko Hayashi
Add compatible string for Pro5 EP-Core board and ProEX board support. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20221117163219.3673-2-hayashi.kunihiko@socionext.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-21Merge tag 'samsung-dt64-6.2' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt Samsung DTS ARM64 changes for v6.2 Correct pin drive strength macros (names) and values used on Tesla FSD SoC. * tag 'samsung-dt64-6.2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: arm64: dts: fsd: fix drive strength values as per FSD HW UM arm64: dts: fsd: fix drive strength macros as per FSD HW UM Link: https://lore.kernel.org/r/20221116093010.18515-2-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-21ARM: dts: exynos: Add new SoC specific compatible string for Exynos3250 SoCAakarsh Jain
Exynos3250 and Exynos5420 are using same compatible string for MFC codec device but they have different clock hierarchy and complexity. Add new compatible string followed by mfc-v7 fallback for Exynos3250 SoC. Suggested-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Aakarsh Jain <aakarsh.jain@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Tommaso Merciai <tommaso.merciai@amarulasolutions.com> Link: https://lore.kernel.org/r/20221114115024.69591-4-aakarsh.jain@samsung.com Link: https://lore.kernel.org/r/20221116093010.18515-1-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-21arm64: dts: renesas: Rename DTB overlay source files from .dts to .dtsoAndrew Davis
DTB Overlays (.dtbo) can now be built from source files with the extension (.dtso). This makes it clear what is the content of the files and differentiates them from base DTB source files. Convert the DTB overlay source files in the arm64/renesas directory. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20221024173434.32518-6-afd@ti.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-11-21Merge branch 'dt/dtbo-rename' of ↵Geert Uytterhoeven
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux into renesas-arm-dt-for-v6.2 Merge Rob's stable branch for the .dts to .dtso rename.
2022-11-20Merge branch 'riscv-thead_c9xx' into riscv-dt-for-nextConor Dooley
The bouffalolabs stuff is going to need the thead,c906 compatible too, so there is no point waiting the D1 stuff to land for it. Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2022-11-20dt-bindings: riscv: Add T-HEAD C906 and C910 compatiblesSamuel Holland
The C906 and C910 are RISC-V CPU cores from T-HEAD Semiconductor. Notably, the C906 core is used in the Allwinner D1 SoC. Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2022-11-20ARM: dts: nuvoton: Remove bogus unit addresses from fixed-partition nodesJonathan Neuschäfer
The unit addresses do not correspond to the nodes' reg properties, because they don't have any. Fixes: e42b650f828d ("ARM: dts: nuvoton: Add new device nodes to NPCM750 EVB") Fixes: ee33e2fb3d70 ("ARM: dts: nuvoton: Add Quanta GBS BMC Device Tree") Fixes: 59f5abe09f0a ("ARM: dts: nuvoton: Add Quanta GSJ BMC") Fixes: 14579c76f5ca ("ARM: dts: nuvoton: Add Fii Kudo system") Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20221031221553.163273-1-j.neuschaefer@gmx.net Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-11-20ARM: dts: nuvoton,wpcm450-supermicro-x9sci-ln4f: Add GPIO line namesJonathan Neuschäfer
To make gpioinfo output more useful and enable gpiofind usage, add line names for GPIOs where the function is known. This patch follows the naming convention defined for OpenBMC, as much as possible: https://github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Link: https://lore.kernel.org/r/20221101102916.440526-1-j.neuschaefer@gmx.net Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-11-20ARM: dts: aspeed: mtjade: Add SMPro nodesQuan Nguyen
Add SMPro nodes to Mt. Jade BMC. Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com> Link: https://lore.kernel.org/r/20221118065109.2339066-1-quan@os.amperecomputing.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-11-20ARM: dts: aspeed: mtjade,mtmitchell: Add BMC SSIF nodesQuan Nguyen
Add BMC SSIF node to support IPMI in-band communication. Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com> Link: https://lore.kernel.org/r/20221024081115.3320584-1-quan@os.amperecomputing.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-11-20ARM: dts: aspeed: Add Delta AHE-50DC BMCZev Weiss
This is a 1U Open19 power shelf with six PSUs and 50 12VDC outputs via LM25066 efuses. It's managed by a pair of AST1250 BMCs in a redundant active/active configuration using a PCA9541 on each I2C bus to arbitrate access between the two. Signed-off-by: Zev Weiss <zev@bewilderbeest.net> Link: https://lore.kernel.org/r/20221108001551.18175-3-zev@bewilderbeest.net Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-11-20dt-bindings: arm: aspeed: document Delta AHE-50DC BMCZev Weiss
Document Delta AHE-50DC BMC board compatible. Signed-off-by: Zev Weiss <zev@bewilderbeest.net> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20221108001551.18175-2-zev@bewilderbeest.net Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-11-20ARM: dts: aspeed: rainier: Fix pca9551 nodesSantosh Puranik
The pca9551 compatible LED drivers are under the pca9546 mux on Rainier pass > 1. On pass 1, they are directly connected to the aspeed i2c. Signed-off-by: Santosh Puranik <santosh.puranik@in.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20221102223554.1738642-1-joel@jms.id.au
2022-11-20ARM: dts: aspeed: p10bmc: Add occ-hwmon nodesEddie James
Add the occ-hwmon nodes in order to specify that the occ-hwmon driver should not poll the OCC during initialization. Signed-off-by: Eddie James <eajames@linux.ibm.com> Link: https://lore.kernel.org/r/20221101213212.643472-1-eajames@linux.ibm.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-11-20ARM: dts: aspeed-g6: Add aliases for mdio nodesPotin Lai
Add aliases for mdio nodes so that we can use name to lookup the bus address of Aspeed SOC. For example: root@bletchley:~# cat /sys/firmware/devicetree/base/aliases/mdio0 /ahb/mdio@1e650000 root@bletchley:~# cat /sys/firmware/devicetree/base/aliases/mdio1 /ahb/mdio@1e650008 root@bletchley:~# cat /sys/firmware/devicetree/base/aliases/mdio2 /ahb/mdio@1e650010 root@bletchley:~# cat /sys/firmware/devicetree/base/aliases/mdio3 /ahb/mdio@1e650018 Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Link: https://lore.kernel.org/r/20221025055046.1704920-1-potin.lai.pt@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-11-20ARM: dts: aspeed: Remove MihawkJoel Stanley
The platform has been removed from OpenBMC as it is unmaintained. Link: https://lore.kernel.org/r/20221020224420.635938-1-joel@jms.id.au Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-11-20ARM: dts: aspeed: rainier,everest: Move reserved memory regionsAdriana Kobylak
Move the reserved regions to account for a decrease in DRAM when ECC is enabled. ECC takes 1/9th of memory. Running on HW with ECC off, u-boot prints: DRAM: already initialized, 1008 MiB (capacity:1024 MiB, VGA:16 MiB, ECC:off) And with ECC on, u-boot prints: DRAM: already initialized, 896 MiB (capacity:1024 MiB, VGA:16 MiB, ECC:on, ECC size:896 MiB) This implies that MCR54 is configured for ECC to be bounded at the bottom of a 16MiB VGA memory region: 1024MiB - 16MiB (VGA) = 1008MiB 1008MiB / 9 (for ECC) = 112MiB 1008MiB - 112MiB = 896MiB (available DRAM) The flash_memory region currently starts at offset 896MiB: 0xb8000000 (flash_memory offset) - 0x80000000 (base memory address) = 0x38000000 = 896MiB This is the end of the available DRAM with ECC enabled and therefore it needs to be moved. Since the flash_memory is 64MiB in size and needs to be 64MiB aligned, it can just be moved up by 64MiB and would sit right at the end of the available DRAM buffer. The ramoops region currently follows the flash_memory, but it can be moved to sit above flash_memory which would minimize the address-space fragmentation. Signed-off-by: Adriana Kobylak <anoo@us.ibm.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20220916195535.1020185-1-anoo@linux.ibm.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-11-20ARM: dts: aspeed: Add IBM Bonnell system BMC devicetreeEddie James
Add a devicetree for the new Bonnell system. Signed-off-by: Eddie James <eajames@linux.ibm.com> Reviewed-by: Jim Wright <wrightj@linux.ibm.com> Link: https://lore.kernel.org/r/20220818202422.741275-1-eajames@linux.ibm.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-11-20ARM: dts: aspeed: bletchley: Enable emmc and ehci1Potin Lai
Enable both emmc-controller and emmc nodes for storage soultion on bletchley, and enable ehci1 node as second storage plan. Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Reviewed-by: Patrick Williams <patrick@stwcx.xyz> Link: https://lore.kernel.org/r/20220929013130.1916525-3-potin.lai.pt@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-11-20ARM: dts: aspeed: bletchley: Update and fix gpio-line-namesPotin Lai
Update new GPIOM7 line name, and fixed typo of GPION6 line name New GPIO: - GPIOM7: USB_DEBUG_PWR_BTN_N Fixed GPIO: - GPION6: LED_POSTCODE_5 --> LED_POSTCODE_6 Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Reviewed-by: Patrick Williams <patrick@stwcx.xyz> Link: https://lore.kernel.org/r/20220929013130.1916525-2-potin.lai.pt@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-11-20ARM: dts: aspeed: bletchley: Update fusb302 nodesPotin Lai
1. Add interrupt pin of fusb302 on each sled. 2. Add vbus-supply property in each fusb302 node. 3. Fix BMC power-role at source and data-role at host. 4. Disable PD to avoid "HARD Reset" due to incompatible PD ver. Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Reviewed-by: Patrick Williams <patrick@stwcx.xyz> Link: https://lore.kernel.org/r/20220613095150.21917-5-potin.lai.pt@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-11-20ARM: dts: aspeed: bletchley: Bind presence-sledX pins via gpio-keysPotin Lai
Bind presence-sledX pins via gpio-keys driver to monitor and export GPIO pin values on DBUS using phosphor-gpio-presence service. Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Reviewed-by: Patrick Williams <patrick@stwcx.xyz> Link: https://lore.kernel.org/r/20220613095150.21917-4-potin.lai.pt@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-11-20ARM: dts: aspeed: bletchley: Disable GPIOV2 pull-downPotin Lai
The external pull-up cannot drive GPIOV2, so disable GPIOV2 internal pull-down resistor by the request form HW team. Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Reviewed-by: Patrick Williams <patrick@stwcx.xyz> Link: https://lore.kernel.org/r/20220613095150.21917-3-potin.lai.pt@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-11-20ARM: dts: aspeed: bletchley: Change LED sys_log_id to active lowPotin Lai
change LED sys_log_id to active low base on DVT schematic. Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Reviewed-by: Patrick Williams <patrick@stwcx.xyz> Link: https://lore.kernel.org/r/20220613095150.21917-2-potin.lai.pt@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-11-19arm64: dts: freescale: Rename DTB overlay source files from .dts to .dtsoAndrew Davis
DTB Overlays (.dtbo) can now be built from source files with the extension (.dtso). This makes it clear what is the content of the files and differentiates them from base DTB source files. Convert the DTB overlay source files in the arm64/freescale directory. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-19Merge remote-tracking branch 'robh/dt/dtbo-rename' into imx/dt64Shawn Guo
2022-11-19arm64: dts: imx8mm-evk: add vcc supply for pca6416Adrian Alonso
pca6146 requires vcc-supply to work on i.MX8MM-EVK board. Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-19arm64: dts: imx8m[m,q]-evk: change to use off-on-delay-us in regulatorHaibo Chen
Some SD Card controller and power circuitry has increased capacitance, so the usual toggling of regulator to power the card off and on is insufficient. According to SD spec, for sd card power reset operation, the sd card supply voltage needs to be lower than 0.5v and keep over 1ms, otherwise, next time power back the sd card supply voltage to 3.3v, sd card can't support SD3.0 mode again. This patch add the off-on-delay-us, make sure the sd power reset behavior is align with the specification. Without this patch, when do quick system suspend/resume test, some sd card can't work at SD3.0 mode after system resume back. Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-19arm64: dts: imx8mn-evk: enable uart1Peng Fan
Enable uart1 for BT usage Configure the clock to source from IMX8MN_SYS_PLL1_80M, because the uart could only support max 1.5M buadrate if using OSC_24M as clock source. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-19arm64: dts: imx8mn-evk: add i2c gpio recovery settingsPeng Fan
Add I2C gpio recovery iomuxc settings Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-19arm64: dts: imx8mn-evk: set off-on-delay-us in regulatorPeng Fan
Some SD Card controller and power circuitry has increased capacitance, so the usual toggling of regulator to power the card off and on is insufficient. According to SD spec, for sd card power reset operation, the sd card supply voltage needs to be lower than 0.5v and keep over 1ms, otherwise, next time power back the sd card supply voltage to 3.3v, sd card can't support SD3.0 mode again. This patch add the off-on-delay-us, make sure the sd power reset behavior is align with the specification. Without this patch, when do quick system suspend/resume test, some sd card can't work at SD3.0 mode after system resume back. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-19arm64: dts: imx8mn-evk: update vdd_soc dvs voltagePeng Fan
Per schematic, BUCK1 is for VDD_SOC&DRAM&PU_0V9. The nxp,dvs-run-voltage and nxp,dvs-standby-voltage need set for BUCK1, not BUCK2. BUCK2 is for A53, which is handled by DVFS, so no need dvs property. nxp,dvs-run-voltage is not needed, since bootloader must configure voltage to make system boot well. Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-19arm64: dts: imx8mp-evk: enable I2C2 nodePeng Fan
Enable I2C node for i.MX8MP-EVK Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-19arm64: dts: imx8mp-evk: enable fspi nor on imx8mp evkHan Xu
enable fspi nor on imx8mp evk dts Reviewed-by: Frank Li <frank.li@nxp.com> Signed-off-by: Han Xu <han.xu@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-19arm64: dts: imx8mp-evk: enable uart1/3 portsPeng Fan
Enable uart1/3 ports for evk board. Configure the clock to source from IMX8MP_SYS_PLL1_80M, because the uart could only support max 1.5M buadrate if using OSC_24M as clock source. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-19ARM64: dts: imx8mp-evk: add pwm supportClark Wang
Enable pwm1/2/4 support. Enable pwm1 on pin GPIO1_IO01 for DSI_BL_PWM pwm2 on pin GPIO1_IO11 for LVDS_BL_PWM pwm4 on pin SAI5_RXFS for J21-32 Acked-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-19arm64: dts: imx8mp: add mlmix power domainPeng Fan
Add mlmix power domain Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-19ARM: dts: colibri-imx6ull: Enable dual-role switchingPhilippe Schenker
The Colibri standard provides a GPIO called USBC_DET to switch from USB Host to USB Device and back. Make use of this GPIO by adding it with usb-connector framework. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-19arm64: dts: imx8mq: fix dtschema warning for imx7-csiMartin Kepplinger
According to dtschema for the csi bridge, compatible is an enum and only one must be used. Fixing this removes the following warning: compatible: 'oneOf' conditional failed, one must be fixed Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-18kbuild: Cleanup DT Overlay intermediate files as appropriateAndrew Davis
%.dtbo.o and %.dtbo.S files are used to build-in DT Overlay. They should should not be removed by Make or the kernel will be needlessly rebuilt. These should be removed by "clean" and ignored by git like other intermediate files. Reported-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Andrew Davis <afd@ti.com> Fixes: 941214a512d8 ("kbuild: Allow DTB overlays to built into .dtbo.S files") Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Masahiro Yamada <masahiroy@kernel.org> Link: https://lore.kernel.org/r/20221114205939.27994-1-afd@ti.com Signed-off-by: Rob Herring <robh@kernel.org>
2022-11-18arm64: dts: socfpga: Add clk-phase-sd-hs property to the sdmmc nodeDinh Nguyen
The sdmmc controller's CIU(Card Interface Unit) clock's phase can be adjusted through the register in the system manager. Add the binding "altr,sysmgr-syscon" to the SDMMC node for the driver to access the system manager. Add the "clk-phase-sd-hs" property in the SDMMC node to designate the smpsel and drvsel properties for the CIU clock. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-11-18arm: dts: socfpga: Add clk-phase-sd-hs property to the sdmmc nodeDinh Nguyen
The sdmmc controller's CIU(Card Interface Unit) clock's phase can be adjusted through the register in the system manager. Add the binding "altr,sysmgr-syscon" to the SDMMC node for the driver to access the system manager. Add the "clk-phase-sd-hs" property in the SDMMC node to designate the smpsel and drvsel properties for the CIU clock. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-11-18arm: dts: socfpga: remove "clk-phase" in sdmmc_clkDinh Nguyen
Now that the SDMMC driver can use the "clk-phase-sd-hs" binding, we don't need the clk-phase in the sdmmc_clk anymore. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-11-18arm: dts: socfpga: align mmc node names with dtschemaDinh Nguyen
dwmmc0@ff704000: $nodename:0: 'dwmmc0@ff704000' does not match '^mmc(@.*)?$' Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>