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path: root/drivers/gpu/drm/i915/intel_overlay.c
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Diffstat (limited to 'drivers/gpu/drm/i915/intel_overlay.c')
-rw-r--r--drivers/gpu/drm/i915/intel_overlay.c68
1 files changed, 37 insertions, 31 deletions
diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
index dd92122ed95c..25c8ec697da1 100644
--- a/drivers/gpu/drm/i915/intel_overlay.c
+++ b/drivers/gpu/drm/i915/intel_overlay.c
@@ -172,10 +172,11 @@ struct intel_overlay {
struct intel_crtc *crtc;
struct drm_i915_gem_object *vid_bo;
struct drm_i915_gem_object *old_vid_bo;
- int active;
- int pfit_active;
+ bool active;
+ bool pfit_active;
u32 pfit_vscale_ratio; /* shifted-point number, (1<<12) == 1.0 */
- u32 color_key;
+ u32 color_key:24;
+ u32 color_key_enabled:1;
u32 brightness, contrast, saturation;
u32 old_xscale, old_yscale;
/* register access */
@@ -216,7 +217,7 @@ static int intel_overlay_do_wait_request(struct intel_overlay *overlay,
struct intel_engine_cs *ring = &dev_priv->ring[RCS];
int ret;
- BUG_ON(overlay->last_flip_req);
+ WARN_ON(overlay->last_flip_req);
i915_gem_request_assign(&overlay->last_flip_req,
ring->outstanding_lazy_request);
ret = i915_add_request(ring);
@@ -227,7 +228,6 @@ static int intel_overlay_do_wait_request(struct intel_overlay *overlay,
ret = i915_wait_request(overlay->last_flip_req);
if (ret)
return ret;
- i915_gem_retire_requests(dev);
i915_gem_request_assign(&overlay->last_flip_req, NULL);
return 0;
@@ -241,15 +241,15 @@ static int intel_overlay_on(struct intel_overlay *overlay)
struct intel_engine_cs *ring = &dev_priv->ring[RCS];
int ret;
- BUG_ON(overlay->active);
- overlay->active = 1;
-
+ WARN_ON(overlay->active);
WARN_ON(IS_I830(dev) && !(dev_priv->quirks & QUIRK_PIPEA_FORCE));
ret = intel_ring_begin(ring, 4);
if (ret)
return ret;
+ overlay->active = true;
+
intel_ring_emit(ring, MI_OVERLAY_FLIP | MI_OVERLAY_ON);
intel_ring_emit(ring, overlay->flip_addr | OFC_UPDATE);
intel_ring_emit(ring, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);
@@ -270,7 +270,7 @@ static int intel_overlay_continue(struct intel_overlay *overlay,
u32 tmp;
int ret;
- BUG_ON(!overlay->active);
+ WARN_ON(!overlay->active);
if (load_polyphase_filter)
flip_addr |= OFC_UPDATE;
@@ -309,7 +309,8 @@ static void intel_overlay_off_tail(struct intel_overlay *overlay)
struct drm_i915_gem_object *obj = overlay->vid_bo;
/* never have the overlay hw on without showing a frame */
- BUG_ON(!overlay->vid_bo);
+ if (WARN_ON(!obj))
+ return;
i915_gem_object_ggtt_unpin(obj);
drm_gem_object_unreference(&obj->base);
@@ -317,7 +318,7 @@ static void intel_overlay_off_tail(struct intel_overlay *overlay)
overlay->crtc->overlay = NULL;
overlay->crtc = NULL;
- overlay->active = 0;
+ overlay->active = false;
}
/* overlay needs to be disabled in OCMD reg */
@@ -329,7 +330,7 @@ static int intel_overlay_off(struct intel_overlay *overlay)
u32 flip_addr = overlay->flip_addr;
int ret;
- BUG_ON(!overlay->active);
+ WARN_ON(!overlay->active);
/* According to intel docs the overlay hw may hang (when switching
* off) without loading the filter coeffs. It is however unclear whether
@@ -374,7 +375,6 @@ static int intel_overlay_recover_from_interrupt(struct intel_overlay *overlay)
ret = i915_wait_request(overlay->last_flip_req);
if (ret)
return ret;
- i915_gem_retire_requests(overlay->dev);
if (overlay->flip_tail)
overlay->flip_tail(overlay);
@@ -629,31 +629,36 @@ static void update_colorkey(struct intel_overlay *overlay,
struct overlay_registers __iomem *regs)
{
u32 key = overlay->color_key;
+ u32 flags;
+
+ flags = 0;
+ if (overlay->color_key_enabled)
+ flags |= DST_KEY_ENABLE;
switch (overlay->crtc->base.primary->fb->bits_per_pixel) {
case 8:
- iowrite32(0, &regs->DCLRKV);
- iowrite32(CLK_RGB8I_MASK | DST_KEY_ENABLE, &regs->DCLRKM);
+ key = 0;
+ flags |= CLK_RGB8I_MASK;
break;
case 16:
if (overlay->crtc->base.primary->fb->depth == 15) {
- iowrite32(RGB15_TO_COLORKEY(key), &regs->DCLRKV);
- iowrite32(CLK_RGB15_MASK | DST_KEY_ENABLE,
- &regs->DCLRKM);
+ key = RGB15_TO_COLORKEY(key);
+ flags |= CLK_RGB15_MASK;
} else {
- iowrite32(RGB16_TO_COLORKEY(key), &regs->DCLRKV);
- iowrite32(CLK_RGB16_MASK | DST_KEY_ENABLE,
- &regs->DCLRKM);
+ key = RGB16_TO_COLORKEY(key);
+ flags |= CLK_RGB16_MASK;
}
break;
case 24:
case 32:
- iowrite32(key, &regs->DCLRKV);
- iowrite32(CLK_RGB24_MASK | DST_KEY_ENABLE, &regs->DCLRKM);
+ flags |= CLK_RGB24_MASK;
break;
}
+
+ iowrite32(key, &regs->DCLRKV);
+ iowrite32(flags, &regs->DCLRKM);
}
static u32 overlay_cmd_reg(struct put_image_params *params)
@@ -712,9 +717,8 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
u32 swidth, swidthsw, sheight, ostride;
enum pipe pipe = overlay->crtc->pipe;
- BUG_ON(!mutex_is_locked(&dev->struct_mutex));
- BUG_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex));
- BUG_ON(!overlay);
+ WARN_ON(!mutex_is_locked(&dev->struct_mutex));
+ WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex));
ret = intel_overlay_release_old_vid(overlay);
if (ret != 0)
@@ -824,8 +828,8 @@ int intel_overlay_switch_off(struct intel_overlay *overlay)
struct drm_device *dev = overlay->dev;
int ret;
- BUG_ON(!mutex_is_locked(&dev->struct_mutex));
- BUG_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex));
+ WARN_ON(!mutex_is_locked(&dev->struct_mutex));
+ WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex));
ret = intel_overlay_recover_from_interrupt(overlay);
if (ret != 0)
@@ -1131,10 +1135,10 @@ int intel_overlay_put_image(struct drm_device *dev, void *data,
/* line too wide, i.e. one-line-mode */
if (mode->hdisplay > 1024 &&
intel_panel_fitter_pipe(dev) == crtc->pipe) {
- overlay->pfit_active = 1;
+ overlay->pfit_active = true;
update_pfit_vscale_ratio(overlay);
} else
- overlay->pfit_active = 0;
+ overlay->pfit_active = false;
}
ret = check_overlay_dst(overlay, put_image_rec);
@@ -1329,6 +1333,7 @@ int intel_overlay_attrs(struct drm_device *dev, void *data,
I915_WRITE(OGAMC5, attrs->gamma5);
}
}
+ overlay->color_key_enabled = (attrs->flags & I915_OVERLAY_DISABLE_DEST_COLORKEY) == 0;
ret = 0;
out_unlock:
@@ -1392,6 +1397,7 @@ void intel_setup_overlay(struct drm_device *dev)
/* init all values */
overlay->color_key = 0x0101fe;
+ overlay->color_key_enabled = true;
overlay->brightness = -19;
overlay->contrast = 75;
overlay->saturation = 146;
@@ -1432,7 +1438,7 @@ void intel_cleanup_overlay(struct drm_device *dev)
/* The bo's should be free'd by the generic code already.
* Furthermore modesetting teardown happens beforehand so the
* hardware should be off already */
- BUG_ON(dev_priv->overlay->active);
+ WARN_ON(dev_priv->overlay->active);
drm_gem_object_unreference_unlocked(&dev_priv->overlay->reg_bo->base);
kfree(dev_priv->overlay);
generated by cgit v1.2.3 (git 2.46.0) at 2025-10-31 03:04:43 +0000