diff options
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 13 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/psp_v3_1.c | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/soc15.c | 1 | 
5 files changed, 11 insertions, 10 deletions
| diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c index ead851413c0a..16fcb56c232b 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c @@ -700,6 +700,8 @@ int amdgpu_vm_validate_pt_bos(struct amdgpu_device *adev, struct amdgpu_vm *vm,  	struct amdgpu_vm_bo_base *bo_base, *tmp;  	int r = 0; +	vm->bulk_moveable &= list_empty(&vm->evicted); +  	list_for_each_entry_safe(bo_base, tmp, &vm->evicted, vm_status) {  		struct amdgpu_bo *bo = bo_base->bo; @@ -947,10 +949,6 @@ int amdgpu_vm_alloc_pts(struct amdgpu_device *adev,  		if (r)  			return r; -		r = amdgpu_vm_clear_bo(adev, vm, pt, cursor.level, ats); -		if (r) -			goto error_free_pt; -  		if (vm->use_cpu_for_update) {  			r = amdgpu_bo_kmap(pt, NULL);  			if (r) @@ -963,6 +961,10 @@ int amdgpu_vm_alloc_pts(struct amdgpu_device *adev,  		pt->parent = amdgpu_bo_ref(cursor.parent->base.bo);  		amdgpu_vm_bo_base_init(&entry->base, vm, pt); + +		r = amdgpu_vm_clear_bo(adev, vm, pt, cursor.level, ats); +		if (r) +			goto error_free_pt;  	}  	return 0; @@ -3033,13 +3035,14 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm,  	if (r)  		goto error_unreserve; +	amdgpu_vm_bo_base_init(&vm->root.base, vm, root); +  	r = amdgpu_vm_clear_bo(adev, vm, root,  			       adev->vm_manager.root_level,  			       vm->pte_support_ats);  	if (r)  		goto error_unreserve; -	amdgpu_vm_bo_base_init(&vm->root.base, vm, root);  	amdgpu_bo_unreserve(vm->root.base.bo);  	if (pasid) { diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c index 5533f6e4f4a4..d0309e8c9d12 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c @@ -220,6 +220,7 @@ static const struct soc15_reg_golden golden_settings_gc_9_1_rv2[] =  static const struct soc15_reg_golden golden_settings_gc_9_x_common[] =  { +	SOC15_REG_GOLDEN_VALUE(GC, 0, mmCP_SD_CNTL, 0xffffffff, 0x000001ff),  	SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_CAM_INDEX, 0xffffffff, 0x00000000),  	SOC15_REG_GOLDEN_VALUE(GC, 0, mmGRBM_CAM_DATA, 0xffffffff, 0x2544c382)  }; diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c index 600259b4e291..2fe8397241ea 100644 --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c @@ -742,7 +742,7 @@ static int gmc_v9_0_allocate_vm_inv_eng(struct amdgpu_device *adev)  		}  		ring->vm_inv_eng = inv_eng - 1; -		change_bit(inv_eng - 1, (unsigned long *)(&vm_inv_engs[vmhub])); +		vm_inv_engs[vmhub] &= ~(1 << ring->vm_inv_eng);  		dev_info(adev->dev, "ring %s uses VM inv eng %u on hub %u\n",  			 ring->name, ring->vm_inv_eng, ring->funcs->vmhub); diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v3_1.c b/drivers/gpu/drm/amd/amdgpu/psp_v3_1.c index c63de945c021..0487e3a4e9e7 100644 --- a/drivers/gpu/drm/amd/amdgpu/psp_v3_1.c +++ b/drivers/gpu/drm/amd/amdgpu/psp_v3_1.c @@ -500,9 +500,7 @@ static bool psp_v3_1_smu_reload_quirk(struct psp_context *psp)  	struct amdgpu_device *adev = psp->adev;  	uint32_t reg; -	reg = smnMP1_FIRMWARE_FLAGS | 0x03b00000; -	WREG32_SOC15(NBIO, 0, mmPCIE_INDEX2, reg); -	reg = RREG32_SOC15(NBIO, 0, mmPCIE_DATA2); +	reg = RREG32_PCIE(smnMP1_FIRMWARE_FLAGS | 0x03b00000);  	return (reg & MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED_MASK) ? true : false;  } diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c index 99ebcf29dcb0..ed89a101f73f 100644 --- a/drivers/gpu/drm/amd/amdgpu/soc15.c +++ b/drivers/gpu/drm/amd/amdgpu/soc15.c @@ -461,7 +461,6 @@ static int soc15_asic_reset(struct amdgpu_device *adev)  	switch (adev->asic_type) {  	case CHIP_VEGA10: -	case CHIP_VEGA20:  		soc15_asic_get_baco_capability(adev, &baco_reset);  		break;  	default: | 
