diff options
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_object.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 42 | 
1 files changed, 22 insertions, 20 deletions
| diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c index 2e8f6cd7a729..25a68d8888e0 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c @@ -346,17 +346,16 @@ int amdgpu_bo_create_kernel(struct amdgpu_device *adev,   * @adev: amdgpu device object   * @offset: offset of the BO   * @size: size of the BO - * @domain: where to place it   * @bo_ptr:  used to initialize BOs in structures   * @cpu_addr: optional CPU address mapping   * - * Creates a kernel BO at a specific offset in the address space of the domain. + * Creates a kernel BO at a specific offset in VRAM.   *   * Returns:   * 0 on success, negative error code otherwise.   */  int amdgpu_bo_create_kernel_at(struct amdgpu_device *adev, -			       uint64_t offset, uint64_t size, uint32_t domain, +			       uint64_t offset, uint64_t size,  			       struct amdgpu_bo **bo_ptr, void **cpu_addr)  {  	struct ttm_operation_ctx ctx = { false, false }; @@ -366,8 +365,9 @@ int amdgpu_bo_create_kernel_at(struct amdgpu_device *adev,  	offset &= PAGE_MASK;  	size = ALIGN(size, PAGE_SIZE); -	r = amdgpu_bo_create_reserved(adev, size, PAGE_SIZE, domain, bo_ptr, -				      NULL, cpu_addr); +	r = amdgpu_bo_create_reserved(adev, size, PAGE_SIZE, +				      AMDGPU_GEM_DOMAIN_VRAM, bo_ptr, NULL, +				      cpu_addr);  	if (r)  		return r; @@ -422,6 +422,8 @@ void amdgpu_bo_free_kernel(struct amdgpu_bo **bo, u64 *gpu_addr,  	if (*bo == NULL)  		return; +	WARN_ON(amdgpu_ttm_adev((*bo)->tbo.bdev)->in_suspend); +  	if (likely(amdgpu_bo_reserve(*bo, true) == 0)) {  		if (cpu_addr)  			amdgpu_bo_kunmap(*bo); @@ -446,33 +448,31 @@ static bool amdgpu_bo_validate_size(struct amdgpu_device *adev,  	/*  	 * If GTT is part of requested domains the check must succeed to -	 * allow fall back to GTT +	 * allow fall back to GTT.  	 */  	if (domain & AMDGPU_GEM_DOMAIN_GTT) {  		man = ttm_manager_type(&adev->mman.bdev, TTM_PL_TT); -		if (size < man->size) +		if (man && size < man->size)  			return true; -		else -			goto fail; -	} - -	if (domain & AMDGPU_GEM_DOMAIN_VRAM) { +		else if (!man) +			WARN_ON_ONCE("GTT domain requested but GTT mem manager uninitialized"); +		goto fail; +	} else if (domain & AMDGPU_GEM_DOMAIN_VRAM) {  		man = ttm_manager_type(&adev->mman.bdev, TTM_PL_VRAM); -		if (size < man->size) +		if (man && size < man->size)  			return true; -		else -			goto fail; +		goto fail;  	} -  	/* TODO add more domains checks, such as AMDGPU_GEM_DOMAIN_CPU */  	return true;  fail: -	DRM_DEBUG("BO size %lu > total memory in domain: %llu\n", size, -		  man->size); +	if (man) +		DRM_DEBUG("BO size %lu > total memory in domain: %llu\n", size, +			  man->size);  	return false;  } @@ -542,6 +542,7 @@ int amdgpu_bo_create(struct amdgpu_device *adev,  		/* GWS and OA don't need any alignment. */  		page_align = bp->byte_align;  		size <<= PAGE_SHIFT; +  	} else if (bp->domain & AMDGPU_GEM_DOMAIN_GDS) {  		/* Both size and alignment must be a multiple of 4. */  		page_align = ALIGN(bp->byte_align, 4); @@ -776,7 +777,7 @@ int amdgpu_bo_kmap(struct amdgpu_bo *bo, void **ptr)  		return 0;  	} -	r = ttm_bo_kmap(&bo->tbo, 0, bo->tbo.resource->num_pages, &bo->kmap); +	r = ttm_bo_kmap(&bo->tbo, 0, PFN_UP(bo->tbo.base.size), &bo->kmap);  	if (r)  		return r; @@ -1509,7 +1510,8 @@ u64 amdgpu_bo_gpu_offset_no_check(struct amdgpu_bo *bo)  uint32_t amdgpu_bo_get_preferred_domain(struct amdgpu_device *adev,  					    uint32_t domain)  { -	if (domain == (AMDGPU_GEM_DOMAIN_VRAM | AMDGPU_GEM_DOMAIN_GTT)) { +	if ((domain == (AMDGPU_GEM_DOMAIN_VRAM | AMDGPU_GEM_DOMAIN_GTT)) && +	    ((adev->asic_type == CHIP_CARRIZO) || (adev->asic_type == CHIP_STONEY))) {  		domain = AMDGPU_GEM_DOMAIN_VRAM;  		if (adev->gmc.real_vram_size <= AMDGPU_SG_THRESHOLD)  			domain = AMDGPU_GEM_DOMAIN_GTT; | 
