diff options
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 138 | 
1 files changed, 44 insertions, 94 deletions
| diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c index 0593ef8fe0a6..81edf66dbea8 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c @@ -26,30 +26,30 @@  #include <drm/drm_drv.h>  #include <drm/drm_fbdev_generic.h>  #include <drm/drm_gem.h> -#include <drm/drm_vblank.h>  #include <drm/drm_managed.h> -#include "amdgpu_drv.h" -  #include <drm/drm_pciids.h> -#include <linux/module.h> -#include <linux/pm_runtime.h> -#include <linux/vga_switcheroo.h>  #include <drm/drm_probe_helper.h> -#include <linux/mmu_notifier.h> -#include <linux/suspend.h> +#include <drm/drm_vblank.h> +  #include <linux/cc_platform.h>  #include <linux/dynamic_debug.h> +#include <linux/module.h> +#include <linux/mmu_notifier.h> +#include <linux/pm_runtime.h> +#include <linux/suspend.h> +#include <linux/vga_switcheroo.h>  #include "amdgpu.h" -#include "amdgpu_irq.h" +#include "amdgpu_amdkfd.h"  #include "amdgpu_dma_buf.h" -#include "amdgpu_sched.h" +#include "amdgpu_drv.h"  #include "amdgpu_fdinfo.h" -#include "amdgpu_amdkfd.h" - +#include "amdgpu_irq.h" +#include "amdgpu_psp.h"  #include "amdgpu_ras.h" -#include "amdgpu_xgmi.h"  #include "amdgpu_reset.h" +#include "amdgpu_sched.h" +#include "amdgpu_xgmi.h"  #include "../amdxcp/amdgpu_xcp_drv.h"  /* @@ -187,7 +187,6 @@ int amdgpu_mes_kiq;  int amdgpu_noretry = -1;  int amdgpu_force_asic_type = -1;  int amdgpu_tmz = -1; /* auto */ -uint amdgpu_freesync_vid_mode;  int amdgpu_reset_method = -1; /* auto */  int amdgpu_num_kcq = -1;  int amdgpu_smartshift_bias; @@ -313,9 +312,7 @@ module_param_named(msi, amdgpu_msi, int, 0444);   * jobs is 10000. The timeout for compute is 60000.   */  MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (default: for bare metal 10000 for non-compute jobs and 60000 for compute jobs; " -		"for passthrough or sriov, 10000 for all jobs." -		" 0: keep default value. negative: infinity timeout), " -		"format: for bare metal [Non-Compute] or [GFX,Compute,SDMA,Video]; " +		"for passthrough or sriov, 10000 for all jobs. 0: keep default value. negative: infinity timeout), format: for bare metal [Non-Compute] or [GFX,Compute,SDMA,Video]; "  		"for passthrough or sriov [all jobs] or [GFX,Compute,SDMA,Video].");  module_param_string(lockup_timeout, amdgpu_lockup_timeout, sizeof(amdgpu_lockup_timeout), 0444); @@ -350,8 +347,9 @@ module_param_named(aspm, amdgpu_aspm, int, 0444);   * Override for runtime power management control for dGPUs. The amdgpu driver can dynamically power down   * the dGPUs when they are idle if supported. The default is -1 (auto enable).   * Setting the value to 0 disables this functionality. + * Setting the value to -2 is auto enabled with power down when displays are attached.   */ -MODULE_PARM_DESC(runpm, "PX runtime pm (2 = force enable with BAMACO, 1 = force enable with BACO, 0 = disable, -1 = auto)"); +MODULE_PARM_DESC(runpm, "PX runtime pm (2 = force enable with BAMACO, 1 = force enable with BACO, 0 = disable, -1 = auto, -2 = autowith displays)");  module_param_named(runpm, amdgpu_runtime_pm, int, 0444);  /** @@ -584,7 +582,7 @@ module_param_named(timeout_period, amdgpu_watchdog_timer.period, uint, 0644);   */  #ifdef CONFIG_DRM_AMDGPU_SI -#if defined(CONFIG_DRM_RADEON) || defined(CONFIG_DRM_RADEON_MODULE) +#if IS_ENABLED(CONFIG_DRM_RADEON) || IS_ENABLED(CONFIG_DRM_RADEON_MODULE)  int amdgpu_si_support = 0;  MODULE_PARM_DESC(si_support, "SI support (1 = enabled, 0 = disabled (default))");  #else @@ -603,7 +601,7 @@ module_param_named(si_support, amdgpu_si_support, int, 0444);   */  #ifdef CONFIG_DRM_AMDGPU_CIK -#if defined(CONFIG_DRM_RADEON) || defined(CONFIG_DRM_RADEON_MODULE) +#if IS_ENABLED(CONFIG_DRM_RADEON) || IS_ENABLED(CONFIG_DRM_RADEON_MODULE)  int amdgpu_cik_support = 0;  MODULE_PARM_DESC(cik_support, "CIK support (1 = enabled, 0 = disabled (default))");  #else @@ -620,8 +618,7 @@ module_param_named(cik_support, amdgpu_cik_support, int, 0444);   * E.g. 0x1 = 256Mbyte, 0x2 = 512Mbyte, 0x4 = 1 Gbyte, 0x8 = 2GByte. The default is 0 (disabled).   */  MODULE_PARM_DESC(smu_memory_pool_size, -	"reserve gtt for smu debug usage, 0 = disable," -		"0x1 = 256Mbyte, 0x2 = 512Mbyte, 0x4 = 1 Gbyte, 0x8 = 2GByte"); +	"reserve gtt for smu debug usage, 0 = disable,0x1 = 256Mbyte, 0x2 = 512Mbyte, 0x4 = 1 Gbyte, 0x8 = 2GByte");  module_param_named(smu_memory_pool_size, amdgpu_smu_memory_pool_size, uint, 0444);  /** @@ -759,20 +756,6 @@ MODULE_PARM_DESC(debug_largebar,  	"Debug large-bar flag used to simulate large-bar capability on non-large bar machine (0 = disable, 1 = enable)");  /** - * DOC: ignore_crat (int) - * Ignore CRAT table during KFD initialization. By default, KFD uses the ACPI CRAT - * table to get information about AMD APUs. This option can serve as a workaround on - * systems with a broken CRAT table. - * - * Default is auto (according to asic type, iommu_v2, and crat table, to decide - * whether use CRAT) - */ -int ignore_crat; -module_param(ignore_crat, int, 0444); -MODULE_PARM_DESC(ignore_crat, -	"Ignore CRAT table during KFD initialization (0 = auto (default), 1 = ignore CRAT)"); - -/**   * DOC: halt_if_hws_hang (int)   * Halt if HWS hang is detected. Default value, 0, disables the halt on hang.   * Setting 1 enables halt on hang. @@ -791,9 +774,9 @@ module_param(hws_gws_support, bool, 0444);  MODULE_PARM_DESC(hws_gws_support, "Assume MEC2 FW supports GWS barriers (false = rely on FW version check (Default), true = force supported)");  /** -  * DOC: queue_preemption_timeout_ms (int) -  * queue preemption timeout in ms (1 = Minimum, 9000 = default) -  */ + * DOC: queue_preemption_timeout_ms (int) + * queue preemption timeout in ms (1 = Minimum, 9000 = default) + */  int queue_preemption_timeout_ms = 9000;  module_param(queue_preemption_timeout_ms, int, 0644);  MODULE_PARM_DESC(queue_preemption_timeout_ms, "queue preemption timeout in ms (1 = Minimum, 9000 = default)"); @@ -889,32 +872,6 @@ MODULE_PARM_DESC(tmz, "Enable TMZ feature (-1 = auto (default), 0 = off, 1 = on)  module_param_named(tmz, amdgpu_tmz, int, 0444);  /** - * DOC: freesync_video (uint) - * Enable the optimization to adjust front porch timing to achieve seamless - * mode change experience when setting a freesync supported mode for which full - * modeset is not needed. - * - * The Display Core will add a set of modes derived from the base FreeSync - * video mode into the corresponding connector's mode list based on commonly - * used refresh rates and VRR range of the connected display, when users enable - * this feature. From the userspace perspective, they can see a seamless mode - * change experience when the change between different refresh rates under the - * same resolution. Additionally, userspace applications such as Video playback - * can read this modeset list and change the refresh rate based on the video - * frame rate. Finally, the userspace can also derive an appropriate mode for a - * particular refresh rate based on the FreeSync Mode and add it to the - * connector's mode list. - * - * Note: This is an experimental feature. - * - * The default value: 0 (off). - */ -MODULE_PARM_DESC( -	freesync_video, -	"Enable freesync modesetting optimization feature (0 = off (default), 1 = on)"); -module_param_named(freesync_video, amdgpu_freesync_vid_mode, uint, 0444); - -/**   * DOC: reset_method (int)   * GPU reset method (-1 = auto (default), 0 = legacy, 1 = mode0, 2 = mode1, 3 = mode2, 4 = baco)   */ @@ -2417,7 +2374,6 @@ static void amdgpu_drv_delayed_reset_work_handler(struct work_struct *work)  			amdgpu_amdkfd_device_init(adev);  		amdgpu_ttm_set_buffer_funcs_status(adev, true);  	} -	return;  }  static int amdgpu_pmops_prepare(struct device *dev) @@ -2541,24 +2497,26 @@ static int amdgpu_runtime_idle_check_display(struct device *dev)  		struct drm_connector_list_iter iter;  		int ret = 0; -		/* XXX: Return busy if any displays are connected to avoid -		 * possible display wakeups after runtime resume due to -		 * hotplug events in case any displays were connected while -		 * the GPU was in suspend.  Remove this once that is fixed. -		 */ -		mutex_lock(&drm_dev->mode_config.mutex); -		drm_connector_list_iter_begin(drm_dev, &iter); -		drm_for_each_connector_iter(list_connector, &iter) { -			if (list_connector->status == connector_status_connected) { -				ret = -EBUSY; -				break; +		if (amdgpu_runtime_pm != -2) { +			/* XXX: Return busy if any displays are connected to avoid +			 * possible display wakeups after runtime resume due to +			 * hotplug events in case any displays were connected while +			 * the GPU was in suspend.  Remove this once that is fixed. +			 */ +			mutex_lock(&drm_dev->mode_config.mutex); +			drm_connector_list_iter_begin(drm_dev, &iter); +			drm_for_each_connector_iter(list_connector, &iter) { +				if (list_connector->status == connector_status_connected) { +					ret = -EBUSY; +					break; +				}  			} -		} -		drm_connector_list_iter_end(&iter); -		mutex_unlock(&drm_dev->mode_config.mutex); +			drm_connector_list_iter_end(&iter); +			mutex_unlock(&drm_dev->mode_config.mutex); -		if (ret) -			return ret; +			if (ret) +				return ret; +		}  		if (adev->dc_enabled) {  			struct drm_crtc *crtc; @@ -2614,6 +2572,7 @@ static int amdgpu_pmops_runtime_suspend(struct device *dev)  	/* wait for all rings to drain before suspending */  	for (i = 0; i < AMDGPU_MAX_RINGS; i++) {  		struct amdgpu_ring *ring = adev->rings[i]; +  		if (ring && ring->sched.ready) {  			ret = amdgpu_fence_wait_empty(ring);  			if (ret) @@ -2738,6 +2697,7 @@ long amdgpu_drm_ioctl(struct file *filp,  	struct drm_file *file_priv = filp->private_data;  	struct drm_device *dev;  	long ret; +  	dev = file_priv->minor->dev;  	ret = pm_runtime_get_sync(dev->dev);  	if (ret < 0) @@ -2802,9 +2762,8 @@ int amdgpu_file_to_fpriv(struct file *filp, struct amdgpu_fpriv **fpriv)  	if (!filp)  		return -EINVAL; -	if (filp->f_op != &amdgpu_driver_kms_fops) { +	if (filp->f_op != &amdgpu_driver_kms_fops)  		return -EINVAL; -	}  	file = filp->private_data;  	*fpriv = file->driver_priv; @@ -2850,10 +2809,7 @@ static const struct drm_driver amdgpu_kms_driver = {  	.show_fdinfo = amdgpu_show_fdinfo,  #endif -	.prime_handle_to_fd = drm_gem_prime_handle_to_fd, -	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,  	.gem_prime_import = amdgpu_gem_prime_import, -	.gem_prime_mmap = drm_gem_prime_mmap,  	.name = DRIVER_NAME,  	.desc = DRIVER_DESC, @@ -2877,10 +2833,7 @@ const struct drm_driver amdgpu_partition_driver = {  	.fops = &amdgpu_driver_kms_fops,  	.release = &amdgpu_driver_release_kms, -	.prime_handle_to_fd = drm_gem_prime_handle_to_fd, -	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,  	.gem_prime_import = amdgpu_gem_prime_import, -	.gem_prime_mmap = drm_gem_prime_mmap,  	.name = DRIVER_NAME,  	.desc = DRIVER_DESC, @@ -2897,16 +2850,13 @@ static struct pci_error_handlers amdgpu_pci_err_handler = {  	.resume		= amdgpu_pci_resume,  }; -extern const struct attribute_group amdgpu_vram_mgr_attr_group; -extern const struct attribute_group amdgpu_gtt_mgr_attr_group; -  static const struct attribute_group *amdgpu_sysfs_groups[] = {  	&amdgpu_vram_mgr_attr_group,  	&amdgpu_gtt_mgr_attr_group, +	&amdgpu_flash_attr_group,  	NULL,  }; -  static struct pci_driver amdgpu_kms_pci_driver = {  	.name = DRIVER_NAME,  	.id_table = pciidlist, | 
