diff options
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 21 | 
1 files changed, 13 insertions, 8 deletions
| diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c index d891ab779ca7..5cc5f59e3018 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c @@ -1105,7 +1105,7 @@ static int amdgpu_cs_vm_handling(struct amdgpu_cs_parser *p)  	 * We can't use gang submit on with reserved VMIDs when the VM changes  	 * can't be invalidated by more than one engine at the same time.  	 */ -	if (p->gang_size > 1 && !p->adev->vm_manager.concurrent_flush) { +	if (p->gang_size > 1 && !adev->vm_manager.concurrent_flush) {  		for (i = 0; i < p->gang_size; ++i) {  			struct drm_sched_entity *entity = p->entities[i];  			struct drm_gpu_scheduler *sched = entity->rq->sched; @@ -1189,7 +1189,7 @@ static int amdgpu_cs_vm_handling(struct amdgpu_cs_parser *p)  			if (!bo)  				continue; -			amdgpu_vm_bo_invalidate(adev, bo, false); +			amdgpu_vm_bo_invalidate(bo, false);  		}  	} @@ -1801,13 +1801,18 @@ int amdgpu_cs_find_mapping(struct amdgpu_cs_parser *parser,  	if (dma_resv_locking_ctx((*bo)->tbo.base.resv) != &parser->exec.ticket)  		return -EINVAL; +	/* Make sure VRAM is allocated contigiously */  	(*bo)->flags |= AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS; -	amdgpu_bo_placement_from_domain(*bo, (*bo)->allowed_domains); -	for (i = 0; i < (*bo)->placement.num_placement; i++) -		(*bo)->placements[i].flags |= TTM_PL_FLAG_CONTIGUOUS; -	r = ttm_bo_validate(&(*bo)->tbo, &(*bo)->placement, &ctx); -	if (r) -		return r; +	if ((*bo)->tbo.resource->mem_type == TTM_PL_VRAM && +	    !((*bo)->tbo.resource->placement & TTM_PL_FLAG_CONTIGUOUS)) { + +		amdgpu_bo_placement_from_domain(*bo, (*bo)->allowed_domains); +		for (i = 0; i < (*bo)->placement.num_placement; i++) +			(*bo)->placements[i].flags |= TTM_PL_FLAG_CONTIGUOUS; +		r = ttm_bo_validate(&(*bo)->tbo, &(*bo)->placement, &ctx); +		if (r) +			return r; +	}  	return amdgpu_ttm_alloc_gart(&(*bo)->tbo);  } | 
