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authorYang Yingliang <yangyingliang@huawei.com>2023-04-24 10:19:04 +0100
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2023-04-26 13:51:56 +0200
commit4aed6b5809bb8629f45d5cee1938fd518aa66320 (patch)
treefd7991f98b30fd56b4e2111d5e0807b92b069567
parent71e7ed6e3aa9e7c745ed3d7ccf634a1f9f094497 (diff)
soc: sifive: l2_cache: fix missing of_node_put() in sifive_l2_init()
commit 8fbf94fea0b4e187ca9100936c5429f96b8a4e44 upstream. The device_node pointer returned by of_find_matching_node() with refcount incremented, when finish using it, the refcount need be decreased. Fixes: a967a289f169 ("RISC-V: sifive_l2_cache: Add L2 cache controller driver for SiFive SoCs") Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> [conor: cache -> l2_cache] Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--drivers/soc/sifive/sifive_l2_cache.c15
1 files changed, 11 insertions, 4 deletions
diff --git a/drivers/soc/sifive/sifive_l2_cache.c b/drivers/soc/sifive/sifive_l2_cache.c
index 1248127009f6..783158070490 100644
--- a/drivers/soc/sifive/sifive_l2_cache.c
+++ b/drivers/soc/sifive/sifive_l2_cache.c
@@ -202,12 +202,16 @@ static int __init sifive_l2_init(void)
if (!np)
return -ENODEV;
- if (of_address_to_resource(np, 0, &res))
- return -ENODEV;
+ if (of_address_to_resource(np, 0, &res)) {
+ rc = -ENODEV;
+ goto err_node_put;
+ }
l2_base = ioremap(res.start, resource_size(&res));
- if (!l2_base)
- return -ENOMEM;
+ if (!l2_base) {
+ rc = -ENOMEM;
+ goto err_node_put;
+ }
intr_num = of_property_count_u32_elems(np, "interrupts");
if (!intr_num) {
@@ -224,6 +228,7 @@ static int __init sifive_l2_init(void)
goto err_free_irq;
}
}
+ of_node_put(np);
l2_config_read();
@@ -240,6 +245,8 @@ err_free_irq:
free_irq(g_irq[i], NULL);
err_unmap:
iounmap(l2_base);
+err_node_put:
+ of_node_put(np);
return rc;
}
device_initcall(sifive_l2_init);