diff options
| author | YueHaibing <yuehaibing@huawei.com> | 2020-03-03 16:56:04 +0800 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2023-09-02 09:19:18 +0200 |
| commit | 94aef0fe5a82b68080e6fcfb579ed085ba4e1bb8 (patch) | |
| tree | d335af0f8d87f4fb7cb6c70bbe803748b2cbc970 | |
| parent | b29a10fd0734b92adec2bbfb2fa8e8c42a55d330 (diff) | |
powerpc/pmac/smp: Drop unnecessary volatile qualifier
commit a4037d1f1fc4e92b69d7196d4568c33078d465ea upstream.
core99_l2_cache/core99_l3_cache do not need to be marked as volatile,
remove it.
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20200303085604.24952-1-yuehaibing@huawei.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| -rw-r--r-- | arch/powerpc/platforms/powermac/smp.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/powerpc/platforms/powermac/smp.c b/arch/powerpc/platforms/powermac/smp.c index 4a2a1b2529b3..d2900689d642 100644 --- a/arch/powerpc/platforms/powermac/smp.c +++ b/arch/powerpc/platforms/powermac/smp.c @@ -664,8 +664,8 @@ static void core99_init_caches(int cpu) { #ifndef CONFIG_PPC64 /* L2 and L3 cache settings to pass from CPU0 to CPU1 on G4 cpus */ - volatile static long int core99_l2_cache; - volatile static long int core99_l3_cache; + static long int core99_l2_cache; + static long int core99_l3_cache; if (!cpu_has_feature(CPU_FTR_L2CR)) return; |