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authorCharles Keepax <ckeepax@opensource.cirrus.com>2025-08-21 09:26:37 +0100
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2025-09-25 11:13:48 +0200
commitccba708502b6623923963659b7a42a752c5ca226 (patch)
tree9253f73fa708ba1a0320e075fe1ada6d52308259
parent695673eb5711ee5eb1769481cf1503714716a7d1 (diff)
ASoC: wm8940: Correct PLL rate rounding
[ Upstream commit d05afb53c683ef7ed1228b593c3360f4d3126c58 ] Using a single value of 22500000 for both 48000Hz and 44100Hz audio will sometimes result in returning wrong dividers due to rounding. Update the code to use the actual value for both. Fixes: 294833fc9eb4 ("ASoC: wm8940: Rewrite code to set proper clocks") Reported-by: Ankur Tyagi <ankur.tyagi85@gmail.com> Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Tested-by: Ankur Tyagi <ankur.tyagi85@gmail.com> Link: https://patch.msgid.link/20250821082639.1301453-2-ckeepax@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
-rw-r--r--sound/soc/codecs/wm8940.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/sound/soc/codecs/wm8940.c b/sound/soc/codecs/wm8940.c
index 8a532f7d750c..5e8ed8a2c270 100644
--- a/sound/soc/codecs/wm8940.c
+++ b/sound/soc/codecs/wm8940.c
@@ -693,7 +693,12 @@ static int wm8940_update_clocks(struct snd_soc_dai *dai)
f = wm8940_get_mclkdiv(priv->mclk, fs256, &mclkdiv);
if (f != priv->mclk) {
/* The PLL performs best around 90MHz */
- fpll = wm8940_get_mclkdiv(22500000, fs256, &mclkdiv);
+ if (fs256 % 8000)
+ f = 22579200;
+ else
+ f = 24576000;
+
+ fpll = wm8940_get_mclkdiv(f, fs256, &mclkdiv);
}
wm8940_set_dai_pll(dai, 0, 0, priv->mclk, fpll);