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authorBorislav Petkov (AMD) <bp@alien8.de>2025-07-11 21:30:39 +0200
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2025-07-14 15:54:48 +0200
commit9a0b9bb2f25aa1bb2fc2b8ebee98227de99aaa2a (patch)
tree3e9e5d7ade30efbcf123d28e3f98bb93b6dbb3b7
parentdfc486ec9cce9eaaeb72cca8fcf04cd1ed230905 (diff)
x86/CPU/AMD: Properly check the TSA microcode
In order to simplify backports, I resorted to an older version of the microcode revision checking which didn't pull in the whole struct x86_cpu_id matching machinery. My simpler method, however, forgot to add the extended CPU model to the patch revision, which lead to mismatches when determining whether TSA mitigation support is present. So add that forgotten extended model. Also, fix a backport mismerge which put tsa_init() where it doesn't belong. This is a stable-only fix and the preference is to do it this way because it is a lot simpler. Also, the Fixes: tag below points to the respective stable patch. Fixes: 90293047df18 ("x86/bugs: Add a Transient Scheduler Attacks mitigation") Reported-by: Thomas Voegtle <tv@lio96.de> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Message-ID: <04ea0a8e-edb0-c59e-ce21-5f3d5d167af3@lio96.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--arch/x86/kernel/cpu/amd.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 3e3679709e90..4785d41558d6 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -561,6 +561,7 @@ static bool amd_check_tsa_microcode(void)
p.ext_fam = c->x86 - 0xf;
p.model = c->x86_model;
+ p.ext_model = c->x86_model >> 4;
p.stepping = c->x86_stepping;
if (c->x86 == 0x19) {
@@ -675,6 +676,8 @@ static void bsp_init_amd(struct cpuinfo_x86 *c)
}
resctrl_cpu_detect(c);
+
+ tsa_init(c);
}
static void early_detect_mem_encrypt(struct cpuinfo_x86 *c)
@@ -719,8 +722,6 @@ static void early_detect_mem_encrypt(struct cpuinfo_x86 *c)
goto clear_sev;
- tsa_init(c);
-
return;
clear_all: