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Add workaround for broken systems that advertise 8 bit APIC ids
but only match IPIs on 4 bits of the APIC id.
Message-ID: <20241222014306.430098-4-damien@zamaudio.com>
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Fixes ESR==0x8 error on AMD fam15h. Fixed timings.
Cannot locate documentation on correct mode for STARTUP IPI,
but this patch works on AMD hw and qemu.
Message-ID: <20241222014306.430098-3-damien@zamaudio.com>
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Now that things are in place, we switch to parallel init.
The key to this change is that the INIT/STARTUP sequence
is done in one step, and all cpus wake up at the same time.
Synchronisation is done via waiting for individual flags stored
in separate memory locations.
Message-ID: <20241222014306.430098-2-damien@zamaudio.com>
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This allocates a constant space for percpu gdts
and copies the first entry to the nth entry on each cpu,
then patches its own copy of the gdt so it can function
independently.
Message-ID: <20241221235456.423860-2-damien@zamaudio.com>
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Previously, we were ignoring cpus that were not enabled
but online-capable.
Message-ID: <20241221023937.384420-1-damien@zamaudio.com>
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This is basically a no-op but ensures we are doing smp
bringup correctly.
Message-ID: <20241210072926.911061-5-damien@zamaudio.com>
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The number is actually a mask bit per cpu.
Message-ID: <20241210072926.911061-2-damien@zamaudio.com>
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On SMP builds with 2 CPU cores, we've seen whole-system lock-ups caused
by irqdev.tot_num_intr getting set to -1, even though it's supposed to
always stay non-negative. Indeed, it was modified without the
appropriate synchronization. Fix this by protecting it, as well as
various other internals of device/intr with a simple_lock_irq.
Reported-by: Damien Zammit <damien@zamaudio.com>
Signed-off-by: Sergey Bugaev <bugaevc@gmail.com>
Message-ID: <20241210115705.710555-3-bugaevc@gmail.com>
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'true' and 'false' are keywords in C23. This will equally be an issue on
older standards if something pulls in stdbool.h, which make these into
macros. In either of these two cases, just typedef 'boolean' from
'bool' (avoiding the enum), and rely on 'true' and 'false' being valid
values of the type.
Signed-off-by: Sergey Bugaev <bugaevc@gmail.com>
Message-ID: <20241210115705.710555-2-bugaevc@gmail.com>
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Fixes Wincompatible-pointer-types errors on GCC 15.
Signed-off-by: Sergey Bugaev <bugaevc@gmail.com>
Message-ID: <20241210115705.710555-1-bugaevc@gmail.com>
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The condition was intended for non-BSP processors to
disable timer, but apic_id != 0 means it could affect BSP
if its apic id is non-zero. Fixes this bug.
Message-ID: <20241209121706.879984-7-damien@zamaudio.com>
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Since modern x86 cpus only support 4 bits of destination field
in ICR, we could only address up to 16 processors, assuming
their physical APIC ID was < 0x10. Some processors eg AMD fam15h
have physical apic ids starting at 0x10 but only support 4 bits.
So these lapics are unaddressable using physical destination mode.
Therefore, we switch to using logical destinations for IPIs which
gives us 8 bits of unique mask for addressing up to 8 groups of processors.
INIT and STARTUP is not changed here.
Message-ID: <20241209121706.879984-6-damien@zamaudio.com>
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Prepare for smp parallel init where we want to call these
two functions on different cpus at different times.
Message-ID: <20241209121706.879984-5-damien@zamaudio.com>
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Since we just set up the gs segment, we can use
CPU_NUMBER instead of CPU_NUMBER_NO_STACK.
Message-ID: <20241209121706.879984-3-damien@zamaudio.com>
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The current segmentation already adds -KERNELBASE.
But only when accessing the memory.
Message-ID: <20241209121706.879984-2-damien@zamaudio.com>
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Non-master processors cannot have cpu_number() == 0.
The synchronisation fails hard if the cpu number is wrong.
Alert the condition if this is the case.
(On AMD fam15h, this assert currently fails, but I haven't
been able to boot it with smp yet either).
Message-ID: <20241207101222.800350-1-damien@zamaudio.com>
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msgh_size is a mach_msg_size_t which represent an unsigned int, so %u
must me used there instead of %d
Message-ID: <20241206134419.6609-1-etienne.brateau@gmail.com>
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Fallthrough was incorrectly using fxsave() instead of
xsave() or xsaveopt().
TESTED: on AMD fam15h: no longer throws "No coprocessor" exception.
Message-ID: <20241205074929.704111-1-damien@zamaudio.com>
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the call vm_page_seg_pull_cache_page() return an vm_page (src) with his
object being locked, as we don’t unlock before doing the vm_page_insert,
it is still lock there, and so trying to relock it cause a deadlock.
Replace this lock by an assert.
This case was not seen as for non-smp locking is a no-op.
Message-ID: <20241202182721.27920-2-etienne.brateau@gmail.com>
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When an irq handler dies, we are decrementing the n_unacked count
and calling __enable_irq() the right number of times, but we need
to decrement the total interrupt count by the number that were lost
and also clear that number.
This fixes a hang when a shared irq handler quits and leaves some
unacked interrupts.
Message-ID: <20241123222020.245519-1-damien@zamaudio.com>
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Message-ID: <20241119191048.43597-1-etienne.brateau@gmail.com>
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Message-ID: <20241027092828.3162279-1-damien@zamaudio.com>
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This change forces multiboot loader to provide video mode info
and also sets the preferred video mode to EGA text to ensure
existing console behaviour still works.
When support for graphical consoles is provided, we can change
the preferred mode to linear framebuffer.
Message-ID: <20241024001047.3033826-2-damien@zamaudio.com>
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Message-ID: <20241024001047.3033826-1-damien@zamaudio.com>
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* i386/i386at/acpi_parse_apci.c (acpi_print_info): %lx -> %llx
i386/i386at/acpi_parse_apic.c: In function 'acpi_print_info':
i386/i386at/acpi_parse_apic.c:51:25: warning: format '%lx' expects argument of type 'long unsigned int', but argument 2 has type 'phys_addr_t' {aka 'long long unsigned int'} [-Wformat=]
51 | printf(" rsdp = 0x%lx\n", rsdp);
| ~~^ ~~~~
| | |
| | phys_addr_t {aka long long unsigned int}
| long unsigned int
| %llx
Message-ID: <20241022173641.2774-2-jbranso@dismail.de>
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I compiled with ./configure --enable-xen --enable-acpi.
* i386/intel/pmap.c (pmap_bootstrap_xen, pmap_bootstrap,
pmap_set_page_readwrite, pmap_clear_bootstrap_pagetable, pmap_map_mfn,
pmap_expand_level, pmap_collect): Lots of tiny changes. I've copied
in some of the error messages.
cast many variables to (long unsigned int), (vm_offset_t) -> (unsigned
long), %llx <-- (uint64_t) variable,
In file included from i386/intel/pmap.c:63:
i386/intel/pmap.c: In function 'pmap_bootstrap_xen':
i386/intel/pmap.c:703:39: warning: format '%lx' expects argument of type 'long unsigned int', but argument 6 has type 'unsigned int' [-Wformat=]
703 | panic("couldn't pin page %p(%lx)", l1_map[n_l1map], (vm_offset_t) kv_to_ma (l1_map[n_l1map]));
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
i386/intel/pmap.c: In function 'pmap_set_page_readwrite':
i386/intel/pmap.c:897:23: warning: format '%lx' expects argument of type 'long unsigned int', but argument 5 has type 'vm_offset_t' {aka 'unsigned int'} [-Wformat=]
897 | panic("couldn't set hiMMU readwrite for addr %lx(%lx)\n", vaddr, (vm_offset_t) pa_to_ma (paddr));
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ~~~~~
| |
| vm_offset_t {aka unsigned int}
./kern/debug.h:67:50: note: in definition of macro 'panic'
67 | Panic (__FILE__, __LINE__, __FUNCTION__, s, ##__VA_ARGS__)
| ^
i386/intel/pmap.c:897:64: note: format string is defined here
897 | panic("couldn't set hiMMU readwrite for addr %lx(%lx)\n", vaddr, (vm_offset_t) pa_to_ma (paddr));
| ~~^
| |
| long unsigned int
| %x
i386/intel/pmap.c:897:23: warning: format '%lx' expects argument of type 'long unsigned int', but argument 6 has type 'unsigned int' [-Wformat=]
897 | panic("couldn't set hiMMU readwrite for addr %lx(%lx)\n", vaddr, (vm_offset_t) pa_to_ma (paddr));
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
./kern/debug.h:67:50: note: in definition of macro 'panic'
67 | Panic (__FILE__, __LINE__, __FUNCTION__, s, ##__VA_ARGS__)
| ^
i386/intel/pmap.c:897:68: note: format string is defined here
897 | panic("couldn't set hiMMU readwrite for addr %lx(%lx)\n", vaddr, (vm_offset_t) pa_to_ma (paddr));
| ~~^
| |
| long unsigned int
| %x
Message-ID: <20241022173641.2774-1-jbranso@dismail.de>
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This fixes a spurious intnull(9) from occurring on real hardware
during ACPI startup when compiled with --enable-apic
Message-ID: <20241021032217.2915842-1-damien@zamaudio.com>
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* i386/intel/pmap.c (pmap_page_table_page_dealloc): define it only on
the Xen platform. Best not to delete page_alloc, so we know how to do
so if need be.
i386/intel/pmap.c:1265:1: warning: 'pmap_page_table_page_dealloc' defined but not used [-Wunused-function]
1265 | pmap_page_table_page_dealloc(vm_offset_t pa)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
i386/intel/pmap.c:1171:1: warning: 'pmap_page_table_page_alloc' defined but not used [-Wunused-function]
1171 | pmap_page_table_page_alloc(void)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~
Message-ID: <20241020190744.2522-3-jbranso@dismail.de>
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* kern/slab.c(kalloc_init): %lu -> %zu
kern/slab.c: In function 'kalloc_init':
kern/slab.c:1349:33: warning: format '%lu' expects argument of type 'long unsigned int', but argument 3 has type 'size_t' {aka 'unsigned int'} [-Wformat=]
1349 | sprintf(name, "kalloc_%lu", size);
| ~~^ ~~~~
| | |
| | size_t {aka unsigned int}
| long unsigned int
| %u
Message-ID: <20241020190744.2522-2-jbranso@dismail.de>
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* vm/vm_page.c(vm_page_setup): %lu -> %zu
vm/vm_page.c: In function 'vm_page_setup':
vm/vm_page.c:1425:41: warning: format '%lu' expects argument of type 'long unsigned int', but argument 2 has type 'size_t' {aka 'unsigned int'} [-Wformat=]
1425 | printf("vm_page: page table size: %lu entries (%luk)\n", nr_pages,
| ~~^ ~~~~~~~~
| | |
| long unsigned int size_t {aka unsigned int}
| %u
vm/vm_page.c:1425:54: warning: format '%lu' expects argument of type 'long unsigned int', but argument 3 has type 'size_t' {aka 'unsigned int'} [-Wformat=]
1425 | printf("vm_page: page table size: %lu entries (%luk)\n", nr_pages,
| ~~^
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| long unsigned int
| %u
1426 | table_size >> 10);
| ~~~~~~~~~~~~~~~~
| |
| size_t {aka unsigned int}
Message-ID: <20241020190744.2522-1-jbranso@dismail.de>
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Now that gnumach does not define it any more.
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Message-ID: <20240904201806.510082-2-luca@orpolo.org>
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* i386/i386/fpu.c: extend current getter and setter to support the
extended state; move the struct casting here to reuse the locking
and allocation logic for the thread state; make sure the new state
is set as valid, otherwise it won't be applied; add
i386_get_xstate_size() to dynamically retrieve the FPU state size.
* i386/i386/fpu.h: update prototypes to accept generic thread state
* i386/i386/pcb.c: forward raw thread state to getter and setter, only
checking for minimum size and use the new i386_get_xstate_size()
helper.
* i386/include/mach/i386/mach_i386.defs: expose the new helper
i386_get_xstate_size().
* i386/include/mach/i386/thread_status.h: add interface definition for
I386_XFLOAT_STATE and the corresponding data structure.
Message-ID: <20240904201806.510082-1-luca@orpolo.org>
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* x86_64/locore.S: adjust to the changes in the thread state
structure (segment registers), and add the missing opcode.
Message-ID: <20240904201806.510082-3-luca@orpolo.org>
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* tests/test-machmsg.c: add two use cases used by glibc during signal
handling
* tests/include/testlib.h
* tests/testlib.c: add new wait_thread_terminated() helper
Message-ID: <20240821163616.189307-3-luca@orpolo.org>
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struct i386_xfp_xstate_header header is at offset 440 of struct
i386_xfp_save, so not a multiple of 64 anyway.
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Message-ID: <6qm4fdtthi5nrmmleum7z2xemxz77adohed454eaeuzlmvfx4d@l3pyff4tqwry>
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Remove unnecessary definitions from sys/types.h.
Message-ID: <oitneneybjishhqq7bgedkasrqqd6nq7vselruaacw27sbe47e@6rt3xbi7fnie>
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Message-ID: <4cea36qrjeo7tkklmqcwgkrxstxiqykdofha65zxmpni2o6lp3@2offokab6fvn>
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with -Werror=incompatible-pointer-types and
-Werror=implicit-function-declaration.
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