diff options
Diffstat (limited to 'sysdeps/x86_64')
| -rw-r--r-- | sysdeps/x86_64/bzero.S | 4 | ||||
| -rw-r--r-- | sysdeps/x86_64/cacheinfo.c | 38 | ||||
| -rwxr-xr-x | sysdeps/x86_64/elf/configure | 8 | ||||
| -rw-r--r-- | sysdeps/x86_64/memset.S | 32 |
4 files changed, 51 insertions, 31 deletions
diff --git a/sysdeps/x86_64/bzero.S b/sysdeps/x86_64/bzero.S index 2688f456b5..f96d567fd8 100644 --- a/sysdeps/x86_64/bzero.S +++ b/sysdeps/x86_64/bzero.S @@ -1,3 +1 @@ -#define memset __bzero -#include <sysdeps/x86_64/memset.S> -weak_alias (__bzero, bzero) +/* Implemented in memset.S. */ diff --git a/sysdeps/x86_64/cacheinfo.c b/sysdeps/x86_64/cacheinfo.c index 12102fea81..83e7b3c60b 100644 --- a/sysdeps/x86_64/cacheinfo.c +++ b/sysdeps/x86_64/cacheinfo.c @@ -404,9 +404,24 @@ long int __x86_64_data_cache_size_half attribute_hidden = 32 * 1024 / 2; /* Shared cache size for use in memory and string routines, typically L2 or L3 size. */ long int __x86_64_shared_cache_size_half attribute_hidden = 1024 * 1024 / 2; +#ifdef NOT_USED_RIGHT_NOW +long int __x86_64_shared_cache_size attribute_hidden = 1024 * 1024; +#endif /* PREFETCHW support flag for use in memory and string routines. */ int __x86_64_prefetchw attribute_hidden; +#ifdef NOT_USED_RIGHT_NOW +/* Instructions preferred for memory and string routines. + + 0: Regular instructions + 1: MMX instructions + 2: SSE2 instructions + 3: SSSE3 instructions + + */ +int __x86_64_preferred_memory_instruction attribute_hidden; +#endif + static void __attribute__((constructor)) @@ -444,6 +459,19 @@ init_cacheinfo (void) shared = handle_intel (_SC_LEVEL2_CACHE_SIZE, max_cpuid); } + asm volatile ("cpuid" + : "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx) + : "0" (1)); + +#ifdef NOT_USED_RIGHT_NOW + /* Intel prefers SSSE3 instructions for memory/string rountines + if they are avaiable. */ + if ((ecx & 0x200)) + __x86_64_preferred_memory_instruction = 3; + else + __x86_64_preferred_memory_instruction = 2; +#endif + /* Figure out the number of logical threads that share the highest cache level. */ if (max_cpuid >= 4) @@ -472,9 +500,6 @@ init_cacheinfo (void) { intel_bug_no_cache_info: /* Assume that all logical threads share the highest cache level. */ - asm volatile ("cpuid" - : "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx) - : "0" (1)); threads = (ebx >> 16) & 0xff; } @@ -549,5 +574,10 @@ init_cacheinfo (void) __x86_64_data_cache_size_half = data / 2; if (shared > 0) - __x86_64_shared_cache_size_half = shared / 2; + { + __x86_64_shared_cache_size_half = shared / 2; +#ifdef NOT_USED_RIGHT_NOW + __x86_64_shared_cache_size = shared; +#endif + } } diff --git a/sysdeps/x86_64/elf/configure b/sysdeps/x86_64/elf/configure index 24eff6284d..7a2e3004a5 100755 --- a/sysdeps/x86_64/elf/configure +++ b/sysdeps/x86_64/elf/configure @@ -3,8 +3,8 @@ if test "$usetls" != no; then # Check for support of thread-local storage handling in assembler and linker. -echo "$as_me:$LINENO: checking for x86-64 TLS support" >&5 -echo $ECHO_N "checking for x86-64 TLS support... $ECHO_C" >&6 +{ echo "$as_me:$LINENO: checking for x86-64 TLS support" >&5 +echo $ECHO_N "checking for x86-64 TLS support... $ECHO_C" >&6; } if test "${libc_cv_x86_64_tls+set}" = set; then echo $ECHO_N "(cached) $ECHO_C" >&6 else @@ -33,8 +33,8 @@ else fi rm -f conftest* fi -echo "$as_me:$LINENO: result: $libc_cv_x86_64_tls" >&5 -echo "${ECHO_T}$libc_cv_x86_64_tls" >&6 +{ echo "$as_me:$LINENO: result: $libc_cv_x86_64_tls" >&5 +echo "${ECHO_T}$libc_cv_x86_64_tls" >&6; } if test $libc_cv_x86_64_tls = yes; then cat >>confdefs.h <<\_ACEOF #define HAVE_TLS_SUPPORT 1 diff --git a/sysdeps/x86_64/memset.S b/sysdeps/x86_64/memset.S index 1c421c75f3..db39b09c89 100644 --- a/sysdeps/x86_64/memset.S +++ b/sysdeps/x86_64/memset.S @@ -1,6 +1,6 @@ /* memset/bzero -- set memory area to CH/0 Optimized version for x86-64. - Copyright (C) 2002, 2003, 2004, 2005 Free Software Foundation, Inc. + Copyright (C) 2002, 2003, 2004, 2005, 2007 Free Software Foundation, Inc. This file is part of the GNU C Library. Contributed by Andreas Jaeger <aj@suse.de>. @@ -24,37 +24,35 @@ #include "bp-sym.h" #include "bp-asm.h" -/* BEWARE: `#ifdef memset' means that memset is redefined as `bzero' */ -#define BZERO_P (defined memset) - /* This is somehow experimental and could made dependend on the cache size. */ #define LARGE $120000 .text -#if !BZERO_P && defined PIC && !defined NOT_IN_libc +#ifndef NOT_IN_libc +ENTRY(bzero) + mov %rsi,%rdx /* Adjust parameter. */ + xorl %esi,%esi /* Fill with 0s. */ + jmp L(memset_entry) +END(bzero) +#endif + +#if defined PIC && !defined NOT_IN_libc ENTRY (__memset_chk) cmpq %rdx, %rcx jb HIDDEN_JUMPTARGET (__chk_fail) END (__memset_chk) #endif ENTRY (memset) -#if BZERO_P - mov %rsi,%rdx /* Adjust parameter. */ - xorl %esi,%esi /* Fill with 0s. */ -#endif +L(memset_entry): cmp $0x7,%rdx /* Check for small length. */ mov %rdi,%rcx /* Save ptr as return value. */ jbe 7f -#if BZERO_P - mov %rsi,%r8 /* Just copy 0. */ -#else /* Populate 8 bit data to full 64-bit. */ movabs $0x0101010101010101,%r8 movzbl %sil,%eax imul %rax,%r8 -#endif test $0x7,%edi /* Check for alignment. */ je 2f @@ -109,12 +107,8 @@ ENTRY (memset) dec %rdx jne 8b 9: -#if BZERO_P - nop -#else /* Load result (only if used as memset). */ mov %rdi,%rax /* start address of destination is result */ -#endif retq .p2align 4 @@ -135,11 +129,9 @@ ENTRY (memset) jmp 4b END (memset) -#if !BZERO_P libc_hidden_builtin_def (memset) -#endif -#if !BZERO_P && defined PIC && !defined NOT_IN_libc +#if defined PIC && !defined NOT_IN_libc strong_alias (__memset_chk, __memset_zero_constant_len_parameter) .section .gnu.warning.__memset_zero_constant_len_parameter .string "memset used with constant zero length parameter; this could be due to transposed parameters" |