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-rw-r--r--sysdeps/unix/sysv/linux/powerpc/bits/libc-vdso.h32
1 files changed, 26 insertions, 6 deletions
diff --git a/sysdeps/unix/sysv/linux/powerpc/bits/libc-vdso.h b/sysdeps/unix/sysv/linux/powerpc/bits/libc-vdso.h
index ba54de4eb0..31dd15ecc4 100644
--- a/sysdeps/unix/sysv/linux/powerpc/bits/libc-vdso.h
+++ b/sysdeps/unix/sysv/linux/powerpc/bits/libc-vdso.h
@@ -41,12 +41,32 @@ extern void *__vdso_sigtramp32;
extern void *__vdso_sigtramp_rt32;
#endif
-/* This macro is needed for PPC64 to return a skeleton OPD entry of a vDSO
- symbol. This works because _dl_vdso_vsym always return the function
- address, and no vDSO symbols use the TOC or chain pointers from the OPD
- so we can allow them to be garbage. */
-#if defined(__PPC64__) || defined(__powerpc64__)
-#define VDSO_IFUNC_RET(value) ((void *) &(value))
+#if (defined(__PPC64__) || defined(__powerpc64__)) && _CALL_ELF != 2
+/* The correct solution is for _dl_vdso_vsym to return the address of the OPD
+ for the kernel VDSO function. That address would then be stored in the
+ __vdso_* variables and returned as the result of the IFUNC resolver function.
+ Yet, the kernel does not contain any OPD entries for the VDSO functions
+ (incomplete implementation). However, PLT relocations for IFUNCs still expect
+ the address of an OPD to be returned from the IFUNC resolver function (since
+ PLT entries on PPC64 are just copies of OPDs). The solution for now is to
+ create an artificial static OPD for each VDSO function returned by a resolver
+ function. The TOC value is set to a non-zero value to avoid triggering lazy
+ symbol resolution via .glink0/.plt0 for a zero TOC (requires thread-safe PLT
+ sequences) when the dynamic linker isn't prepared for it e.g. RTLD_NOW. None
+ of the kernel VDSO routines use the TOC or AUX values so any non-zero value
+ will work. Note that function pointer comparisons will not use this artificial
+ static OPD since those are resolved via ADDR64 relocations and will point at
+ the non-IFUNC default OPD for the symbol. Lastly, because the IFUNC relocations
+ are processed immediately at startup the resolver functions and this code need
+ not be thread-safe, but if the caller writes to a PLT slot it must do so in a
+ thread-safe manner with all the required barriers. */
+#define VDSO_IFUNC_RET(value) \
+ ({ \
+ static Elf64_FuncDesc vdso_opd = { .fd_toc = ~0x0 }; \
+ vdso_opd.fd_func = (Elf64_Addr)value; \
+ &vdso_opd; \
+ })
+
#else
#define VDSO_IFUNC_RET(value) ((void *) (value))
#endif