diff options
Diffstat (limited to 'sysdeps/powerpc')
41 files changed, 492 insertions, 157 deletions
diff --git a/sysdeps/powerpc/fpu/fegetenv.c b/sysdeps/powerpc/fpu/fegetenv.c index 53953454cb..3d21abb529 100644 --- a/sysdeps/powerpc/fpu/fegetenv.c +++ b/sysdeps/powerpc/fpu/fegetenv.c @@ -35,4 +35,5 @@ strong_alias (__fegetenv, __old_fegetenv) compat_symbol (libm, BP_SYM (__old_fegetenv), BP_SYM (fegetenv), GLIBC_2_1); #endif +libm_hidden_ver (__fegetenv, fegetenv) versioned_symbol (libm, BP_SYM (__fegetenv), BP_SYM (fegetenv), GLIBC_2_2); diff --git a/sysdeps/powerpc/powerpc32/configure b/sysdeps/powerpc/powerpc32/configure index 9b76c57886..da8ec0b87c 100644 --- a/sysdeps/powerpc/powerpc32/configure +++ b/sysdeps/powerpc/powerpc32/configure @@ -25,11 +25,10 @@ rm -f conftest* fi { $as_echo "$as_me:$LINENO: result: $libc_cv_ppc_rel16" >&5 $as_echo "$libc_cv_ppc_rel16" >&6; } -if test $libc_cv_ppc_rel16 = yes; then - cat >>confdefs.h <<\_ACEOF -#define HAVE_ASM_PPC_REL16 1 -_ACEOF - +if test $libc_cv_ppc_rel16 = no; then + { { $as_echo "$as_me:$LINENO: error: R_PPC_REL16 is not supported. Binutils is too old." >&5 +$as_echo "$as_me: error: R_PPC_REL16 is not supported. Binutils is too old." >&2;} + { (exit 1); exit 1; }; } fi # See whether GCC uses -msecure-plt. diff --git a/sysdeps/powerpc/powerpc32/configure.in b/sysdeps/powerpc/powerpc32/configure.in index 7219ad993e..21d3f5ee5b 100644 --- a/sysdeps/powerpc/powerpc32/configure.in +++ b/sysdeps/powerpc/powerpc32/configure.in @@ -13,8 +13,8 @@ else libc_cv_ppc_rel16=no fi rm -f conftest*]) -if test $libc_cv_ppc_rel16 = yes; then - AC_DEFINE(HAVE_ASM_PPC_REL16) +if test $libc_cv_ppc_rel16 = no; then + AC_MSG_ERROR(R_PPC_REL16 is not supported. Binutils is too old.) fi # See whether GCC uses -msecure-plt. diff --git a/sysdeps/powerpc/powerpc32/dl-machine.h b/sysdeps/powerpc/powerpc32/dl-machine.h index 6f8d0f506e..5351d9691d 100644 --- a/sysdeps/powerpc/powerpc32/dl-machine.h +++ b/sysdeps/powerpc/powerpc32/dl-machine.h @@ -41,16 +41,13 @@ static inline Elf32_Addr * __attribute__ ((const)) ppc_got (void) { Elf32_Addr *got; -#ifdef HAVE_ASM_PPC_REL16 + asm ("bcl 20,31,1f\n" "1: mflr %0\n" " addis %0,%0,_GLOBAL_OFFSET_TABLE_-1b@ha\n" " addi %0,%0,_GLOBAL_OFFSET_TABLE_-1b@l\n" : "=b" (got) : : "lr"); -#else - asm (" bl _GLOBAL_OFFSET_TABLE_-4@local" - : "=l" (got)); -#endif + return got; } diff --git a/sysdeps/powerpc/powerpc32/dl-start.S b/sysdeps/powerpc/powerpc32/dl-start.S index c77c4de198..ae41f47ede 100644 --- a/sysdeps/powerpc/powerpc32/dl-start.S +++ b/sysdeps/powerpc/powerpc32/dl-start.S @@ -47,15 +47,10 @@ _dl_start_user: passed by value!). */ /* Put our GOT pointer in r31, */ -#ifdef HAVE_ASM_PPC_REL16 bcl 20,31,1f 1: mflr r31 addis r31,r31,_GLOBAL_OFFSET_TABLE_-1b@ha addi r31,r31,_GLOBAL_OFFSET_TABLE_-1b@l -#else - bl _GLOBAL_OFFSET_TABLE_-4@local - mflr r31 -#endif /* the address of _start in r30, */ mr r30,r3 /* &_dl_argc in 29, &_dl_argv in 27, and _dl_loaded in 28. */ diff --git a/sysdeps/powerpc/powerpc32/elf/start.S b/sysdeps/powerpc/powerpc32/elf/start.S index a8abdca0c6..dc89a5e109 100644 --- a/sysdeps/powerpc/powerpc32/elf/start.S +++ b/sysdeps/powerpc/powerpc32/elf/start.S @@ -53,10 +53,6 @@ L(start_addresses): ASM_SIZE_DIRECTIVE(L(start_addresses)) .section ".text" -#if defined PIC && !defined HAVE_ASM_PPC_REL16 -L(start_addressesp): - .long L(start_addresses)-L(branch) -#endif ENTRY(_start) /* Save the stack pointer, in case we're statically linked under Linux. */ mr r9,r1 @@ -77,16 +73,10 @@ L(branch): start_addresses in r8. Also load the GOT pointer so that new PLT calls work, like the one to __libc_start_main. */ #ifdef PIC -# ifdef HAVE_ASM_PPC_REL16 addis r30,r13,_GLOBAL_OFFSET_TABLE_-L(branch)@ha addis r8,r13,L(start_addresses)-L(branch)@ha addi r30,r30,_GLOBAL_OFFSET_TABLE_-L(branch)@l lwzu r13,L(start_addresses)-L(branch)@l(r8) -# else - lwz r8,L(start_addressesp)-L(branch)(r13) - add r8,r13,r8 - lwz r13,0(r8) -# endif #else lis r8,L(start_addresses)@ha lwzu r13,L(start_addresses)@l(r8) diff --git a/sysdeps/powerpc/powerpc32/fpu/__longjmp-common.S b/sysdeps/powerpc/powerpc32/fpu/__longjmp-common.S index 04ed6da68b..e1ac064a59 100644 --- a/sysdeps/powerpc/powerpc32/fpu/__longjmp-common.S +++ b/sysdeps/powerpc/powerpc32/fpu/__longjmp-common.S @@ -34,15 +34,10 @@ ENTRY (BP_SYM (__longjmp)) # ifdef PIC mflr r6 cfi_register (lr,r6) -# ifdef HAVE_ASM_PPC_REL16 bcl 20,31,1f 1: mflr r5 addis r5,r5,_GLOBAL_OFFSET_TABLE_-1b@ha addi r5,r5,_GLOBAL_OFFSET_TABLE_-1b@l -# else - bl _GLOBAL_OFFSET_TABLE_@local-4 - mflr r5 -# endif # ifdef SHARED lwz r5,_rtld_global_ro@got(r5) mtlr r6 diff --git a/sysdeps/powerpc/powerpc32/fpu/s_ceil.S b/sysdeps/powerpc/powerpc32/fpu/s_ceil.S index bc74d302fb..80e72ca2bd 100644 --- a/sysdeps/powerpc/powerpc32/fpu/s_ceil.S +++ b/sysdeps/powerpc/powerpc32/fpu/s_ceil.S @@ -31,17 +31,10 @@ ENTRY (__ceil) #ifdef SHARED mflr r11 cfi_register(lr,r11) -# ifdef HAVE_ASM_PPC_REL16 bcl 20,31,1f 1: mflr r9 addis r9,r9,.LC0-1b@ha lfs fp13,.LC0-1b@l(r9) -# else - bl _GLOBAL_OFFSET_TABLE_@local-4 - mflr r10 - lwz r9,.LC0@got(10) - lfs fp13,0(r9) -# endif mtlr r11 cfi_same_value (lr) #else diff --git a/sysdeps/powerpc/powerpc32/fpu/s_ceilf.S b/sysdeps/powerpc/powerpc32/fpu/s_ceilf.S index 47a75ec0c3..ce6d71e4f8 100644 --- a/sysdeps/powerpc/powerpc32/fpu/s_ceilf.S +++ b/sysdeps/powerpc/powerpc32/fpu/s_ceilf.S @@ -30,17 +30,10 @@ ENTRY (__ceilf) #ifdef SHARED mflr r11 cfi_register(lr,r11) -# ifdef HAVE_ASM_PPC_REL16 bcl 20,31,1f 1: mflr r9 addis r9,r9,.LC0-1b@ha lfs fp13,.LC0-1b@l(r9) -# else - bl _GLOBAL_OFFSET_TABLE_@local-4 - mflr r10 - lwz r9,.LC0@got(10) - lfs fp13,0(r9) -# endif mtlr r11 cfi_same_value (lr) #else diff --git a/sysdeps/powerpc/powerpc32/fpu/s_floor.S b/sysdeps/powerpc/powerpc32/fpu/s_floor.S index a29e4791ea..0dd0dbe6c0 100644 --- a/sysdeps/powerpc/powerpc32/fpu/s_floor.S +++ b/sysdeps/powerpc/powerpc32/fpu/s_floor.S @@ -31,17 +31,10 @@ ENTRY (__floor) #ifdef SHARED mflr r11 cfi_register(lr,r11) -# ifdef HAVE_ASM_PPC_REL16 bcl 20,31,1f 1: mflr r9 addis r9,r9,.LC0-1b@ha lfs fp13,.LC0-1b@l(r9) -# else - bl _GLOBAL_OFFSET_TABLE_@local-4 - mflr r10 - lwz r9,.LC0@got(10) - lfs fp13,0(r9) -# endif mtlr r11 cfi_same_value (lr) #else diff --git a/sysdeps/powerpc/powerpc32/fpu/s_floorf.S b/sysdeps/powerpc/powerpc32/fpu/s_floorf.S index 99fbdc5f86..98a47458bc 100644 --- a/sysdeps/powerpc/powerpc32/fpu/s_floorf.S +++ b/sysdeps/powerpc/powerpc32/fpu/s_floorf.S @@ -30,17 +30,10 @@ ENTRY (__floorf) #ifdef SHARED mflr r11 cfi_register(lr,r11) -# ifdef HAVE_ASM_PPC_REL16 bcl 20,31,1f 1: mflr r9 addis r9,r9,.LC0-1b@ha lfs fp13,.LC0-1b@l(r9) -# else - bl _GLOBAL_OFFSET_TABLE_@local-4 - mflr r10 - lwz r9,.LC0@got(10) - lfs fp13,0(r9) -# endif mtlr r11 cfi_same_value (lr) #else diff --git a/sysdeps/powerpc/powerpc32/fpu/s_lround.S b/sysdeps/powerpc/powerpc32/fpu/s_lround.S index d73749e134..3bf1ffaea1 100644 --- a/sysdeps/powerpc/powerpc32/fpu/s_lround.S +++ b/sysdeps/powerpc/powerpc32/fpu/s_lround.S @@ -45,17 +45,10 @@ ENTRY (__lround) #ifdef SHARED mflr r11 cfi_register(lr,r11) -# ifdef HAVE_ASM_PPC_REL16 bcl 20,31,1f 1: mflr r9 addis r9,r9,.LC0-1b@ha lfs fp10,.LC0-1b@l(r9) -# else - bl _GLOBAL_OFFSET_TABLE_@local-4 - mflr r10 - lwz r9,.LC0@got(10) - lfs fp10,0(r9) -# endif mtlr r11 cfi_same_value (lr) #else diff --git a/sysdeps/powerpc/powerpc32/fpu/s_rint.S b/sysdeps/powerpc/powerpc32/fpu/s_rint.S index c8dca313ae..93133718ad 100644 --- a/sysdeps/powerpc/powerpc32/fpu/s_rint.S +++ b/sysdeps/powerpc/powerpc32/fpu/s_rint.S @@ -33,17 +33,10 @@ ENTRY (__rint) #ifdef SHARED mflr r11 cfi_register(lr,r11) -# ifdef HAVE_ASM_PPC_REL16 bcl 20,31,1f 1: mflr r9 addis r9,r9,.LC0-1b@ha lfs fp13,.LC0-1b@l(r9) -# else - bl _GLOBAL_OFFSET_TABLE_@local-4 - mflr r10 - lwz r9,.LC0@got(10) - lfs fp13,0(r9) -# endif mtlr r11 cfi_same_value (lr) #else diff --git a/sysdeps/powerpc/powerpc32/fpu/s_rintf.S b/sysdeps/powerpc/powerpc32/fpu/s_rintf.S index 7771cb2bc8..1e0fbb1f0d 100644 --- a/sysdeps/powerpc/powerpc32/fpu/s_rintf.S +++ b/sysdeps/powerpc/powerpc32/fpu/s_rintf.S @@ -29,17 +29,10 @@ ENTRY (__rintf) #ifdef SHARED mflr r11 cfi_register(lr,r11) -# ifdef HAVE_ASM_PPC_REL16 bcl 20,31,1f 1: mflr r9 addis r9,r9,.LC0-1b@ha lfs fp13,.LC0-1b@l(r9) -# else - bl _GLOBAL_OFFSET_TABLE_@local-4 - mflr r10 - lwz r9,.LC0@got(10) - lfs fp13,0(r9) -# endif mtlr r11 cfi_same_value (lr) #else diff --git a/sysdeps/powerpc/powerpc32/fpu/s_round.S b/sysdeps/powerpc/powerpc32/fpu/s_round.S index 590c87ad8c..48b346e651 100644 --- a/sysdeps/powerpc/powerpc32/fpu/s_round.S +++ b/sysdeps/powerpc/powerpc32/fpu/s_round.S @@ -43,16 +43,10 @@ ENTRY (__round) #ifdef SHARED mflr r11 cfi_register(lr,r11) -# ifdef HAVE_ASM_PPC_REL16 bcl 20,31,1f 1: mflr r9 addis r9,r9,.LC0-1b@ha addi r9,r9,.LC0-1b@l -# else - bl _GLOBAL_OFFSET_TABLE_@local-4 - mflr r10 - lwz r9,.LC0@got(10) -# endif mtlr r11 cfi_same_value (lr) lfs fp13,0(r9) diff --git a/sysdeps/powerpc/powerpc32/fpu/s_roundf.S b/sysdeps/powerpc/powerpc32/fpu/s_roundf.S index 7e99bca315..88125aad06 100644 --- a/sysdeps/powerpc/powerpc32/fpu/s_roundf.S +++ b/sysdeps/powerpc/powerpc32/fpu/s_roundf.S @@ -42,16 +42,10 @@ ENTRY (__roundf ) #ifdef SHARED mflr r11 cfi_register(lr,r11) -# ifdef HAVE_ASM_PPC_REL16 bcl 20,31,1f 1: mflr r9 addis r9,r9,.LC0-1b@ha addi r9,r9,.LC0-1b@l -# else - bl _GLOBAL_OFFSET_TABLE_@local-4 - mflr r10 - lwz r9,.LC0@got(10) -# endif mtlr r11 cfi_same_value (lr) lfs fp13,0(r9) diff --git a/sysdeps/powerpc/powerpc32/fpu/s_trunc.S b/sysdeps/powerpc/powerpc32/fpu/s_trunc.S index 5bc0856b9f..c3c021716a 100644 --- a/sysdeps/powerpc/powerpc32/fpu/s_trunc.S +++ b/sysdeps/powerpc/powerpc32/fpu/s_trunc.S @@ -38,17 +38,10 @@ ENTRY (__trunc) #ifdef SHARED mflr r11 cfi_register(lr,r11) -# ifdef HAVE_ASM_PPC_REL16 bcl 20,31,1f 1: mflr r9 addis r9,r9,.LC0-1b@ha lfs fp13,.LC0-1b@l(r9) -# else - bl _GLOBAL_OFFSET_TABLE_@local-4 - mflr r10 - lwz r9,.LC0@got(10) - lfs fp13,0(r9) -# endif mtlr r11 cfi_same_value (lr) #else diff --git a/sysdeps/powerpc/powerpc32/fpu/s_truncf.S b/sysdeps/powerpc/powerpc32/fpu/s_truncf.S index e2e3bd6740..eddef070cd 100644 --- a/sysdeps/powerpc/powerpc32/fpu/s_truncf.S +++ b/sysdeps/powerpc/powerpc32/fpu/s_truncf.S @@ -37,17 +37,10 @@ ENTRY (__truncf) #ifdef SHARED mflr r11 cfi_register(lr,r11) -# ifdef HAVE_ASM_PPC_REL16 bcl 20,31,1f 1: mflr r9 addis r9,r9,.LC0-1b@ha lfs fp13,.LC0-1b@l(r9) -# else - bl _GLOBAL_OFFSET_TABLE_@local-4 - mflr r10 - lwz r9,.LC0@got(10) - lfs fp13,0(r9) -# endif mtlr r11 cfi_same_value (lr) #else diff --git a/sysdeps/powerpc/powerpc32/fpu/setjmp-common.S b/sysdeps/powerpc/powerpc32/fpu/setjmp-common.S index b7d1abc00d..131e7a332e 100644 --- a/sysdeps/powerpc/powerpc32/fpu/setjmp-common.S +++ b/sysdeps/powerpc/powerpc32/fpu/setjmp-common.S @@ -85,15 +85,10 @@ ENTRY (BP_SYM (__sigsetjmp)) # ifdef PIC mflr r6 cfi_register(lr,r6) -# ifdef HAVE_ASM_PPC_REL16 bcl 20,31,1f 1: mflr r5 addis r5,r5,_GLOBAL_OFFSET_TABLE_-1b@ha addi r5,r5,_GLOBAL_OFFSET_TABLE_-1b@l -# else - bl _GLOBAL_OFFSET_TABLE_@local-4 - mflr r5 -# endif mtlr r6 cfi_same_value (lr) # ifdef SHARED diff --git a/sysdeps/powerpc/powerpc32/memset.S b/sysdeps/powerpc/powerpc32/memset.S index 454abb2b65..b4ce218e24 100644 --- a/sysdeps/powerpc/powerpc32/memset.S +++ b/sysdeps/powerpc/powerpc32/memset.S @@ -256,17 +256,10 @@ L(checklinesize): beq L(medium) /* Establishes GOT addressability so we can load __cache_line_size from static. This value was set from the aux vector during startup. */ -# ifdef HAVE_ASM_PPC_REL16 bcl 20,31,1f 1: mflr rGOT addis rGOT,rGOT,__cache_line_size-1b@ha lwz rCLS,__cache_line_size-1b@l(rGOT) -# else - bl _GLOBAL_OFFSET_TABLE_@local-4 - mflr rGOT - lwz rGOT,__cache_line_size@got(rGOT) - lwz rCLS,0(rGOT) -# endif mtlr rTMP #else /* Load __cache_line_size from static. This value was set from the diff --git a/sysdeps/powerpc/powerpc32/power4/fpu/s_llround.S b/sysdeps/powerpc/powerpc32/power4/fpu/s_llround.S index e10a37977a..b03e041d8a 100644 --- a/sysdeps/powerpc/powerpc32/power4/fpu/s_llround.S +++ b/sysdeps/powerpc/powerpc32/power4/fpu/s_llround.S @@ -53,16 +53,10 @@ ENTRY (__llround) #ifdef SHARED mflr r11 cfi_register(lr,r11) -# ifdef HAVE_ASM_PPC_REL16 bcl 20,31,1f 1: mflr r9 addis r9,r9,.LC0-1b@ha addi r9,r9,.LC0-1b@l -# else - bl _GLOBAL_OFFSET_TABLE_@local-4 - mflr r10 - lwz r9,.LC0@got(10) -# endif mtlr r11 cfi_same_value (lr) lfd fp9,0(r9) diff --git a/sysdeps/powerpc/powerpc32/power4/fpu/w_sqrt.S b/sysdeps/powerpc/powerpc32/power4/fpu/w_sqrt.S index 95a0b3915d..8be3cf1848 100644 --- a/sysdeps/powerpc/powerpc32/power4/fpu/w_sqrt.S +++ b/sysdeps/powerpc/powerpc32/power4/fpu/w_sqrt.S @@ -63,7 +63,6 @@ EALIGN (__sqrt, 5, 0) cfi_offset(lr,20-16) cfi_offset(r30,8-16) #ifdef SHARED -# ifdef HAVE_ASM_PPC_REL16 bcl 20,31,.LCF1 .LCF1: mflr r30 @@ -71,12 +70,6 @@ EALIGN (__sqrt, 5, 0) addi r30,r30,_GLOBAL_OFFSET_TABLE_-.LCF1@l lwz r9,_LIB_VERSION@got(30) lwz r0,0(r9) -# else - bl _GLOBAL_OFFSET_TABLE_@local-4 - mflr r30 - lwz r9,_LIB_VERSION@got(30) - lwz r0,0(r9) -# endif #else lis r9,_LIB_VERSION@ha lwz r0,_LIB_VERSION@l(r9) diff --git a/sysdeps/powerpc/powerpc32/power4/fpu/w_sqrtf.S b/sysdeps/powerpc/powerpc32/power4/fpu/w_sqrtf.S index c31555194b..9fa282c162 100644 --- a/sysdeps/powerpc/powerpc32/power4/fpu/w_sqrtf.S +++ b/sysdeps/powerpc/powerpc32/power4/fpu/w_sqrtf.S @@ -63,7 +63,6 @@ EALIGN (__sqrtf, 5, 0) cfi_offset(lr,20-16) cfi_offset(r30,8-16) #ifdef SHARED -# ifdef HAVE_ASM_PPC_REL16 bcl 20,31,.LCF1 .LCF1: mflr r30 @@ -71,12 +70,6 @@ EALIGN (__sqrtf, 5, 0) addi r30,r30,_GLOBAL_OFFSET_TABLE_-.LCF1@l lwz r9,_LIB_VERSION@got(30) lwz r0,0(r9) -# else - bl _GLOBAL_OFFSET_TABLE_@local-4 - mflr r30 - lwz r9,_LIB_VERSION@got(30) - lwz r0,0(r9) -# endif #else lis r9,_LIB_VERSION@ha lwz r0,_LIB_VERSION@l(r9) diff --git a/sysdeps/powerpc/powerpc32/power5/fpu/w_sqrt.S b/sysdeps/powerpc/powerpc32/power5/fpu/w_sqrt.S index 105b5912a1..27a1a0dcbb 100644 --- a/sysdeps/powerpc/powerpc32/power5/fpu/w_sqrt.S +++ b/sysdeps/powerpc/powerpc32/power5/fpu/w_sqrt.S @@ -63,7 +63,6 @@ EALIGN (__sqrt, 5, 0) cfi_offset(lr,20-16) cfi_offset(r30,8-16) #ifdef SHARED -# ifdef HAVE_ASM_PPC_REL16 bcl 20,31,.LCF1 .LCF1: mflr r30 @@ -71,12 +70,6 @@ EALIGN (__sqrt, 5, 0) addi r30,r30,_GLOBAL_OFFSET_TABLE_-.LCF1@l lwz r9,_LIB_VERSION@got(30) lwz r0,0(r9) -# else - bl _GLOBAL_OFFSET_TABLE_@local-4 - mflr r30 - lwz r9,_LIB_VERSION@got(30) - lwz r0,0(r9) -# endif #else lis r9,_LIB_VERSION@ha lwz r0,_LIB_VERSION@l(r9) diff --git a/sysdeps/powerpc/powerpc32/power5/fpu/w_sqrtf.S b/sysdeps/powerpc/powerpc32/power5/fpu/w_sqrtf.S index 14bc0a2ceb..8914855542 100644 --- a/sysdeps/powerpc/powerpc32/power5/fpu/w_sqrtf.S +++ b/sysdeps/powerpc/powerpc32/power5/fpu/w_sqrtf.S @@ -63,7 +63,6 @@ EALIGN (__sqrtf, 5, 0) cfi_offset(lr,20-16) cfi_offset(r30,8-16) #ifdef SHARED -# ifdef HAVE_ASM_PPC_REL16 bcl 20,31,.LCF1 .LCF1: mflr r30 @@ -71,12 +70,6 @@ EALIGN (__sqrtf, 5, 0) addi r30,r30,_GLOBAL_OFFSET_TABLE_-.LCF1@l lwz r9,_LIB_VERSION@got(30) lwz r0,0(r9) -# else - bl _GLOBAL_OFFSET_TABLE_@local-4 - mflr r30 - lwz r9,_LIB_VERSION@got(30) - lwz r0,0(r9) -# endif #else lis r9,_LIB_VERSION@ha lwz r0,_LIB_VERSION@l(r9) diff --git a/sysdeps/powerpc/powerpc32/power7/Implies b/sysdeps/powerpc/powerpc32/power7/Implies deleted file mode 100644 index 03899d8a3c..0000000000 --- a/sysdeps/powerpc/powerpc32/power7/Implies +++ /dev/null @@ -1 +0,0 @@ -powerpc/powerpc32/power5 diff --git a/sysdeps/powerpc/powerpc32/power7/fpu/Implies b/sysdeps/powerpc/powerpc32/power7/fpu/Implies deleted file mode 100644 index 819a7d7979..0000000000 --- a/sysdeps/powerpc/powerpc32/power7/fpu/Implies +++ /dev/null @@ -1 +0,0 @@ -powerpc/powerpc32/power5/fpu diff --git a/sysdeps/powerpc/powerpc32/power7/fpu/s_finite.S b/sysdeps/powerpc/powerpc32/power7/fpu/s_finite.S new file mode 100644 index 0000000000..5b0d950c74 --- /dev/null +++ b/sysdeps/powerpc/powerpc32/power7/fpu/s_finite.S @@ -0,0 +1,89 @@ +/* finite(). PowerPC32/POWER7 version. + Copyright (C) 2010 Free Software Foundation, Inc. + Contributed by Luis Machado <luisgpm@br.ibm.com>. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, write to the Free + Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA + 02111-1307 USA. */ + +#include <sysdep.h> +#include <math_ldbl_opt.h> + +/* int __finite(x) */ + .section .rodata.cst8,"aM",@progbits,8 + .align 3 +.LC0: /* 1.0 */ + .quad 0x3ff0000000000000 + + .section ".text" + .type __finite, @function + .machine power7 +ENTRY (__finite) +#ifdef SHARED + mflr r11 + cfi_register(lr,r11) + + bcl 20,31,1f +1: mflr r9 + addis r9,r9,.LC0-1b@ha + lfd fp0,.LC0-1b@l(r9) + + mtlr r11 + cfi_same_value (lr) +#else + lis r9,.LC0@ha + lfd fp0,.LC0@l(r9) +#endif + ftdiv cr7,fp1,fp0 + li r3,1 + bflr 30 + + /* We have -INF/+INF/NaN or a denormal. */ + + stwu r1,-16(r1) /* Allocate stack space. */ + stfd fp1,8(r1) /* Transfer FP to GPR's. */ + + ori 2,2,0 /* Force a new dispatch group. */ + lhz r0,8(r1) /* Fetch the upper portion of the high word of + the FP value (where the exponent and sign bits + are). */ + clrlwi r0,r0,17 /* r0 = abs(r0). */ + addi r1,r1,16 /* Reset the stack pointer. */ + cmpwi cr7,r0,0x7ff0 /* r4 == 0x7ff0?. */ + bltlr cr7 /* LT means we have a denormal. */ + li r3,0 + blr + END (__finite) + +hidden_def (__finite) +weak_alias (__finite, finite) + +/* It turns out that the 'double' version will also always work for + single-precision. */ +strong_alias (__finite, __finitef) +hidden_def (__finitef) +weak_alias (__finitef, finitef) + +#ifdef NO_LONG_DOUBLE +strong_alias (__finite, __finitel) +weak_alias (__finite, finitel) +#endif + +#ifndef IS_IN_libm +# if LONG_DOUBLE_COMPAT(libc, GLIBC_2_0) +compat_symbol (libc, __finite, __finitel, GLIBC_2_0); +compat_symbol (libc, finite, finitel, GLIBC_2_0); +# endif +#endif diff --git a/sysdeps/powerpc/powerpc32/power7/fpu/s_finitef.S b/sysdeps/powerpc/powerpc32/power7/fpu/s_finitef.S new file mode 100644 index 0000000000..54bd94176d --- /dev/null +++ b/sysdeps/powerpc/powerpc32/power7/fpu/s_finitef.S @@ -0,0 +1 @@ +/* This function uses the same code as s_finite.S. */ diff --git a/sysdeps/powerpc/powerpc32/power7/fpu/s_isinf.S b/sysdeps/powerpc/powerpc32/power7/fpu/s_isinf.S new file mode 100644 index 0000000000..2979534911 --- /dev/null +++ b/sysdeps/powerpc/powerpc32/power7/fpu/s_isinf.S @@ -0,0 +1,88 @@ +/* isinf(). PowerPC32/POWER7 version. + Copyright (C) 2010 Free Software Foundation, Inc. + Contributed by Luis Machado <luisgpm@br.ibm.com>. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, write to the Free + Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA + 02111-1307 USA. */ + +#include <sysdep.h> +#include <math_ldbl_opt.h> + +/* int __isinf(x) */ + .section .rodata.cst8,"aM",@progbits,8 + .align 3 +.LC0: /* 1.0 */ + .quad 0x3ff0000000000000 + + .section ".text" + .type __isinf, @function + .machine power7 +ENTRY (__isinf) +#ifdef SHARED + mflr r11 + cfi_register(lr,r11) + + bcl 20,31,1f +1: mflr r9 + addis r9,r9,.LC0-1b@ha + lfd fp0,.LC0-1b@l(r9) + + mtlr r11 + cfi_same_value (lr) +#else + lis r9,.LC0@ha + lfd fp0,.LC0@l(r9) +#endif + ftdiv cr7,fp1,fp0 + li r3,0 + bflr 29 /* If not INF, return. */ + + /* Either we have -INF/+INF or a denormal. */ + + stwu r1,-16(r1) /* Allocate stack space. */ + stfd fp1,8(r1) /* Transfer FP to GPR's. */ + ori 2,2,0 /* Force a new dispatch group. */ + lhz r4,8(r1) /* Fetch the upper portion of the high word of + the FP value (where the exponent and sign bits + are). */ + addi r1,r1,16 /* Reset the stack pointer. */ + cmpwi cr7,r4,0x7ff0 /* r4 == 0x7ff0? */ + li r3,1 + beqlr cr7 /* EQ means INF, otherwise -INF. */ + li r3,-1 + blr + END (__isinf) + +hidden_def (__isinf) +weak_alias (__isinf, isinf) + +/* It turns out that the 'double' version will also always work for + single-precision. */ +strong_alias (__isinf, __isinff) +hidden_def (__isinff) +weak_alias (__isinff, isinff) + +#ifdef NO_LONG_DOUBLE +strong_alias (__isinf, __isinfl) +weak_alias (__isinf, isinfl) +#endif + +#ifndef IS_IN_libm +# if LONG_DOUBLE_COMPAT(libc, GLIBC_2_0) +compat_symbol (libc, __isinf, __isinfl, GLIBC_2_0); +compat_symbol (libc, isinf, isinfl, GLIBC_2_0); +# endif +#endif diff --git a/sysdeps/powerpc/powerpc32/power7/fpu/s_isinff.S b/sysdeps/powerpc/powerpc32/power7/fpu/s_isinff.S new file mode 100644 index 0000000000..be759e091e --- /dev/null +++ b/sysdeps/powerpc/powerpc32/power7/fpu/s_isinff.S @@ -0,0 +1 @@ +/* This function uses the same code as s_isinf.S. */ diff --git a/sysdeps/powerpc/powerpc32/power7/fpu/s_isnan.S b/sysdeps/powerpc/powerpc32/power7/fpu/s_isnan.S new file mode 100644 index 0000000000..852539f24b --- /dev/null +++ b/sysdeps/powerpc/powerpc32/power7/fpu/s_isnan.S @@ -0,0 +1,92 @@ +/* isnan(). PowerPC32/POWER7 version. + Copyright (C) 2010 Free Software Foundation, Inc. + Contributed by Luis Machado <luisgpm@br.ibm.com>. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, write to the Free + Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA + 02111-1307 USA. */ + +#include <sysdep.h> +#include <math_ldbl_opt.h> + +/* int __isnan(x) */ + .section .rodata.cst8,"aM",@progbits,8 + .align 3 +.LC0: /* 1.0 */ + .quad 0x3ff0000000000000 + + .section ".text" + .type __isnan, @function + .machine power7 +ENTRY (__isnan) +#ifdef SHARED + mflr r11 + cfi_register(lr,r11) + + bcl 20,31,1f +1: mflr r9 + addis r9,r9,.LC0-1b@ha + lfd fp0,.LC0-1b@l(r9) + + mtlr r11 + cfi_same_value (lr) +#else + lis r9,.LC0@ha + lfd fp0,.LC0@l(r9) +#endif + ftdiv cr7,fp1,fp0 + li r3,0 + bflr 30 /* If not NaN or Inf, finish. */ + + /* We have -INF/+INF/NaN or a denormal. */ + + stwu r1,-16(r1) /* Allocate stack space. */ + stfd fp1,8(r1) /* Transfer FP to GPR's. */ + ori 2,2,0 /* Force a new dispatch group. */ + lwz r4,8(r1) /* Load the upper half of the FP value. */ + lwz r5,12(r1) /* Load the lower half of the FP value. */ + addi r1,r1,16 /* Reset the stack pointer. */ + lis r0,0x7ff0 /* Load the upper portion for an INF/NaN. */ + clrlwi r4,r4,1 /* r4 = abs(r4). */ + cmpw cr7,r4,r0 /* if (abs(r4) <= inf). */ + cmpwi cr6,r5,0 /* r5 == 0x00000000? */ + bltlr cr7 /* LT means we have a denormal. */ + bgt cr7,L(NaN) /* GT means we have a NaN. */ + beqlr cr6 /* EQ means we have +/-INF. */ +L(NaN): + li r3,1 /* x == NaN? */ + blr + END (__isnan) + +hidden_def (__isnan) +weak_alias (__isnan, isnan) + +/* It turns out that the 'double' version will also always work for + single-precision. */ +strong_alias (__isnan, __isnanf) +hidden_def (__isnanf) +weak_alias (__isnanf, isnanf) + +#ifdef NO_LONG_DOUBLE +strong_alias (__isnan, __isnanl) +weak_alias (__isnan, isnanl) +#endif + +#ifndef IS_IN_libm +# if LONG_DOUBLE_COMPAT(libc, GLIBC_2_0) +compat_symbol (libc, __isnan, __isnanl, GLIBC_2_0); +compat_symbol (libc, isnan, isnanl, GLIBC_2_0); +# endif +#endif diff --git a/sysdeps/powerpc/powerpc32/power7/fpu/s_isnanf.S b/sysdeps/powerpc/powerpc32/power7/fpu/s_isnanf.S new file mode 100644 index 0000000000..b48c85e0d3 --- /dev/null +++ b/sysdeps/powerpc/powerpc32/power7/fpu/s_isnanf.S @@ -0,0 +1 @@ +/* This function uses the same code as s_isnan.S. */ diff --git a/sysdeps/powerpc/powerpc64/power7/Implies b/sysdeps/powerpc/powerpc64/power7/Implies deleted file mode 100644 index 13b03309fb..0000000000 --- a/sysdeps/powerpc/powerpc64/power7/Implies +++ /dev/null @@ -1 +0,0 @@ -powerpc/powerpc64/power5 diff --git a/sysdeps/powerpc/powerpc64/power7/fpu/Implies b/sysdeps/powerpc/powerpc64/power7/fpu/Implies deleted file mode 100644 index 13b03309fb..0000000000 --- a/sysdeps/powerpc/powerpc64/power7/fpu/Implies +++ /dev/null @@ -1 +0,0 @@ -powerpc/powerpc64/power5 diff --git a/sysdeps/powerpc/powerpc64/power7/fpu/s_finite.S b/sysdeps/powerpc/powerpc64/power7/fpu/s_finite.S new file mode 100644 index 0000000000..6763d1adc8 --- /dev/null +++ b/sysdeps/powerpc/powerpc64/power7/fpu/s_finite.S @@ -0,0 +1,68 @@ +/* finite(). PowerPC64/POWER7 version. + Copyright (C) 2010 Free Software Foundation, Inc. + Contributed by Luis Machado <luisgpm@br.ibm.com>. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, write to the Free + Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA + 02111-1307 USA. */ + +#include <sysdep.h> +#include <math_ldbl_opt.h> + +/* int __finite(x) */ + .section ".toc","aw" +.LC0: /* 1.0 */ + .tc FD_ONE[TC],0x3ff0000000000000 + .section ".text" + .type __finite, @function + .machine power7 +EALIGN (__finite, 4, 0) + CALL_MCOUNT 0 + lfd fp0,.LC0@toc(r2) + ftdiv cr7,fp1,fp0 + li r3,1 + bflr 30 + + /* If we are here, we either have +/-INF, + NaN or denormal. */ + + stfd fp1,-16(r1) /* Transfer FP to GPR's. */ + ori 2,2,0 /* Force a new dispatch group. */ + + lhz r4,-16(r1) /* Fetch the upper portion of the high word of + the FP value (where the exponent and sign bits + are). */ + clrlwi r4,r4,17 /* r4 = abs(r4). */ + cmpwi cr7,r4,0x7ff0 /* r4 == 0x7ff0? */ + bltlr cr7 /* LT means finite, other non-finite. */ + li r3,0 + blr + END (__finite) + +hidden_def (__finite) +weak_alias (__finite, finite) + +/* It turns out that the 'double' version will also always work for + single-precision. */ +strong_alias (__finite, __finitef) +hidden_def (__finitef) +weak_alias (__finitef, finitef) + +#ifndef IS_IN_libm +# if LONG_DOUBLE_COMPAT(libc, GLIBC_2_0) +compat_symbol (libc, __finite, __finitel, GLIBC_2_0); +compat_symbol (libc, finite, finitel, GLIBC_2_0); +# endif +#endif diff --git a/sysdeps/powerpc/powerpc64/power7/fpu/s_finitef.S b/sysdeps/powerpc/powerpc64/power7/fpu/s_finitef.S new file mode 100644 index 0000000000..54bd94176d --- /dev/null +++ b/sysdeps/powerpc/powerpc64/power7/fpu/s_finitef.S @@ -0,0 +1 @@ +/* This function uses the same code as s_finite.S. */ diff --git a/sysdeps/powerpc/powerpc64/power7/fpu/s_isinf.S b/sysdeps/powerpc/powerpc64/power7/fpu/s_isinf.S new file mode 100644 index 0000000000..f896d38026 --- /dev/null +++ b/sysdeps/powerpc/powerpc64/power7/fpu/s_isinf.S @@ -0,0 +1,71 @@ +/* isinf(). PowerPC64/POWER7 version. + Copyright (C) 2010 Free Software Foundation, Inc. + Contributed by Luis Machado <luisgpm@br.ibm.com>. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, write to the Free + Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA + 02111-1307 USA. */ + +#include <sysdep.h> +#include <math_ldbl_opt.h> + +/* int __isinf(x) */ + .section ".toc","aw" +.LC0: /* 1.0 */ + .tc FD_ONE[TC],0x3ff0000000000000 + .section ".text" + .type __isinf, @function + .machine power7 +EALIGN (__isinf, 4, 0) + CALL_MCOUNT 0 + lfd fp0,.LC0@toc(r2) + ftdiv cr7,fp1,fp0 + li r3,0 + bflr 29 /* If not INF, return. */ + + /* Either we have -INF/+INF or a denormal. */ + + stfd fp1,-16(r1) /* Transfer FP to GPR's. */ + ori 2,2,0 /* Force a new dispatch group. */ + lhz r4,-16(r1) /* Fetch the upper portion of the high word of + the FP value (where the exponent and sign bits + are). */ + cmpwi cr7,r4,0x7ff0 /* r4 == 0x7ff0? */ + li r3,1 + beqlr cr7 /* EQ means INF, otherwise -INF. */ + li r3,-1 + blr + END (__isinf) + +hidden_def (__isinf) +weak_alias (__isinf, isinf) + +/* It turns out that the 'double' version will also always work for + single-precision. */ +strong_alias (__isinf, __isinff) +hidden_def (__isinff) +weak_alias (__isinff, isinff) + +#ifdef NO_LONG_DOUBLE +strong_alias (__isinf, __isinfl) +weak_alias (__isinf, isinfl) +#endif + +#ifndef IS_IN_libm +# if LONG_DOUBLE_COMPAT(libc, GLIBC_2_0) +compat_symbol (libc, __isinf, __isinfl, GLIBC_2_0); +compat_symbol (libc, isinf, isinfl, GLIBC_2_0); +# endif +#endif diff --git a/sysdeps/powerpc/powerpc64/power7/fpu/s_isinff.S b/sysdeps/powerpc/powerpc64/power7/fpu/s_isinff.S new file mode 100644 index 0000000000..be759e091e --- /dev/null +++ b/sysdeps/powerpc/powerpc64/power7/fpu/s_isinff.S @@ -0,0 +1 @@ +/* This function uses the same code as s_isinf.S. */ diff --git a/sysdeps/powerpc/powerpc64/power7/fpu/s_isnan.S b/sysdeps/powerpc/powerpc64/power7/fpu/s_isnan.S new file mode 100644 index 0000000000..8877012598 --- /dev/null +++ b/sysdeps/powerpc/powerpc64/power7/fpu/s_isnan.S @@ -0,0 +1,69 @@ +/* isnan(). PowerPC64/POWER7 version. + Copyright (C) 2010 Free Software Foundation, Inc. + Contributed by Luis Machado <luisgpm@br.ibm.com>. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, write to the Free + Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA + 02111-1307 USA. */ + +#include <sysdep.h> +#include <math_ldbl_opt.h> + +/* int __isnan(x) */ + .section ".toc","aw" +.LC0: /* 1.0 */ + .tc FD_ONE[TC],0x3ff0000000000000 + .section ".text" + .type __isnan, @function + .machine power7 +EALIGN (__isnan, 4, 0) + CALL_MCOUNT 0 + lfd fp0,.LC0@toc(r2) + ftdiv cr7,fp1,fp0 + li r3,0 + bflr 30 /* If not NaN, finish. */ + + stfd fp1,-16(r1) /* Transfer FP to GPR's. */ + ori 2,2,0 /* Force a new dispatch group. */ + ld r4,-16(r1) /* Load FP into GPR. */ + lis r0,0x7ff0 + sldi r0,r0,32 /* const long r0 0x7ff00000 00000000. */ + clrldi r4,r4,1 /* x = fabs(x) */ + cmpd cr7,r4,r0 /* if (fabs(x) <= inf) */ + blelr cr7 /* LE means not NaN. */ + li r3,1 /* else return 1 */ + blr + END (__isnan) + +hidden_def (__isnan) +weak_alias (__isnan, isnan) + +/* It turns out that the 'double' version will also always work for + single-precision. */ +strong_alias (__isnan, __isnanf) +hidden_def (__isnanf) +weak_alias (__isnanf, isnanf) + +#ifdef NO_LONG_DOUBLE +strong_alias (__isnan, __isnanl) +weak_alias (__isnan, isnanl) +#endif + +#ifndef IS_IN_libm +# if LONG_DOUBLE_COMPAT(libc, GLIBC_2_0) +compat_symbol (libc, __isnan, __isnanl, GLIBC_2_0); +compat_symbol (libc, isnan, isnanl, GLIBC_2_0); +# endif +#endif diff --git a/sysdeps/powerpc/powerpc64/power7/fpu/s_isnanf.S b/sysdeps/powerpc/powerpc64/power7/fpu/s_isnanf.S new file mode 100644 index 0000000000..b48c85e0d3 --- /dev/null +++ b/sysdeps/powerpc/powerpc64/power7/fpu/s_isnanf.S @@ -0,0 +1 @@ +/* This function uses the same code as s_isnan.S. */ |