diff options
Diffstat (limited to 'sysdeps/mach/hurd/i386/tls.h')
| -rw-r--r-- | sysdeps/mach/hurd/i386/tls.h | 21 |
1 files changed, 16 insertions, 5 deletions
diff --git a/sysdeps/mach/hurd/i386/tls.h b/sysdeps/mach/hurd/i386/tls.h index b8e8b32e3b..1a55fdb752 100644 --- a/sysdeps/mach/hurd/i386/tls.h +++ b/sysdeps/mach/hurd/i386/tls.h @@ -66,6 +66,15 @@ typedef struct #define TLS_TCB_AT_TP 1 #define TLS_DTV_AT_TP 0 +/* Alignment requirement for TCB. + + Some processors such as Intel Atom pay a big penalty on every + access using a segment override if that segment's base is not + aligned to the size of a cache line. (See Intel 64 and IA-32 + Architectures Optimization Reference Manual, section 13.3.3.3, + "Segment Base".) On such machines, a cache line is 64 bytes. */ +#define TCB_ALIGNMENT 64 + #ifndef __ASSEMBLER__ /* Use i386-specific RPCs to arrange that %gs segment register prefix @@ -76,6 +85,8 @@ typedef struct # define __i386_set_gdt(thr, sel, desc) ((void) (thr), (void) (sel), (void) (desc), MIG_BAD_ID) # endif +#define __i386_selector_is_ldt(sel) (!!((sel) & 4)) + # include <errno.h> # include <assert.h> @@ -191,10 +202,10 @@ _hurd_tls_fork (thread_t child, thread_t orig, struct i386_thread_state *state) return 0; struct descriptor desc, *_desc = &desc; - kern_return_t err; + error_t err; unsigned int count = 1; - if (__builtin_expect (sel, 0x48) & 4) /* LDT selector */ + if (__glibc_unlikely (__i386_selector_is_ldt(sel))) err = __i386_get_ldt (orig, sel, 1, &_desc, &count); else err = __i386_get_gdt (orig, sel, &desc); @@ -203,7 +214,7 @@ _hurd_tls_fork (thread_t child, thread_t orig, struct i386_thread_state *state) if (err) return err; - if (__builtin_expect (sel, 0x48) & 4) /* LDT selector */ + if (__glibc_unlikely (__i386_selector_is_ldt(sel))) err = __i386_set_ldt (child, sel, &desc, 1); else err = __i386_set_gdt (child, &sel, desc); @@ -222,12 +233,12 @@ _hurd_tls_new (thread_t child, struct i386_thread_state *state, tcbhead_t *tcb) return 0; HURD_TLS_DESC_DECL (desc, tcb); - kern_return_t err; + error_t err; tcb->tcb = tcb; tcb->self = child; - if (__builtin_expect (sel, 0x48) & 4) /* LDT selector */ + if (__glibc_unlikely (__i386_selector_is_ldt(sel))) err = __i386_set_ldt (child, sel, &desc, 1); else err = __i386_set_gdt (child, &sel, desc); |