diff options
-rw-r--r-- | ChangeLog | 5 | ||||
-rw-r--r-- | sysdeps/x86_64/multiarch/strcmp-sse42.S | 1 |
2 files changed, 6 insertions, 0 deletions
@@ -1,5 +1,10 @@ 2018-07-17 H.J. Lu <hongjiu.lu@intel.com> + * sysdeps/x86_64/multiarch/strcmp-sse42.S (STRCMP_SSE42): Add + _CET_ENDBR. + +2018-07-17 H.J. Lu <hongjiu.lu@intel.com> + * sysdeps/i386/dl-tlsdesc.S (_dl_tlsdesc_return): Add _CET_ENDBR. (_dl_tlsdesc_undefweak): Likewise. diff --git a/sysdeps/x86_64/multiarch/strcmp-sse42.S b/sysdeps/x86_64/multiarch/strcmp-sse42.S index 6fa0c2c7d2..5a0c6668a7 100644 --- a/sysdeps/x86_64/multiarch/strcmp-sse42.S +++ b/sysdeps/x86_64/multiarch/strcmp-sse42.S @@ -126,6 +126,7 @@ END (GLABEL(__strncasecmp)) STRCMP_SSE42: cfi_startproc + _CET_ENDBR CALL_MCOUNT /* |