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authorRoland McGrath <roland@gnu.org>2002-10-18 22:37:42 +0000
committerRoland McGrath <roland@gnu.org>2002-10-18 22:37:42 +0000
commit82f3f07d7a7d971790a5e03aa39627d96122dab3 (patch)
tree59865040b21c90273ff7a49e6eac1beaf1fbc09a /sysdeps/unix/sysv/linux/alpha/sysdep.h
parentc118d63419c3b53136ca37aed588baf4aef9f61c (diff)
* sysdeps/powerpc/powerpc32/dl-machine.c (__process_machine_rela): Fix
typos: VALUE -> FINALADDR.
Diffstat (limited to 'sysdeps/unix/sysv/linux/alpha/sysdep.h')
-rw-r--r--sysdeps/unix/sysv/linux/alpha/sysdep.h157
1 files changed, 156 insertions, 1 deletions
diff --git a/sysdeps/unix/sysv/linux/alpha/sysdep.h b/sysdeps/unix/sysv/linux/alpha/sysdep.h
index 05a4c3a94a..e56adca8ed 100644
--- a/sysdeps/unix/sysv/linux/alpha/sysdep.h
+++ b/sysdeps/unix/sysv/linux/alpha/sysdep.h
@@ -1,4 +1,4 @@
-/* Copyright (C) 1992, 1993, 1995, 1996, 1997 Free Software Foundation, Inc.
+/* Copyright (C) 1992, 1993, 1995, 1996, 1997, 2002 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by Ulrich Drepper, <drepper@gnu.ai.mit.edu>, August 1995.
@@ -67,3 +67,158 @@
(__NR_##name == __NR_rt_sigaction \
? __syscall_##name(args) \
: INLINE_SYSCALL1(name, nr, args))
+
+#define INLINE_SYSCALL1(name, nr, args...) \
+({ \
+ long _sc_ret, _sc_err; \
+ inline_syscall##nr(name, args); \
+ if (_sc_err) \
+ { \
+ __set_errno (_sc_ret); \
+ _sc_ret = -1L; \
+ } \
+ _sc_ret; \
+})
+
+#define inline_syscall_clobbers \
+ "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", \
+ "$22", "$23", "$24", "$25", "$27", "$28", "memory"
+
+/* It is moderately important optimization-wise to limit the lifetime
+ of the hard-register variables as much as possible. Thus we copy
+ in/out as close to the asm as possible. */
+
+#define inline_syscall0(name) \
+{ \
+ register long _sc_0 __asm__("$0"); \
+ register long _sc_19 __asm__("$19"); \
+ \
+ _sc_0 = __NR_##name; \
+ __asm__("callsys # %0 %1 <= %2" \
+ : "=r"(_sc_0), "=r"(_sc_19) \
+ : "0"(_sc_0) \
+ : inline_syscall_clobbers); \
+ _sc_ret = _sc_0, _sc_err = _sc_19; \
+}
+
+#define inline_syscall1(name,arg1) \
+{ \
+ register long _sc_0 __asm__("$0"); \
+ register long _sc_16 __asm__("$16"); \
+ register long _sc_19 __asm__("$19"); \
+ \
+ _sc_0 = __NR_##name; \
+ _sc_16 = (long) (arg1); \
+ __asm__("callsys # %0 %1 <= %2 %3" \
+ : "=r"(_sc_0), "=r"(_sc_19) \
+ : "0"(_sc_0), "r"(_sc_16) \
+ : inline_syscall_clobbers); \
+ _sc_ret = _sc_0, _sc_err = _sc_19; \
+}
+
+#define inline_syscall2(name,arg1,arg2) \
+{ \
+ register long _sc_0 __asm__("$0"); \
+ register long _sc_16 __asm__("$16"); \
+ register long _sc_17 __asm__("$17"); \
+ register long _sc_19 __asm__("$19"); \
+ \
+ _sc_0 = __NR_##name; \
+ _sc_16 = (long) (arg1); \
+ _sc_17 = (long) (arg2); \
+ __asm__("callsys # %0 %1 <= %2 %3 %4" \
+ : "=r"(_sc_0), "=r"(_sc_19) \
+ : "0"(_sc_0), "r"(_sc_16), "r"(_sc_17) \
+ : inline_syscall_clobbers); \
+ _sc_ret = _sc_0, _sc_err = _sc_19; \
+}
+
+#define inline_syscall3(name,arg1,arg2,arg3) \
+{ \
+ register long _sc_0 __asm__("$0"); \
+ register long _sc_16 __asm__("$16"); \
+ register long _sc_17 __asm__("$17"); \
+ register long _sc_18 __asm__("$18"); \
+ register long _sc_19 __asm__("$19"); \
+ \
+ _sc_0 = __NR_##name; \
+ _sc_16 = (long) (arg1); \
+ _sc_17 = (long) (arg2); \
+ _sc_18 = (long) (arg3); \
+ __asm__("callsys # %0 %1 <= %2 %3 %4 %5" \
+ : "=r"(_sc_0), "=r"(_sc_19) \
+ : "0"(_sc_0), "r"(_sc_16), "r"(_sc_17), \
+ "r"(_sc_18) \
+ : inline_syscall_clobbers); \
+ _sc_ret = _sc_0, _sc_err = _sc_19; \
+}
+
+#define inline_syscall4(name,arg1,arg2,arg3,arg4) \
+{ \
+ register long _sc_0 __asm__("$0"); \
+ register long _sc_16 __asm__("$16"); \
+ register long _sc_17 __asm__("$17"); \
+ register long _sc_18 __asm__("$18"); \
+ register long _sc_19 __asm__("$19"); \
+ \
+ _sc_0 = __NR_##name; \
+ _sc_16 = (long) (arg1); \
+ _sc_17 = (long) (arg2); \
+ _sc_18 = (long) (arg3); \
+ _sc_19 = (long) (arg4); \
+ __asm__("callsys # %0 %1 <= %2 %3 %4 %5 %6" \
+ : "=r"(_sc_0), "=r"(_sc_19) \
+ : "0"(_sc_0), "r"(_sc_16), "r"(_sc_17), \
+ "r"(_sc_18), "1"(_sc_19) \
+ : inline_syscall_clobbers); \
+ _sc_ret = _sc_0, _sc_err = _sc_19; \
+}
+
+#define inline_syscall5(name,arg1,arg2,arg3,arg4,arg5) \
+{ \
+ register long _sc_0 __asm__("$0"); \
+ register long _sc_16 __asm__("$16"); \
+ register long _sc_17 __asm__("$17"); \
+ register long _sc_18 __asm__("$18"); \
+ register long _sc_19 __asm__("$19"); \
+ register long _sc_20 __asm__("$20"); \
+ \
+ _sc_0 = __NR_##name; \
+ _sc_16 = (long) (arg1); \
+ _sc_17 = (long) (arg2); \
+ _sc_18 = (long) (arg3); \
+ _sc_19 = (long) (arg4); \
+ _sc_20 = (long) (arg5); \
+ __asm__("callsys # %0 %1 <= %2 %3 %4 %5 %6 %7" \
+ : "=r"(_sc_0), "=r"(_sc_19) \
+ : "0"(_sc_0), "r"(_sc_16), "r"(_sc_17), \
+ "r"(_sc_18), "1"(_sc_19), "r"(_sc_20) \
+ : inline_syscall_clobbers); \
+ _sc_ret = _sc_0, _sc_err = _sc_19; \
+}
+
+#define inline_syscall6(name,arg1,arg2,arg3,arg4,arg5,arg6) \
+{ \
+ register long _sc_0 __asm__("$0"); \
+ register long _sc_16 __asm__("$16"); \
+ register long _sc_17 __asm__("$17"); \
+ register long _sc_18 __asm__("$18"); \
+ register long _sc_19 __asm__("$19"); \
+ register long _sc_20 __asm__("$20"); \
+ register long _sc_21 __asm__("$21"); \
+ \
+ _sc_0 = __NR_##name; \
+ _sc_16 = (long) (arg1); \
+ _sc_17 = (long) (arg2); \
+ _sc_18 = (long) (arg3); \
+ _sc_19 = (long) (arg4); \
+ _sc_20 = (long) (arg5); \
+ _sc_21 = (long) (arg6); \
+ __asm__("callsys # %0 %1 <= %2 %3 %4 %5 %6 %7 %8" \
+ : "=r"(_sc_0), "=r"(_sc_19) \
+ : "0"(_sc_0), "r"(_sc_16), "r"(_sc_17), \
+ "r"(_sc_18), "1"(_sc_19), "r"(_sc_20), \
+ "r"(_sc_21) \
+ : inline_syscall_clobbers); \
+ _sc_ret = _sc_0, _sc_err = _sc_19; \
+}