diff options
author | Jakub Jelinek <jakub@redhat.com> | 2009-02-04 22:36:03 +0000 |
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committer | Jakub Jelinek <jakub@redhat.com> | 2009-02-04 22:36:03 +0000 |
commit | 73c5dd45bc405428148ee740cac61a1279fe57d4 (patch) | |
tree | 878555d8c116d7ac9cb716b79e10d240fde946a3 /sysdeps/powerpc | |
parent | 23a4b43d6a98912d505458daeced44b22830a773 (diff) |
Updated to fedora-glibc-20090204T2135cvs/fedora-glibc-2_9_90-3
Diffstat (limited to 'sysdeps/powerpc')
-rw-r--r-- | sysdeps/powerpc/fpu/tst-setcontext-fpscr.c | 10 | ||||
-rw-r--r-- | sysdeps/powerpc/powerpc32/fpu/__longjmp-common.S | 6 | ||||
-rw-r--r-- | sysdeps/powerpc/powerpc64/__longjmp-common.S | 7 |
3 files changed, 15 insertions, 8 deletions
diff --git a/sysdeps/powerpc/fpu/tst-setcontext-fpscr.c b/sysdeps/powerpc/fpu/tst-setcontext-fpscr.c index 973fb3f77a..a15fe86fb9 100644 --- a/sysdeps/powerpc/fpu/tst-setcontext-fpscr.c +++ b/sysdeps/powerpc/fpu/tst-setcontext-fpscr.c @@ -1,4 +1,4 @@ -/* Copyright (C) 2001,2002,2004,2006,2007,2008 Free Software Foundation, Inc. +/* Copyright (C) 2001,2002,2004,2006-2008,2009 Free Software Foundation, Inc. This file is part of the GNU C Library. Contributed by Ryan S. Arnold <rsa@us.ibm.com> Sean Curry <spcurry@us.ibm.com> @@ -104,12 +104,16 @@ typedef unsigned int si_fpscr_t __attribute__ ((__mode__ (__SI__))); (__fpscr)=tmp.fpscr; \ tmp.fpscr; }) +/* We make sure to zero fp0 after we use it in order to prevent stale data + in an fp register from making a test-case pass erroneously. */ # define _SET_DI_FPSCR(__fpscr) { \ union { double d; di_fpscr_t fpscr; } \ tmp __attribute__ ((__aligned__(8))); \ tmp.fpscr = __fpscr; \ /* Set the entire 64-bit FPSCR. */ \ __asm__ ("lfd%U0 0,%0; mtfsf 255,0,1,0" : : "m" (tmp.d) : "fr0"); \ + tmp.d = 0; \ + __asm__("lfd%U0 0,%0" : : "m" (tmp.d) : "fr0"); \ } # define _GET_SI_FPSCR(__fpscr) ({ \ @@ -120,6 +124,8 @@ typedef unsigned int si_fpscr_t __attribute__ ((__mode__ (__SI__))); (__fpscr)=tmp.cw[1]; \ tmp.cw[0]; }) +/* We make sure to zero fp0 after we use it in order to prevent stale data + in an fp register from making a test-case pass erroneously. */ # define _SET_SI_FPSCR(__fpscr) { \ union { double d; si_fpscr_t fpscr[2]; } \ tmp __attribute__ ((__aligned__(8))); \ @@ -127,6 +133,8 @@ typedef unsigned int si_fpscr_t __attribute__ ((__mode__ (__SI__))); tmp.fpscr[0] = 0xFFF80000; \ tmp.fpscr[1] = __fpscr; \ __asm__ ("lfd%U0 0,%0; mtfsf 255,0" : : "m" (tmp.d) : "fr0"); \ + tmp.d = 0; \ + __asm__("lfd%U0 0,%0" : : "m" (tmp.d) : "fr0"); \ } void prime_special_regs(int which) diff --git a/sysdeps/powerpc/powerpc32/fpu/__longjmp-common.S b/sysdeps/powerpc/powerpc32/fpu/__longjmp-common.S index 7c6e27c209..f9f010fcac 100644 --- a/sysdeps/powerpc/powerpc32/fpu/__longjmp-common.S +++ b/sysdeps/powerpc/powerpc32/fpu/__longjmp-common.S @@ -1,5 +1,5 @@ /* longjmp for PowerPC. - Copyright (C) 1995-99, 2000, 2003-2005, 2006 Free Software Foundation, Inc. + Copyright (C) 1995-99, 2000, 2003-2006, 2009 Free Software Foundation, Inc. This file is part of the GNU C Library. The GNU C Library is free software; you can redistribute it and/or @@ -64,7 +64,7 @@ ENTRY (BP_SYM (__longjmp)) andi. r6,r5,0xf lwz r0,((JB_VRSAVE)*4)(3) mtspr VRSAVE,r0 - beq+ aligned_restore_vmx + beq+ L(aligned_restore_vmx) addi r6,r5,16 lvsl v0,0,r5 lvx v1,0,r5 @@ -88,7 +88,7 @@ ENTRY (BP_SYM (__longjmp)) lvx v1,0,r5 vperm v31,v31,v1,v0 b L(no_vmx) -aligned_restore_vmx: +L(aligned_restore_vmx): addi r6,r5,16 lvx v20,0,r5 addi r5,r5,32 diff --git a/sysdeps/powerpc/powerpc64/__longjmp-common.S b/sysdeps/powerpc/powerpc64/__longjmp-common.S index 700a2a543c..19b2849c01 100644 --- a/sysdeps/powerpc/powerpc64/__longjmp-common.S +++ b/sysdeps/powerpc/powerpc64/__longjmp-common.S @@ -1,6 +1,5 @@ /* longjmp for PowerPC64. - Copyright (C) 1995, 1996,1997,1999,2000,2001,2002,2003,2004,2005,2006 - Free Software Foundation, Inc. + Copyright (C) 1995, 1996,1997,1999-2006,2009 Free Software Foundation, Inc. This file is part of the GNU C Library. The GNU C Library is free software; you can redistribute it and/or @@ -58,7 +57,7 @@ ENTRY (BP_SYM (__longjmp)) andi. r6,r5,0xf lwz r0,((JB_VRSAVE)*8)(3) mtspr VRSAVE,r0 - beq+ aligned_restore_vmx + beq+ L(aligned_restore_vmx) addi r6,r5,16 lvsl v0,0,r5 lvx v1,0,r5 @@ -82,7 +81,7 @@ ENTRY (BP_SYM (__longjmp)) lvx v1,0,r5 vperm v31,v31,v1,v0 b L(no_vmx) -aligned_restore_vmx: +L(aligned_restore_vmx): addi r6,r5,16 lvx v20,0,r5 addi r5,r5,32 |