Merge commit 'refs/top-bases/t/nfds-poll' into t/nfds-poll

1 files changed, 62 insertions, 0 deletions

diff --git a/sysdeps/powerpc/sys/platform/ppc.h b/sysdeps/powerpc/sys/platform/ppc.h
index 740831e677..81f3bf9bff 100644
--- a/sysdeps/powerpc/sys/platform/ppc.h
+++ b/sysdeps/powerpc/sys/platform/ppc.h
@@ -50,4 +50,66 @@ __ppc_get_timebase (void)
 #endif
 }
 
+/* The following functions provide hints about the usage of shared processor
+   resources, as defined in ISA 2.06 and newer. */
+
+/* Provides a hint that performance will probably be improved if shared
+   resources dedicated to the executing processor are released for use by other
+   processors.  */
+static inline void
+__ppc_yield (void)
+{
+  __asm__ volatile ("or 27,27,27");
+}
+
+/* Provides a hint that performance will probably be improved if shared
+   resources dedicated to the executing processor are released until
+   all outstanding storage accesses to caching-inhibited storage have been
+   completed.  */
+static inline void
+__ppc_mdoio (void)
+{
+  __asm__ volatile ("or 29,29,29");
+}
+
+/* Provides a hint that performance will probably be improved if shared
+   resources dedicated to the executing processor are released until all
+   outstanding storage accesses to cacheable storage for which the data is not
+   in the cache have been completed.  */
+static inline void
+__ppc_mdoom (void)
+{
+  __asm__ volatile ("or 30,30,30");
+}
+
+
+/* ISA 2.05 and beyond support the Program Priority Register (PPR) to adjust
+   thread priorities based on lock acquisition, wait and release. The ISA
+   defines the use of form 'or Rx,Rx,Rx' as the way to modify the PRI field.
+   The unprivileged priorities are:
+     Rx = 1 (low)
+     Rx = 2 (medium)
+     Rx = 6 (medium-low/normal)
+   The 'or' instruction form is a nop in previous hardware, so it is safe to
+   use unguarded. The default value is 'medium'.
+ */
+
+static inline void
+__ppc_set_ppr_med (void)
+{
+  __asm__ volatile ("or 2,2,2");
+}
+
+static inline void
+__ppc_set_ppr_med_low (void)
+{
+  __asm__ volatile ("or 6,6,6");
+}
+
+static inline void
+__ppc_set_ppr_low (void)
+{
+  __asm__ volatile ("or 1,1,1");
+}
+
 #endif  /* sys/platform/ppc.h */