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authorSamuel Thibault <samuel.thibault@ens-lyon.org>2016-08-20 19:50:45 +0200
committerSamuel Thibault <samuel.thibault@ens-lyon.org>2016-08-20 19:50:45 +0200
commit4dd9e35bfd35d3138bc44169baba098005bad51e (patch)
treea4939c43a9c3fe00eb27f023e14acc5e1fe8808c /sysdeps/powerpc/powerpc32/power6/memset.S
parentbd42a4599d1b6f77bcfe1e4f67b7cbd9e1cb2dfd (diff)
parentf76453c31593957fec1a99b986bfa5506618b79c (diff)
Merge commit 'refs/top-bases/t/bigmem' into t/bigmem
Diffstat (limited to 'sysdeps/powerpc/powerpc32/power6/memset.S')
-rw-r--r--sysdeps/powerpc/powerpc32/power6/memset.S10
1 files changed, 5 insertions, 5 deletions
diff --git a/sysdeps/powerpc/powerpc32/power6/memset.S b/sysdeps/powerpc/powerpc32/power6/memset.S
index 4b18fa7912..fa03846f21 100644
--- a/sysdeps/powerpc/powerpc32/power6/memset.S
+++ b/sysdeps/powerpc/powerpc32/power6/memset.S
@@ -1,5 +1,5 @@
/* Optimized 32-bit memset implementation for POWER6.
- Copyright (C) 1997-2014 Free Software Foundation, Inc.
+ Copyright (C) 1997-2015 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
@@ -48,7 +48,7 @@ L(_memset):
ble- cr1, L(small)
/* Align to word boundary. */
cmplwi cr5, rLEN, 31
- insrdi rCHR, rCHR, 8, 48 /* Replicate byte to halfword. */
+ insrwi rCHR, rCHR, 8, 16 /* Replicate byte to halfword. */
beq+ L(aligned)
mtcrf 0x01, rMEMP0
subfic rALIGN, rALIGN, 4
@@ -64,7 +64,7 @@ L(g0):
/* Handle the case of size < 31. */
L(aligned):
mtcrf 0x01, rLEN
- insrdi rCHR, rCHR, 16, 32 /* Replicate halfword to word. */
+ insrwi rCHR, rCHR, 16, 0 /* Replicate halfword to word. */
ble cr5, L(medium)
/* Align to 32-byte boundary. */
andi. rALIGN, rMEMP, 0x1C
@@ -228,7 +228,7 @@ L(nzCacheAligned128):
ori r1,r1,0
stw rCHR,60(rMEMP3)
blt cr6,L(cacheAligned1)
-#ifndef NOT_IN_libc
+#if IS_IN (libc)
lfd 0,-128(rMEMP)
#endif
b L(nzCacheAligned256)
@@ -236,7 +236,7 @@ L(nzCacheAligned128):
L(nzCacheAligned256):
cmplwi cr1,rLEN,256
addi rMEMP3,rMEMP,64
-#ifdef NOT_IN_libc
+#if !IS_IN (libc)
/* When we are not in libc we should use only GPRs to avoid the FPU lock
interrupt. */
stw rCHR,0(rMEMP)