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authorThomas Schwinge <thomas@codesourcery.com>2013-12-20 09:29:29 +0100
committerThomas Schwinge <thomas@codesourcery.com>2013-12-20 09:29:29 +0100
commita65dd355fb80a05215e15ae97649de52aec885e3 (patch)
tree81701bb0c6b648630f2bf1729a85d7f5eb49e67b /sysdeps/powerpc/fpu/fesetenv.c
parent296a5732f94abe4d5699dc981e4ccfb950b48cee (diff)
parentb4578bab30f72cddd2cf38abfb39f9c8dc892249 (diff)
Merge branch 'baseline' into refs/top-bases/tschwinge/Roger_Whittaker
Diffstat (limited to 'sysdeps/powerpc/fpu/fesetenv.c')
-rw-r--r--sysdeps/powerpc/fpu/fesetenv.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/sysdeps/powerpc/fpu/fesetenv.c b/sysdeps/powerpc/fpu/fesetenv.c
index e92adb4c58..5de6ff5f71 100644
--- a/sysdeps/powerpc/fpu/fesetenv.c
+++ b/sysdeps/powerpc/fpu/fesetenv.c
@@ -34,14 +34,14 @@ __fesetenv (const fenv_t *envp)
exceptions, then unmask SIGFPE in the MSR FE0/FE1 bits. This will put the
hardware into "precise mode" and may cause the FPU to run slower on some
hardware. */
- if ((old.l[1] & _FPU_MASK_ALL) == 0 && (new.l[1] & _FPU_MASK_ALL) != 0)
- (void)__fe_nomask_env ();
+ if ((old.l & _FPU_MASK_ALL) == 0 && (new.l & _FPU_MASK_ALL) != 0)
+ (void) __fe_nomask_env_priv ();
/* If the old env had any enabled exceptions and the new env has no enabled
exceptions, then mask SIGFPE in the MSR FE0/FE1 bits. This may allow the
FPU to run faster because it always takes the default action and can not
generate SIGFPE. */
- if ((old.l[1] & _FPU_MASK_ALL) != 0 && (new.l[1] & _FPU_MASK_ALL) == 0)
+ if ((old.l & _FPU_MASK_ALL) != 0 && (new.l & _FPU_MASK_ALL) == 0)
(void)__fe_mask_env ();
fesetenv_register (*envp);