diff options
| author | Thomas Schwinge <thomas@codesourcery.com> | 2013-12-20 09:29:29 +0100 |
|---|---|---|
| committer | Thomas Schwinge <thomas@codesourcery.com> | 2013-12-20 09:29:29 +0100 |
| commit | a65dd355fb80a05215e15ae97649de52aec885e3 (patch) | |
| tree | 81701bb0c6b648630f2bf1729a85d7f5eb49e67b /sysdeps/powerpc/fpu/fclrexcpt.c | |
| parent | 296a5732f94abe4d5699dc981e4ccfb950b48cee (diff) | |
| parent | b4578bab30f72cddd2cf38abfb39f9c8dc892249 (diff) | |
Merge branch 'baseline' into refs/top-bases/tschwinge/Roger_Whittaker
Diffstat (limited to 'sysdeps/powerpc/fpu/fclrexcpt.c')
| -rw-r--r-- | sysdeps/powerpc/fpu/fclrexcpt.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/sysdeps/powerpc/fpu/fclrexcpt.c b/sysdeps/powerpc/fpu/fclrexcpt.c index 86575dba67..7f66e21ce2 100644 --- a/sysdeps/powerpc/fpu/fclrexcpt.c +++ b/sysdeps/powerpc/fpu/fclrexcpt.c @@ -28,8 +28,8 @@ __feclearexcept (int excepts) u.fenv = fegetenv_register (); /* Clear the relevant bits. */ - u.l[1] = u.l[1] & ~((-(excepts >> (31 - FPSCR_VX) & 1) & FE_ALL_INVALID) - | (excepts & FPSCR_STICKY_BITS)); + u.l = u.l & ~((-(excepts >> (31 - FPSCR_VX) & 1) & FE_ALL_INVALID) + | (excepts & FPSCR_STICKY_BITS)); /* Put the new state in effect. */ fesetenv_register (u.fenv); |