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authorAlexandre Oliva <aoliva@redhat.com>2003-03-14 05:31:28 +0000
committerAlexandre Oliva <aoliva@redhat.com>2003-03-14 05:31:28 +0000
commit5ace1393645876e733698cc05dac51a8bfbec965 (patch)
treee08cb7f2ca53b792474e54da13dd31e1bdc8a171 /sysdeps/mips
parent1b12a2cb728fc49d2282a058c0b67b708186fb2b (diff)
* sysdeps/mips/memcpy.S: Map t0-3 to a4-7 on new abis. * sysdeps/mips/memset.S: Likewise. * sysdeps/mips/sys/regdef.h: Alias a4-7 or t0-3 to $8-11 depending on the ABI.
* sysdeps/mips/memcpy.S: Map t0-3 to a4-7 on new abis. * sysdeps/mips/memset.S: Likewise. * sysdeps/mips/sys/regdef.h: Alias a4-7 or t0-3 to $8-11 depending on the ABI. 2003-03-14 Alexandre Oliva <aoliva@redhat.com>
Diffstat (limited to 'sysdeps/mips')
-rw-r--r--sysdeps/mips/memcpy.S13
-rw-r--r--sysdeps/mips/memset.S7
-rw-r--r--sysdeps/mips/sys/regdef.h9
3 files changed, 28 insertions, 1 deletions
diff --git a/sysdeps/mips/memcpy.S b/sysdeps/mips/memcpy.S
index 3d49ac976b..c77f1b8d97 100644
--- a/sysdeps/mips/memcpy.S
+++ b/sysdeps/mips/memcpy.S
@@ -40,6 +40,19 @@
# define SWLO swl /* low part is left in little-endian */
#endif
+#ifndef t0
+# define t0 a4
+#endif
+#ifndef t1
+# define t1 a5
+#endif
+#ifndef t2
+# define t2 a6
+#endif
+#ifndef t3
+# define t3 a7
+#endif
+
ENTRY (memcpy)
.set noreorder
diff --git a/sysdeps/mips/memset.S b/sysdeps/mips/memset.S
index 7825dea880..46811340ec 100644
--- a/sysdeps/mips/memset.S
+++ b/sysdeps/mips/memset.S
@@ -34,6 +34,13 @@
# define SWHI swr /* high part is right in little-endian */
#endif
+#ifndef t0
+# define t0 a4
+#endif
+#ifndef t1
+# define t1 a5
+#endif
+
ENTRY (memset)
.set noreorder
diff --git a/sysdeps/mips/sys/regdef.h b/sysdeps/mips/sys/regdef.h
index c4df603836..f3a0df5ab4 100644
--- a/sysdeps/mips/sys/regdef.h
+++ b/sysdeps/mips/sys/regdef.h
@@ -1,4 +1,4 @@
-/* Copyright (C) 1997, 1998 Free Software Foundation, Inc.
+/* Copyright (C) 1997, 1998, 2002, 2003 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by Ralf Baechle <ralf@gnu.org>.
@@ -31,10 +31,17 @@
#define a1 $5
#define a2 $6
#define a3 $7
+#if _MIPS_SIM != _MIPS_SIM_ABI32
+#define a4 $8
+#define a5 $9
+#define a6 $10
+#define a7 $11
+#else /* if _MIPS_SIM == _MIPS_SIM_ABI32 */
#define t0 $8 /* caller saved */
#define t1 $9
#define t2 $10
#define t3 $11
+#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
#define t4 $12
#define t5 $13
#define t6 $14