Update.cvs/fedora-glibc-20050106T1443

2004-12-29  Jakub Jelinek  <jakub@redhat.com>

	* sysdeps/ia64/fpu/libm_support.h (__libm_error_support): Use
	libc_hidden_proto instead of HIDDEN_PROTO.
	* sysdeps/ia64/fpu/libm-symbols.h (HIDDEN_PROTO): Remove.
	(__libm_error_support): If ASSEMBLER and in libc, define to
	HIDDEN_JUMPTARGET(__libm_error_support).

2004-12-28  David Mosberger  <davidm@hpl.hp.com>

	* sysdeps/ia64/fpu/Makefile (duplicated-routines): New macro.
	(sysdep_routines): Replace libm_ldexp{,f,l} and libm_scalbn{,f,l}
	with $(duplicated-routines).
	(libm-sysdep_routines): Likewise, but substitute "s_" prefix for
	"m_" prefix.

2004-12-27  David Mosberger  <davidm@hpl.hp.com>

	* sysdeps/ia64/fpu/libm-symbols.h: Add include of <sysdep.h> and
	undefine "ret" macro.  Add __libm_error_support hidden definitions.

	* sysdeps/ia64/fpu/e_lgamma_r.c: Remove CVS-id comment.  Add
	missing portion of copyright statement.
	* sysdeps/ia64/fpu/e_lgammaf_r.c: Likewise.
	* sysdeps/ia64/fpu/e_lgammal_r.c: Likewise.

	* sysdeps/ia64/fpu/w_lgamma.c: Remove CVS-id comment.  Add
	missing portion of copyright statement.
	(__ieee754_lgamma): Rename from lgamma().  Make lgamma() a weak alias.
	(__ieee754_gamma): Likewise.
	* sysdeps/ia64/fpu/w_lgammaf.c: Likewise.
	* sysdeps/ia64/fpu/w_lgammal.c: Likewise.

2004-12-09  H. J. Lu <hjl@lucon.org>

	* sysdeps/ia64/fpu/s_nextafterl.c: Remove.
	* sysdeps/ia64/fpu/s_nexttoward.c: Likewise.
	* sysdeps/ia64/fpu/s_nexttowardf.c: Likewise.
	* sysdeps/ia64/fpu/e_atan2l.S: Remove (duplicate of e_atan2l.c).
	* sysdeps/ia64/fpu/e_expl.S: Likewise.
	* sysdeps/ia64/fpu/e_logl.c: Remove (conflicts with e_logl.S).

2004-11-18  David Mosberger  <davidm@hpl.hp.com>

	* sysdeps/ia64/fpu/README: New file.
	* sysdeps/ia64/fpu/gen_import_file_list: New file.
	* sysdeps/ia64/fpu/import_check: Likewise.
	* sysdeps/ia64/fpu/import_diffs: Likewise.
	* sysdeps/ia64/fpu/import_file.awk: Likewise.
	* sysdeps/ia64/fpu/import_intel_libm: Likewise.
	* sysdeps/ia64/fpu/libm-symbols.h: Likewise.

	* sysdeps/ia64/fpu/e_acos.S: Update from Intel libm v2.1+.
	* sysdeps/ia64/fpu/e_acosf.S: Likewise.
	* sysdeps/ia64/fpu/e_acosl.S: Likewise.
	* sysdeps/ia64/fpu/e_asin.S: Likewise.
	* sysdeps/ia64/fpu/e_asinf.S: Likewise.
	* sysdeps/ia64/fpu/e_asinl.S: Likewise.
	* sysdeps/ia64/fpu/e_atan2.S: Likewise.
	* sysdeps/ia64/fpu/e_atan2f.S: Likewise.
	* sysdeps/ia64/fpu/e_cosh.S: Likewise.
	* sysdeps/ia64/fpu/e_coshf.S: Likewise.
	* sysdeps/ia64/fpu/e_coshl.S: Likewise.
	* sysdeps/ia64/fpu/e_exp.S: Likewise.
	* sysdeps/ia64/fpu/e_expf.S: Likewise.
	* sysdeps/ia64/fpu/e_fmod.S: Likewise.
	* sysdeps/ia64/fpu/e_fmodf.S: Likewise.
	* sysdeps/ia64/fpu/e_fmodl.S: Likewise.
	* sysdeps/ia64/fpu/e_hypot.S: Likewise.
	* sysdeps/ia64/fpu/e_hypotf.S: Likewise.
	* sysdeps/ia64/fpu/e_hypotl.S: Likewise.
	* sysdeps/ia64/fpu/e_log.S: Likewise.
	* sysdeps/ia64/fpu/e_log2.S: Likewise.
	* sysdeps/ia64/fpu/e_log2f.S: Likewise.
	* sysdeps/ia64/fpu/e_log2l.S: Likewise.
	* sysdeps/ia64/fpu/e_logf.S: Likewise.
	* sysdeps/ia64/fpu/e_pow.S: Likewise.
	* sysdeps/ia64/fpu/e_powf.S: Likewise.
	* sysdeps/ia64/fpu/e_powl.S: Likewise.
	* sysdeps/ia64/fpu/e_remainder.S: Likewise.
	* sysdeps/ia64/fpu/e_remainderf.S: Likewise.
	* sysdeps/ia64/fpu/e_remainderl.S: Likewise.
	* sysdeps/ia64/fpu/e_scalb.S: Likewise.
	* sysdeps/ia64/fpu/e_scalbf.S: Likewise.
	* sysdeps/ia64/fpu/e_scalbl.S: Likewise.
	* sysdeps/ia64/fpu/e_sinh.S: Likewise.
	* sysdeps/ia64/fpu/e_sinhf.S: Likewise.
	* sysdeps/ia64/fpu/e_sinhl.S: Likewise.
	* sysdeps/ia64/fpu/e_sqrt.S: Likewise.
	* sysdeps/ia64/fpu/e_sqrtf.S: Likewise.
	* sysdeps/ia64/fpu/e_sqrtl.S: Likewise.
	* sysdeps/ia64/fpu/libm_error.c: Likewise.
	* sysdeps/ia64/fpu/libm_reduce.c: Likewise.
	* sysdeps/ia64/fpu/libm_support.h: Likewise.
	* sysdeps/ia64/fpu/s_atan.S: Likewise.
	* sysdeps/ia64/fpu/s_atanf.S: Likewise.
	* sysdeps/ia64/fpu/s_atanl.S: Likewise.
	* sysdeps/ia64/fpu/s_cbrt.S: Likewise.
	* sysdeps/ia64/fpu/s_cbrtf.S: Likewise.
	* sysdeps/ia64/fpu/s_cbrtl.S: Likewise.
	* sysdeps/ia64/fpu/s_ceil.S: Likewise.
	* sysdeps/ia64/fpu/s_ceilf.S: Likewise.
	* sysdeps/ia64/fpu/s_ceill.S: Likewise.
	* sysdeps/ia64/fpu/s_cos.S: Likewise.
	* sysdeps/ia64/fpu/s_cosf.S: Likewise.
	* sysdeps/ia64/fpu/s_cosl.S: Likewise.
	* sysdeps/ia64/fpu/s_expm1.S: Likewise.
	* sysdeps/ia64/fpu/s_expm1f.S: Likewise.
	* sysdeps/ia64/fpu/s_expm1l.S: Likewise.
	* sysdeps/ia64/fpu/s_fabs.S: Likewise.
	* sysdeps/ia64/fpu/s_fabsf.S: Likewise.
	* sysdeps/ia64/fpu/s_fabsl.S: Likewise.
	* sysdeps/ia64/fpu/s_floor.S: Likewise.
	* sysdeps/ia64/fpu/s_floorf.S: Likewise.
	* sysdeps/ia64/fpu/s_floorl.S: Likewise.
	* sysdeps/ia64/fpu/s_frexp.c: Likewise.
	* sysdeps/ia64/fpu/s_frexpf.c: Likewise.
	* sysdeps/ia64/fpu/s_frexpl.c: Likewise.
	* sysdeps/ia64/fpu/s_ilogb.S: Likewise.
	* sysdeps/ia64/fpu/s_ilogbf.S: Likewise.
	* sysdeps/ia64/fpu/s_ilogbl.S: Likewise.
	* sysdeps/ia64/fpu/s_log1p.S: Likewise.
	* sysdeps/ia64/fpu/s_log1pf.S: Likewise.
	* sysdeps/ia64/fpu/s_log1pl.S: Likewise.
	* sysdeps/ia64/fpu/s_logb.S: Likewise.
	* sysdeps/ia64/fpu/s_logbf.S: Likewise.
	* sysdeps/ia64/fpu/s_logbl.S: Likewise.
	* sysdeps/ia64/fpu/s_modf.S: Likewise.
	* sysdeps/ia64/fpu/s_modff.S: Likewise.
	* sysdeps/ia64/fpu/s_modfl.S: Likewise.
	* sysdeps/ia64/fpu/s_nearbyint.S: Likewise.
	* sysdeps/ia64/fpu/s_nearbyintf.S: Likewise.
	* sysdeps/ia64/fpu/s_nearbyintl.S: Likewise.
	* sysdeps/ia64/fpu/s_rint.S: Likewise.
	* sysdeps/ia64/fpu/s_rintf.S: Likewise.
	* sysdeps/ia64/fpu/s_rintl.S: Likewise.
	* sysdeps/ia64/fpu/s_round.S: Likewise.
	* sysdeps/ia64/fpu/s_roundf.S: Likewise.
	* sysdeps/ia64/fpu/s_roundl.S: Likewise.
	* sysdeps/ia64/fpu/s_significand.S: Likewise.
	* sysdeps/ia64/fpu/s_significandf.S: Likewise.
	* sysdeps/ia64/fpu/s_significandl.S: Likewise.
	* sysdeps/ia64/fpu/s_tan.S: Likewise.
	* sysdeps/ia64/fpu/s_tanf.S: Likewise.
	* sysdeps/ia64/fpu/s_tanl.S: Likewise.
	* sysdeps/ia64/fpu/s_trunc.S: Likewise.
	* sysdeps/ia64/fpu/s_truncf.S: Likewise.
	* sysdeps/ia64/fpu/s_truncl.S: Likewise.

	* sysdeps/ia64/fpu/e_acosh.S: New file from Intel libm v2.1+.
	* sysdeps/ia64/fpu/e_acoshf.S: Likewise.
	* sysdeps/ia64/fpu/e_acoshl.S: Likewise.
	* sysdeps/ia64/fpu/e_atanh.S: Likewise.
	* sysdeps/ia64/fpu/e_atanhf.S: Likewise.
	* sysdeps/ia64/fpu/e_atanhl.S: Likewise.
	* sysdeps/ia64/fpu/e_exp10.S: Likewise.
	* sysdeps/ia64/fpu/e_exp10f.S: Likewise.
	* sysdeps/ia64/fpu/e_exp10l.S: Likewise.
	* sysdeps/ia64/fpu/e_exp2.S: Likewise.
	* sysdeps/ia64/fpu/e_exp2f.S: Likewise.
	* sysdeps/ia64/fpu/e_exp2l.S: Likewise.
	* sysdeps/ia64/fpu/e_lgamma_r.S: Likewise.
	* sysdeps/ia64/fpu/e_lgammaf_r.S: Likewise.
	* sysdeps/ia64/fpu/e_lgammal_r.S: Likewise.
	* sysdeps/ia64/fpu/e_logl.S: Likewise.
	* sysdeps/ia64/fpu/libm_frexp.S: Likewise.
	* sysdeps/ia64/fpu/libm_frexpf.S: Likewise.
	* sysdeps/ia64/fpu/libm_frexpl.S: Likewise.
	* sysdeps/ia64/fpu/s_libm_ldexp.S: Likewise.
	* sysdeps/ia64/fpu/s_libm_ldexpf.S: Likewise.
	* sysdeps/ia64/fpu/s_libm_ldexpl.S: Likewise.
	* sysdeps/ia64/fpu/s_libm_scalbn.S: Likewise.
	* sysdeps/ia64/fpu/s_libm_scalbnf.S: Likewise.
	* sysdeps/ia64/fpu/s_libm_scalbnl.S: Likewise.
	* sysdeps/ia64/fpu/libm_lgamma.S: Likewise.
	* sysdeps/ia64/fpu/libm_lgammaf.S: Likewise.
	* sysdeps/ia64/fpu/libm_lgammal.S: Likewise.
	* sysdeps/ia64/fpu/libm_sincos.S: Likewise.
	* sysdeps/ia64/fpu/libm_sincos_large.S: Likewise.
	* sysdeps/ia64/fpu/libm_sincosf.S: Likewise.
	* sysdeps/ia64/fpu/libm_sincosl.S: Likewise.
	* sysdeps/ia64/fpu/libm_scalblnf.S: Likewise.
	* sysdeps/ia64/fpu/s_asinh.S: Likewise.
	* sysdeps/ia64/fpu/s_asinhf.S: Likewise.
	* sysdeps/ia64/fpu/s_asinhl.S: Likewise.
	* sysdeps/ia64/fpu/s_erf.S: Likewise.
	* sysdeps/ia64/fpu/s_erfc.S: Likewise.
	* sysdeps/ia64/fpu/s_erfcf.S: Likewise.
	* sysdeps/ia64/fpu/s_erfcl.S: Likewise.
	* sysdeps/ia64/fpu/s_erff.S: Likewise.
	* sysdeps/ia64/fpu/s_erfl.S: Likewise.
	* sysdeps/ia64/fpu/s_fdim.S: Likewise.
	* sysdeps/ia64/fpu/s_fdimf.S: Likewise.
	* sysdeps/ia64/fpu/s_fdiml.S: Likewise.
	* sysdeps/ia64/fpu/s_fma.S: Likewise.
	* sysdeps/ia64/fpu/s_fmaf.S: Likewise.
	* sysdeps/ia64/fpu/s_fmal.S: Likewise.
	* sysdeps/ia64/fpu/s_fmax.S: Likewise.
	* sysdeps/ia64/fpu/s_fmaxf.S: Likewise.
	* sysdeps/ia64/fpu/s_fmaxl.S: Likewise.
	* sysdeps/ia64/fpu/s_ldexp.c: Likewise.
	* sysdeps/ia64/fpu/s_ldexpf.c: Likewise.
	* sysdeps/ia64/fpu/s_ldexpl.c: Likewise.
	* sysdeps/ia64/fpu/s_nextafter.S: Likewise.
	* sysdeps/ia64/fpu/s_nextafterf.S: Likewise.
	* sysdeps/ia64/fpu/s_nextafterl.S: Likewise.
	* sysdeps/ia64/fpu/s_nexttoward.S: Likewise.
	* sysdeps/ia64/fpu/s_nexttowardf.S: Likewise.
	* sysdeps/ia64/fpu/s_nexttowardl.S: Likewise.
	* sysdeps/ia64/fpu/s_tanh.S: Likewise.
	* sysdeps/ia64/fpu/s_tanhf.S: Likewise.
	* sysdeps/ia64/fpu/s_tanhl.S: Likewise.
	* sysdeps/ia64/fpu/s_scalblnf.c: Likewise.
	* sysdeps/ia64/fpu/w_lgamma.c: Likewise.
	* sysdeps/ia64/fpu/w_lgammaf.c: Likewise.
	* sysdeps/ia64/fpu/w_lgammal.c: Likewise.
	* sysdeps/ia64/fpu/w_tgamma.S: Likewise.
	* sysdeps/ia64/fpu/w_tgammaf.S: Likewise.
	* sysdeps/ia64/fpu/w_tgammal.S: Likewise.

	* sysdeps/ia64/fpu/e_gamma_r.c: New empty dummy-file.
	* sysdeps/ia64/fpu/e_gammaf_r.c: Likewise.
	* sysdeps/ia64/fpu/e_gammal_r.c: Likewise.
	* sysdeps/ia64/fpu/w_acosh.c: Likewise.
	* sysdeps/ia64/fpu/w_acoshf.c: Likewise.
	* sysdeps/ia64/fpu/w_acoshl.c: Likewise.
	* sysdeps/ia64/fpu/w_atanh.c: Likewise.
	* sysdeps/ia64/fpu/w_atanhf.c: Likewise.
	* sysdeps/ia64/fpu/w_atanhl.c: Likewise.
	* sysdeps/ia64/fpu/w_exp10.c: Likewise.
	* sysdeps/ia64/fpu/w_exp10f.c: Likewise.
	* sysdeps/ia64/fpu/w_exp10l.c: Likewise.
	* sysdeps/ia64/fpu/w_exp2.c: Likewise.
	* sysdeps/ia64/fpu/w_exp2f.c: Likewise.
	* sysdeps/ia64/fpu/w_exp2l.c: Likewise.
	* sysdeps/ia64/fpu/w_expl.c: Likewise.
	* sysdeps/ia64/fpu/e_expl.S: Likewise.
	* sysdeps/ia64/fpu/w_lgamma_r.c: Likewise.
	* sysdeps/ia64/fpu/w_lgammaf_r.c: Likewise.
	* sysdeps/ia64/fpu/w_lgammal_r.c: Likewise.
	* sysdeps/ia64/fpu/w_log2.c: Likewise.
	* sysdeps/ia64/fpu/w_log2f.c: Likewise.
	* sysdeps/ia64/fpu/w_log2l.c: Likewise.
	* sysdeps/ia64/fpu/w_sinh.c: Likewise.
	* sysdeps/ia64/fpu/w_sinhf.c: Likewise.
	* sysdeps/ia64/fpu/w_sinhl.c: Likewise.

	* sysdeps/ia64/fpu/libm_atan2_reg.S: Remove.
	* sysdeps/ia64/fpu/s_ldexp.S: Likewise.
	* sysdeps/ia64/fpu/s_ldexpf.S: Likewise.
	* sysdeps/ia64/fpu/s_ldexpl.S: Likewise.
	* sysdeps/ia64/fpu/s_scalbn.S: Likewise.
	* sysdeps/ia64/fpu/s_scalbnf.S: Likewise.
	* sysdeps/ia64/fpu/s_scalbnl.S: Likewise.

	* sysdeps/ia64/fpu/s_sincos.c: Make it an empty dummy-file.
	* sysdeps/ia64/fpu/s_sincosf.c: Likewise.
	* sysdeps/ia64/fpu/s_sincosl.c: Likewise.

	* sysdeps/ia64/fpu/e_atan2l.S: Add "Not needed" comment.

	* sysdeps/ia64/fpu/s_copysign.S: Add __libm_copysign{,f,l}
	alias for use by libm_error.c

	* sysdeps/ia64/fpu/Makefile (libm-sysdep_routines): Remove
	libm_atan2_reg, libm_tan, libm_frexp4{f,l}.
	Mention s_erfc{,f,l}, libm_frexp{,f,l}, libm_ldexp{,f,l},
	libm_sincos{,f,l}, libm_sincos_large, libm_lgamma{,f,l},
	libm_scalbn{,f,l}, libm_scalblnf.
	(sysdep_routines): Remove libm_frexp4{,f,l}.
	Mention libm_frexp{,f,l}, libm_ldexp{,f,l}, and libm_scalbn{,f,l}.
	(sysdep-CPPFLAGS): Add -include libm-symbols.h, -D__POSIX__,
	_D_LIB_VERSIONIMF=_LIB_VERSION, -DSIZE_LONG_INT_64, and
	-DSIZE_LONG_LONG_INT_64.

1 files changed, 495 insertions, 0 deletions

diff --git a/sysdeps/ia64/fpu/s_nextafter.S b/sysdeps/ia64/fpu/s_nextafter.S
new file mode 100644
index 0000000000..8c77aa492b
--- /dev/null
+++ b/sysdeps/ia64/fpu/s_nextafter.S
@@ -0,0 +1,495 @@
+.file "nextafter.s"
+
+
+// Copyright (c) 2000 - 2003, Intel Corporation
+// All rights reserved.
+//
+// Contributed 2000 by the Intel Numerics Group, Intel Corporation
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met:
+//
+// * Redistributions of source code must retain the above copyright
+// notice, this list of conditions and the following disclaimer.
+//
+// * Redistributions in binary form must reproduce the above copyright
+// notice, this list of conditions and the following disclaimer in the
+// documentation and/or other materials provided with the distribution.
+//
+// * The name of Intel Corporation may not be used to endorse or promote
+// products derived from this software without specific prior written
+// permission.
+
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS 
+// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 
+// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 
+// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING
+// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 
+// 
+// Intel Corporation is the author of this code, and requests that all
+// problem reports or change requests be submitted to it directly at 
+// http://www.intel.com/software/products/opensource/libraries/num.htm.
+//
+// History
+//==============================================================
+// 02/02/00 Initial version 
+// 03/03/00 Modified to conform to C9X, and improve speed of main path
+// 03/14/00 Fixed case where x is a power of 2, and x > y, improved speed
+// 04/04/00 Unwind support added
+// 05/12/00 Fixed erroneous denormal flag setting for exponent change cases 1,3
+// 08/15/00 Bundle added after call to __libm_error_support to properly
+//          set [the previously overwritten] GR_Parameter_RESULT.
+// 09/09/00 Updated fcmp so that qnans do not raise invalid
+// 12/15/00 Corrected behavior when both args are zero to conform to C99, and
+//          fixed flag settings for several cases
+// 05/20/02 Cleaned up namespace and sf0 syntax
+// 02/10/03 Reordered header: .section, .global, .proc, .align
+//
+// API
+//==============================================================
+// double nextafter( double x, double y );
+// input  floating point f8, f9
+// output floating point f8
+//
+// Registers used
+//==============================================================
+nextafter_GR_max_pexp     = r14
+nextafter_GR_min_pexp     = r15
+nextafter_GR_exp          = r16
+nextafter_GR_sig          = r17
+nextafter_GR_lnorm_sig    = r18
+nextafter_GR_sign_mask    = r19
+nextafter_GR_exp_mask     = r20
+nextafter_GR_sden_sig     = r21
+nextafter_GR_new_sig      = r22
+nextafter_GR_new_exp      = r23
+nextafter_GR_lden_sig     = r24
+nextafter_GR_snorm_sig    = r25
+nextafter_GR_exp1         = r26
+nextafter_GR_x_exp        = r27
+nextafter_GR_min_den_rexp = r28
+// r36-39 parameters for libm_error_support
+
+GR_SAVE_B0                = r34
+GR_SAVE_GP                = r35
+GR_SAVE_PFS               = r32
+
+GR_Parameter_X            = r36
+GR_Parameter_Y            = r37
+GR_Parameter_RESULT       = r38
+
+NEXTAFTER_lnorm_sig       = f10
+NEXTAFTER_lnorm_exp       = f11
+NEXTAFTER_lnorm           = f12
+NEXTAFTER_sden_sig        = f13
+NEXTAFTER_sden_exp        = f14
+NEXTAFTER_sden            = f15
+NEXTAFTER_save_f8         = f33
+NEXTAFTER_new_exp         = f34
+NEXTAFTER_new_sig         = f35
+NEXTAFTER_lden_sig        = f36
+NEXTAFTER_snorm_sig       = f37
+NEXTAFTER_exp1            = f38
+NEXTAFTER_tmp             = f39
+
+//
+// Overview of operation
+//==============================================================
+// nextafter determines the next representable value 
+// after x in the direction of y. 
+
+
+.section .text
+GLOBAL_LIBM_ENTRY(nextafter)
+
+// Extract signexp from x
+// Is x < y ?  p10 if yes, p11 if no
+// Form smallest denormal significand = ulp size
+{ .mfi
+      getf.exp nextafter_GR_exp      = f8
+      fcmp.lt.s1 p10,p11 = f8, f9                
+      addl nextafter_GR_sden_sig = 0x800, r0
+}
+// Form largest normal significand 0xfffffffffffff800
+// Form smallest normal exponent
+{ .mfi
+      addl nextafter_GR_lnorm_sig = -0x800,r0
+      nop.f 999
+      addl nextafter_GR_min_pexp = 0x0fc01, r0 ;;
+}
+// Extract significand from x
+// Is x=y?
+// Form largest normal exponent
+{ .mfi
+      getf.sig nextafter_GR_sig      = f8
+      fcmp.eq.s0 p6,p0 = f8, f9                
+      addl nextafter_GR_max_pexp = 0x103fe, r0
+}
+// Move largest normal significand to fp reg for special cases
+{ .mfi
+      setf.sig NEXTAFTER_lnorm_sig = nextafter_GR_lnorm_sig
+      nop.f 999
+      addl nextafter_GR_sign_mask = 0x20000, r0 ;;
+}
+
+// Move smallest denormal significand and signexp to fp regs
+// Is x=nan?
+// Set p12 and p13 based on whether significand increases or decreases
+// It increases (p12 set) if x<y and x>=0 or if x>y and x<0
+// It decreases (p13 set) if x<y and x<0  or if x>y and x>=0
+{ .mfi
+      setf.sig NEXTAFTER_sden_sig = nextafter_GR_sden_sig
+      fclass.m  p8,p0 = f8, 0xc3           
+(p10) cmp.lt p12,p13 = nextafter_GR_exp, nextafter_GR_sign_mask
+}
+{ .mfi
+      setf.exp NEXTAFTER_sden_exp = nextafter_GR_min_pexp
+(p11) cmp.ge p12,p13 = nextafter_GR_exp, nextafter_GR_sign_mask ;;
+}
+
+.pred.rel "mutex",p12,p13
+
+// Form expected new significand, adding or subtracting 1 ulp increment
+// If x=y set result to y
+// Form smallest normal significand and largest denormal significand
+{ .mfi
+(p12) add nextafter_GR_new_sig = nextafter_GR_sig, nextafter_GR_sden_sig
+(p6)  fmerge.s f8=f9,f9
+      dep.z nextafter_GR_snorm_sig = 1,63,1 // 0x8000000000000000
+}
+{ .mlx
+(p13) sub nextafter_GR_new_sig = nextafter_GR_sig, nextafter_GR_sden_sig
+      movl nextafter_GR_lden_sig = 0x7ffffffffffff800 ;;
+}
+
+// Move expected result significand and signexp to fp regs
+// Is y=nan?
+// Form new exponent in case result exponent needs incrementing or decrementing
+{ .mfi
+      setf.exp NEXTAFTER_new_exp = nextafter_GR_exp
+      fclass.m  p9,p0 = f9, 0xc3           
+(p12) add nextafter_GR_exp1 = 1, nextafter_GR_exp
+}
+{ .mib
+      setf.sig NEXTAFTER_new_sig = nextafter_GR_new_sig
+(p13) add nextafter_GR_exp1 = -1, nextafter_GR_exp
+(p6)  br.ret.spnt    b0 ;;             // Exit if x=y
+}
+
+// Move largest normal signexp to fp reg for special cases
+// Is x=zero?
+{ .mfi
+      setf.exp NEXTAFTER_lnorm_exp = nextafter_GR_max_pexp
+      fclass.m  p7,p0 = f8, 0x7
+      nop.i 999
+}
+{ .mfb
+      nop.m 999
+(p8)  fma.s0 f8 = f8,f1,f9                     
+(p8)  br.ret.spnt    b0 ;;             // Exit if x=nan
+}
+
+// Move exp+-1 and smallest normal significand to fp regs for special cases
+// Is x=inf?
+{ .mfi
+      setf.exp NEXTAFTER_exp1 = nextafter_GR_exp1
+      fclass.m  p6,p0 = f8, 0x23           
+      addl nextafter_GR_exp_mask = 0x1ffff, r0
+}
+{ .mfb
+      setf.sig NEXTAFTER_snorm_sig = nextafter_GR_snorm_sig
+(p9)  fma.s0 f8 = f8,f1,f9                     
+(p9)  br.ret.spnt    b0 ;;             // Exit if y=nan
+}
+
+// Move largest denormal significand to fp regs for special cases
+// Save x
+{ .mfb
+      setf.sig NEXTAFTER_lden_sig = nextafter_GR_lden_sig
+      mov NEXTAFTER_save_f8 = f8
+(p7)  br.cond.spnt NEXTAFTER_ZERO ;;   // Exit if x=0   
+}
+
+// Mask off the sign to get x_exp
+{ .mfb
+      and nextafter_GR_x_exp = nextafter_GR_exp_mask, nextafter_GR_exp
+      nop.f 999
+(p6)  br.cond.spnt NEXTAFTER_INF ;;   // Exit if x=inf   
+}
+
+// Check 6 special cases when significand rolls over:
+//  1 sig size incr, x_sig=max_sig, x_exp < max_exp
+//     Set p6, result is sig=min_sig, exp++
+//  2 sig size incr, x_sig=max_sig, x_exp >= max_exp
+//     Set p7, result is inf, signal overflow
+//  3 sig size decr, x_sig=min_sig, x_exp > min_exp
+//     Set p8, result is sig=max_sig, exp--
+//  4 sig size decr, x_sig=min_sig, x_exp = min_exp
+//     Set p9, result is sig=max_den_sig, exp same, signal underflow and inexact
+//  5 sig size decr, x_sig=min_den_sig, x_exp = min_exp
+//     Set p10, result is zero, sign of x, signal underflow and inexact
+//  6 sig size decr, x_sig=min_sig, x_exp < min_exp 
+//     Set p14, result is zero, sign of x, signal underflow and inexact
+//
+// Form exponent of smallest double denormal (if normalized register format)
+{ .mmi
+      adds nextafter_GR_min_den_rexp = -52, nextafter_GR_min_pexp
+(p12) cmp.eq.unc p6,p0 = nextafter_GR_new_sig, r0
+(p13) cmp.eq.unc p8,p10 = nextafter_GR_new_sig, nextafter_GR_lden_sig ;;
+}
+
+{ .mmi
+(p6)  cmp.lt.unc p6,p7 = nextafter_GR_x_exp, nextafter_GR_max_pexp
+(p8)  cmp.gt.unc p8,p9 = nextafter_GR_x_exp, nextafter_GR_min_pexp
+(p10) cmp.eq.unc p10,p0 = nextafter_GR_new_sig, r0 ;;
+}
+
+// Create small normal in case need to generate underflow flag
+{ .mfi
+(p10) cmp.le.unc p10,p0 = nextafter_GR_x_exp, nextafter_GR_min_pexp
+      fmerge.se NEXTAFTER_tmp = NEXTAFTER_sden_exp, NEXTAFTER_lnorm_sig
+(p9)  cmp.gt.unc p9,p14 = nextafter_GR_x_exp, nextafter_GR_min_den_rexp
+}
+// Branch if cases 1, 2, 3
+{ .bbb
+(p6)  br.cond.spnt NEXTAFTER_EXPUP
+(p7)  br.cond.spnt NEXTAFTER_OVERFLOW
+(p8)  br.cond.spnt NEXTAFTER_EXPDOWN ;;
+}
+
+// Branch if cases 4, 5, 6
+{ .bbb
+(p9)  br.cond.spnt NEXTAFTER_NORM_TO_DENORM
+(p10) br.cond.spnt NEXTAFTER_UNDERFLOW_TO_ZERO
+(p14) br.cond.spnt NEXTAFTER_UNDERFLOW_TO_ZERO ;;
+}
+
+// Here if no special cases
+// Set p6 if result will be a denormal, so can force underflow flag
+//    Case 1:  x_exp=min_exp, x_sig=unnormalized
+//    Case 2:  x_exp<min_exp
+{ .mfi
+      cmp.lt p6,p7 = nextafter_GR_x_exp, nextafter_GR_min_pexp
+      fmerge.se f8 = NEXTAFTER_new_exp, NEXTAFTER_new_sig
+      nop.i 999 ;;
+}
+
+{ .mfi
+      nop.m 999
+      nop.f 999
+(p7)  tbit.z p6,p0 = nextafter_GR_new_sig, 63 ;;
+}
+
+NEXTAFTER_COMMON_FINISH:
+// Force underflow and inexact if denormal result
+{ .mfi
+      nop.m 999
+(p6)  fma.d.s0 NEXTAFTER_tmp = NEXTAFTER_tmp,NEXTAFTER_tmp,f0
+      nop.i 999 ;;
+}
+
+// Final normalization to result precision and exit
+{ .mfb
+      nop.m 999
+      fnorm.d.s0 f8 = f8
+      br.ret.sptk b0;;
+}
+
+//Special cases
+NEXTAFTER_EXPUP:
+{ .mfb
+      cmp.lt p6,p7 = nextafter_GR_x_exp, nextafter_GR_min_pexp
+      fmerge.se f8 = NEXTAFTER_exp1, NEXTAFTER_snorm_sig
+      br.cond.sptk NEXTAFTER_COMMON_FINISH ;;
+}
+
+NEXTAFTER_EXPDOWN:
+{ .mfb
+      cmp.lt p6,p7 = nextafter_GR_x_exp, nextafter_GR_min_pexp
+      fmerge.se f8 = NEXTAFTER_exp1, NEXTAFTER_lnorm_sig
+      br.cond.sptk NEXTAFTER_COMMON_FINISH ;;
+}
+
+NEXTAFTER_NORM_TO_DENORM:
+{ .mfi
+      nop.m 999
+      fmerge.se f8 = NEXTAFTER_new_exp, NEXTAFTER_lden_sig
+      nop.i 999
+}
+// Force underflow and inexact if denormal result
+{ .mfb
+      nop.m 999
+      fma.d.s0 NEXTAFTER_tmp = NEXTAFTER_tmp,NEXTAFTER_tmp,f0
+      br.ret.sptk b0 ;;
+}
+
+NEXTAFTER_UNDERFLOW_TO_ZERO:
+{ .mfb
+      cmp.eq p6,p0 = r0,r0
+      fmerge.s f8 = NEXTAFTER_save_f8,f0
+      br.cond.sptk NEXTAFTER_COMMON_FINISH ;;
+}
+
+NEXTAFTER_INF: 
+// Here if f8 is +- infinity
+// INF
+// if f8 is +inf, no matter what y is return  largest double
+// if f8 is -inf, no matter what y is return -largest double
+
+{ .mfi
+      nop.m 999
+      fmerge.se NEXTAFTER_lnorm = NEXTAFTER_lnorm_exp,NEXTAFTER_lnorm_sig
+      nop.i 999 ;;
+}
+
+{ .mfb
+      nop.m 999
+      fmerge.s f8 = f8,NEXTAFTER_lnorm                
+      br.ret.sptk    b0 ;;                        
+}
+
+NEXTAFTER_ZERO: 
+
+// Here if f8 is +- zero
+// ZERO
+// if f8 is zero and y is +, return + smallest double denormal 
+// if f8 is zero and y is -, return - smallest double denormal 
+
+{ .mfi
+      nop.m 999
+      fmerge.se NEXTAFTER_sden = NEXTAFTER_sden_exp,NEXTAFTER_sden_sig
+      nop.i 999 ;;
+}
+
+// Create small normal to generate underflow flag
+{ .mfi
+      nop.m 999
+      fmerge.se NEXTAFTER_tmp = NEXTAFTER_sden_exp, NEXTAFTER_lnorm_sig
+      nop.i 999 ;;
+}
+
+// Add correct sign from direction arg
+{ .mfi
+      nop.m 999
+      fmerge.s f8 = f9,NEXTAFTER_sden                
+      nop.i 999 ;;
+}
+
+{ .mfb
+      nop.m 999
+      fma.d.s0 NEXTAFTER_tmp = NEXTAFTER_tmp,NEXTAFTER_tmp,f0
+      br.ret.sptk    b0 ;;                        
+}
+
+GLOBAL_LIBM_END(nextafter)
+// Stack operations when calling error support.
+//       (1)               (2)                          (3) (call)              (4)
+//   sp   -> +          psp -> +                     psp -> +                   sp -> +
+//           |                 |                            |                         |
+//           |                 | <- GR_Y               R3 ->| <- GR_RESULT            | -> f8
+//           |                 |                            |                         |
+//           | <-GR_Y      Y2->|                       Y2 ->| <- GR_Y                 |
+//           |                 |                            |                         |
+//           |                 | <- GR_X               X1 ->|                         |
+//           |                 |                            |                         |
+//  sp-64 -> +          sp ->  +                     sp ->  +                         +
+//    save ar.pfs          save b0                                               restore gp
+//    save gp                                                                    restore ar.pfs
+
+
+
+LOCAL_LIBM_ENTRY(__libm_error_region)
+NEXTAFTER_OVERFLOW: 
+// Here if f8 is finite, but result will be infinite
+// Use frcpa to generate infinity of correct sign
+// Call error support to report possible range error
+.prologue
+
+{ .mfi
+      alloc          r32=ar.pfs,2,2,4,0
+      frcpa.s1 f8,p6 = NEXTAFTER_save_f8, f0
+      nop.i 999 ;;
+}
+
+// Create largest double
+{ .mfi
+      nop.m 999
+      fmerge.se NEXTAFTER_lnorm = NEXTAFTER_lnorm_exp,NEXTAFTER_lnorm_sig
+      nop.i 999 ;;
+}
+
+// Force overflow and inexact flags to be set
+{ .mfi
+      mov           r39 = 154      // Error code
+      fma.d.s0 NEXTAFTER_tmp = NEXTAFTER_lnorm,NEXTAFTER_lnorm,f0
+      nop.i 999
+}
+;;
+
+// (1)
+{ .mfi
+        add   GR_Parameter_Y=-32,sp             // Parameter 2 value
+        nop.f 0
+.save   ar.pfs,GR_SAVE_PFS
+        mov  GR_SAVE_PFS=ar.pfs                 // Save ar.pfs
+}
+{ .mfi
+.fframe 64
+        add sp=-64,sp                          // Create new stack
+        nop.f 0
+        mov GR_SAVE_GP=gp                      // Save gp
+};;
+
+
+// (2)
+{ .mmi
+        stfd [GR_Parameter_Y] = f9,16         // STORE Parameter 2 on stack
+        add GR_Parameter_X = 16,sp            // Parameter 1 address
+.save   b0, GR_SAVE_B0
+        mov GR_SAVE_B0=b0                     // Save b0
+};;
+
+.body
+// (3)
+{ .mib
+        stfd [GR_Parameter_X] = NEXTAFTER_save_f8              // STORE Parameter 1 on stack
+        add   GR_Parameter_RESULT = 0,GR_Parameter_Y           // Parameter 3 address
+        nop.b 0                                
+}
+{ .mib
+        stfd [GR_Parameter_Y] = f8              // STORE Parameter 3 on stack
+        add   GR_Parameter_Y = -16,GR_Parameter_Y
+        br.call.sptk b0=__libm_error_support#   // Call error handling function
+};;
+{ .mmi
+        nop.m 0
+        nop.m 0
+        add   GR_Parameter_RESULT = 48,sp
+};;
+
+// (4)
+{ .mmi
+        ldfd  f8 = [GR_Parameter_RESULT]       // Get return result off stack
+.restore sp
+        add   sp = 64,sp                       // Restore stack pointer
+        mov   b0 = GR_SAVE_B0                  // Restore return address
+};;
+{ .mib
+        mov   gp = GR_SAVE_GP                  // Restore gp
+        mov   ar.pfs = GR_SAVE_PFS             // Restore ar.pfs
+        br.ret.sptk     b0                     // Return
+};;
+
+LOCAL_LIBM_END(__libm_error_region)
+
+
+.type   __libm_error_support#,@function
+.global __libm_error_support#
+