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author | Joseph Myers <joseph@codesourcery.com> | 2012-07-01 13:08:59 +0000 |
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committer | Joseph Myers <joseph@codesourcery.com> | 2012-07-01 13:08:59 +0000 |
commit | e84eabb3871c9b39e59323bf3f6b98c2ca9d1cd0 (patch) | |
tree | dff3f1b79454b518d15a7b9bbedeb57ff156bbe8 /ports/sysdeps/arm/fpu_control.h | |
parent | 75f0d3040a2c2de8842bfa7a09e11da1a73e17d0 (diff) | |
parent | e64ac02c24b43659048622714afdc92fedf561fa (diff) |
Merge glibc-ports into ports/ directory.glibc-2.16-ports-merge
Diffstat (limited to 'ports/sysdeps/arm/fpu_control.h')
-rw-r--r-- | ports/sysdeps/arm/fpu_control.h | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/ports/sysdeps/arm/fpu_control.h b/ports/sysdeps/arm/fpu_control.h new file mode 100644 index 0000000000..635bc7d4ee --- /dev/null +++ b/ports/sysdeps/arm/fpu_control.h @@ -0,0 +1,63 @@ +/* FPU control word definitions. ARM VFP version. + Copyright (C) 2004, 2005, 2009 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library. If not, see + <http://www.gnu.org/licenses/>. */ + +#ifndef _FPU_CONTROL_H +#define _FPU_CONTROL_H + +#if !defined(_LIBC) && defined(__SOFTFP__) + +#define _FPU_RESERVED 0xffffffff +#define _FPU_DEFAULT 0x00000000 +typedef unsigned int fpu_control_t; +#define _FPU_GETCW(cw) 0 +#define _FPU_SETCW(cw) do { } while (0) +extern fpu_control_t __fpu_control; + +#else + +/* masking of interrupts */ +#define _FPU_MASK_IM 0x00000100 /* invalid operation */ +#define _FPU_MASK_ZM 0x00000200 /* divide by zero */ +#define _FPU_MASK_OM 0x00000400 /* overflow */ +#define _FPU_MASK_UM 0x00000800 /* underflow */ +#define _FPU_MASK_PM 0x00001000 /* inexact */ + +/* Some bits in the FPSCR are not yet defined. They must be preserved when + modifying the contents. */ +#define _FPU_RESERVED 0x0e08e0e0 +#define _FPU_DEFAULT 0x00000000 +/* Default + exceptions enabled. */ +#define _FPU_IEEE (_FPU_DEFAULT | 0x00001f00) + +/* Type of the control word. */ +typedef unsigned int fpu_control_t; + +/* Macros for accessing the hardware control word. */ +/* This is fmrx %0, fpscr. */ +#define _FPU_GETCW(cw) \ + __asm__ __volatile__ ("mrc p10, 7, %0, cr1, cr0, 0" : "=r" (cw)) +/* This is fmxr fpscr, %0. */ +#define _FPU_SETCW(cw) \ + __asm__ __volatile__ ("mcr p10, 7, %0, cr1, cr0, 0" : : "r" (cw)) + +/* Default control word set at startup. */ +extern fpu_control_t __fpu_control; + +#endif /* __SOFTFP__ */ + +#endif /* _FPU_CONTROL_H */ |