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authorH.J. Lu <hongjiu.lu@intel.com>2009-08-07 09:39:36 -0700
committerUlrich Drepper <drepper@redhat.com>2009-08-07 09:39:36 -0700
commita546baa9cd2e5176e9851811d5df6f23e35d3bb8 (patch)
tree1db7355ddca82021eef7f9f2d2baa11e3da78a2b /ChangeLog
parent77c84aeb81808c3109665949448dba59965c391e (diff)
Properly count number of logical processors on Intel CPUs.
The meaning of the 25-14 bits in EAX returned from cpuid with EAX = 4 has been changed from "the maximum number of threads sharing the cache" to "the maximum number of addressable IDs for logical processors sharing the cache" if cpuid takes EAX = 11. We need to use results from both EAX = 4 and EAX = 11 to get the number of threads sharing the cache. The 25-14 bits in EAX on Core i7 is 15 although the number of logical processors is 8. Here is a white paper on this: http://software.intel.com/en-us/articles/intel-64-architecture-processor-topology-enumeration/ This patch correctly counts number of logical processors on Intel CPUs with EAX = 11 support on cpuid. Tested on Dinnington, Core i7 and Nehalem EX/EP. It also fixed Pentium Ds workaround since EBX may not have the right value returned from cpuid with EAX = 1.
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+2009-08-05 H.J. Lu <hongjiu.lu@intel.com>
+
+ * sysdeps/x86_64/cacheinfo.c (init_cacheinfo): Properly use
+ EBX from EAX = 1. Handle EAX = 11.
+
2009-08-07 Andreas Schwab <schwab@redhat.com>
* Makefile (TAGS): Use separate sed -e expressions to avoid \