From 94a3f78566ef98a48814d82892f28bb741624cb8 Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Sat, 23 Feb 2008 00:23:48 +0100 Subject: [ARM] 4837/1: make __get_unaligned_*() return unsigned types Eric Sandeen tracked an XFS on ARM corruption bug down to a function under fs/xfs/ involving some get_unaligned() calls on u64 pointers. As it turns out, calling ARM's get_unaligned() on a u64 pointer pointing to the following byte sequence: 80 81 82 83 84 85 86 87 would return ffffffff83828180 (LE mode.) This turns out to be because of implicit u8 -> int promotion in ARM's implementation of various helpers for get_unaligned(), causing them to accidentally return signed instead of unsigned values, which in turn caused the subsequent casts to unsigned long long in __get_unaligned_8_[bl]e() to sign-extend the lower words. Fix by casting the return values of __get_unaligned_[24]_[bl]e() to unsigned int. Cc: Eric Sandeen Cc: Rabeeh Khoury Cc: Nicolas Pitre Signed-off-by: Lennert Buytenhek Signed-off-by: Russell King --- include/asm-arm/unaligned.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/asm-arm/unaligned.h b/include/asm-arm/unaligned.h index 8431f6eed5c..5db03cf3b90 100644 --- a/include/asm-arm/unaligned.h +++ b/include/asm-arm/unaligned.h @@ -40,16 +40,16 @@ extern int __bug_unaligned_x(const void *ptr); */ #define __get_unaligned_2_le(__p) \ - (__p[0] | __p[1] << 8) + (unsigned int)(__p[0] | __p[1] << 8) #define __get_unaligned_2_be(__p) \ - (__p[0] << 8 | __p[1]) + (unsigned int)(__p[0] << 8 | __p[1]) #define __get_unaligned_4_le(__p) \ - (__p[0] | __p[1] << 8 | __p[2] << 16 | __p[3] << 24) + (unsigned int)(__p[0] | __p[1] << 8 | __p[2] << 16 | __p[3] << 24) #define __get_unaligned_4_be(__p) \ - (__p[0] << 24 | __p[1] << 16 | __p[2] << 8 | __p[3]) + (unsigned int)(__p[0] << 24 | __p[1] << 16 | __p[2] << 8 | __p[3]) #define __get_unaligned_8_le(__p) \ ((unsigned long long)__get_unaligned_4_le((__p+4)) << 32 | \ -- cgit v1.2.3 From 5ce94e9e8b469a17fbd3efa1b940c19b5e43449a Mon Sep 17 00:00:00 2001 From: Thomas Kunze Date: Sun, 24 Feb 2008 17:59:34 +0100 Subject: [ARM] 4838/1: Fix kexec for SA1100 machines This patch sets KEXEC_CONTROL_MEMORY_LIMIT to (-1)UL. As the value is compared with physical addresses TASK_SIZE makes no sense. Machines where the RAM addresses start above TASK_SIZE kexecs eats all memory and crashes the kernel without this patch. Signed-off-by: Thomas Kunze Acked-by: Richard Purdie Signed-off-by: Russell King --- include/asm-arm/kexec.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-arm/kexec.h b/include/asm-arm/kexec.h index 1ee17b6951d..47fe34d692d 100644 --- a/include/asm-arm/kexec.h +++ b/include/asm-arm/kexec.h @@ -8,7 +8,7 @@ /* Maximum address we can reach in physical address mode */ #define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL) /* Maximum address we can use for the control code buffer */ -#define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE +#define KEXEC_CONTROL_MEMORY_LIMIT (-1UL) #define KEXEC_CONTROL_CODE_SIZE 4096 -- cgit v1.2.3 From a3359e21c06cb5b366fb47307b3d2fd23386a774 Mon Sep 17 00:00:00 2001 From: eric miao Date: Wed, 27 Feb 2008 01:59:28 +0100 Subject: [ARM] 4840/1: pxa: fix the typo in get_irqnr_and_base This typo causes the incorrect calculation of the IRQ numbers in the ICIP2 registers. Signed-off-by: eric miao Signed-off-by: Russell King --- include/asm-arm/arch-pxa/entry-macro.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-arm/arch-pxa/entry-macro.S b/include/asm-arm/arch-pxa/entry-macro.S index b7e73085146..c145bb01bc8 100644 --- a/include/asm-arm/arch-pxa/entry-macro.S +++ b/include/asm-arm/arch-pxa/entry-macro.S @@ -35,7 +35,7 @@ 1004: mrc p6, 0, \irqstat, c6, c0, 0 @ ICIP2 mrc p6, 0, \irqnr, c7, c0, 0 @ ICMR2 - ands \irqstat, \irqstat, \irqnr + ands \irqnr, \irqstat, \irqnr beq 1003f rsb \irqstat, \irqnr, #0 and \irqstat, \irqstat, \irqnr -- cgit v1.2.3 From d862ccc570c875e1454fc57ed00f5a1081985b26 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Wed, 27 Feb 2008 15:34:56 +0100 Subject: [ARM] 4843/1: Add GCR_CLKBPB for PXA3xx The PXA3xx AC97 controller has an additional control bit GCR_CLKBPB which must be used during cold reset. Signed-off-by: Mark Brown Acked-by: eric miao Signed-off-by: Russell King --- include/asm-arm/arch-pxa/pxa-regs.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index ac175b4d10c..2357a73340d 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h @@ -520,6 +520,9 @@ #define MCCR_FSRIE (1 << 1) /* FIFO Service Request Interrupt Enable */ #define GCR __REG(0x4050000C) /* Global Control Register */ +#ifdef CONFIG_PXA3xx +#define GCR_CLKBPB (1 << 31) /* Internal clock enable */ +#endif #define GCR_nDMAEN (1 << 24) /* non DMA Enable */ #define GCR_CDONE_IE (1 << 19) /* Command Done Interrupt Enable */ #define GCR_SDONE_IE (1 << 18) /* Status Done Interrupt Enable */ -- cgit v1.2.3