e1000: Replace some E1000-specific names with names from iPXE

DEBUGOUT -> DBG
msec_delay -> mdelay
usec_delay -> udelay

11 files changed, 242 insertions, 250 deletions

diff --git a/src/drivers/net/e1000/e1000_82540.c b/src/drivers/net/e1000/e1000_82540.c
index 41f3f979..ca8705d9 100644
--- a/src/drivers/net/e1000/e1000_82540.c
+++ b/src/drivers/net/e1000/e1000_82540.c
@@ -276,7 +276,7 @@ static s32 e1000_reset_hw_82540(struct e1000_hw *hw)
 
 	DEBUGFUNC("e1000_reset_hw_82540");
 
-	DEBUGOUT("Masking off all interrupts\n");
+	DBG("Masking off all interrupts\n");
 	E1000_WRITE_REG(hw, E1000_IMC, 0xFFFFFFFF);
 
 	E1000_WRITE_REG(hw, E1000_RCTL, 0);
@@ -287,11 +287,11 @@ static s32 e1000_reset_hw_82540(struct e1000_hw *hw)
 	 * Delay to allow any outstanding PCI transactions to complete
 	 * before resetting the device.
 	 */
-	msec_delay(10);
+	mdelay(10);
 
 	ctrl = E1000_READ_REG(hw, E1000_CTRL);
 
-	DEBUGOUT("Issuing a global reset to 82540/82545/82546 MAC\n");
+	DBG("Issuing a global reset to 82540/82545/82546 MAC\n");
 	switch (hw->mac.type) {
 	case e1000_82545_rev_3:
 	case e1000_82546_rev_3:
@@ -308,7 +308,7 @@ static s32 e1000_reset_hw_82540(struct e1000_hw *hw)
 	}
 
 	/* Wait for EEPROM reload */
-	msec_delay(5);
+	mdelay(5);
 
 	/* Disable HW ARPs on ASF enabled adapters */
 	manc = E1000_READ_REG(hw, E1000_MANC);
@@ -339,12 +339,12 @@ static s32 e1000_init_hw_82540(struct e1000_hw *hw)
 	/* Initialize identification LED */
 	ret_val = mac->ops.id_led_init(hw);
 	if (ret_val) {
-		DEBUGOUT("Error initializing identification LED\n");
+		DBG("Error initializing identification LED\n");
 		/* This is not fatal and we should not stop init due to this */
 	}
 
 	/* Disabling VLAN filtering */
-	DEBUGOUT("Initializing the IEEE VLAN\n");
+	DBG("Initializing the IEEE VLAN\n");
 	if (mac->type < e1000_82545_rev_3)
 		E1000_WRITE_REG(hw, E1000_VET, 0);
 
@@ -354,7 +354,7 @@ static s32 e1000_init_hw_82540(struct e1000_hw *hw)
 	e1000_init_rx_addrs_generic(hw, mac->rar_entry_count);
 
 	/* Zero out the Multicast HASH table */
-	DEBUGOUT("Zeroing the MTA\n");
+	DBG("Zeroing the MTA\n");
 	for (i = 0; i < mac->mta_reg_count; i++) {
 		E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);
 		/*
@@ -702,11 +702,11 @@ s32 e1000_read_mac_addr_82540(struct e1000_hw *hw)
 
 	DEBUGFUNC("e1000_read_mac_addr");
 
-	for (i = 0; i < ETH_ADDR_LEN; i += 2) {
+	for (i = 0; i < ETH_ALEN; i += 2) {
 		offset = i >> 1;
 		ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data);
 		if (ret_val) {
-			DEBUGOUT("NVM Read Error\n");
+			DBG("NVM Read Error\n");
 			goto out;
 		}
 		hw->mac.perm_addr[i] = (u8)(nvm_data & 0xFF);
@@ -717,7 +717,7 @@ s32 e1000_read_mac_addr_82540(struct e1000_hw *hw)
 	if (hw->bus.func == E1000_FUNC_1)
 		hw->mac.perm_addr[5] ^= 1;
 
-	for (i = 0; i < ETH_ADDR_LEN; i++)
+	for (i = 0; i < ETH_ALEN; i++)
 		hw->mac.addr[i] = hw->mac.perm_addr[i];
 
 out:
diff --git a/src/drivers/net/e1000/e1000_82541.c b/src/drivers/net/e1000/e1000_82541.c
index 2d1aecc7..4ed4bce8 100644
--- a/src/drivers/net/e1000/e1000_82541.c
+++ b/src/drivers/net/e1000/e1000_82541.c
@@ -308,7 +308,7 @@ static s32 e1000_reset_hw_82541(struct e1000_hw *hw)
 
 	DEBUGFUNC("e1000_reset_hw_82541");
 
-	DEBUGOUT("Masking off all interrupts\n");
+	DBG("Masking off all interrupts\n");
 	E1000_WRITE_REG(hw, E1000_IMC, 0xFFFFFFFF);
 
 	E1000_WRITE_REG(hw, E1000_RCTL, 0);
@@ -319,17 +319,17 @@ static s32 e1000_reset_hw_82541(struct e1000_hw *hw)
 	 * Delay to allow any outstanding PCI transactions to complete
 	 * before resetting the device.
 	 */
-	msec_delay(10);
+	mdelay(10);
 
 	ctrl = E1000_READ_REG(hw, E1000_CTRL);
 
 	/* Must reset the Phy before resetting the MAC */
 	if ((hw->mac.type == e1000_82541) || (hw->mac.type == e1000_82547)) {
 		E1000_WRITE_REG(hw, E1000_CTRL, (ctrl | E1000_CTRL_PHY_RST));
-		msec_delay(5);
+		mdelay(5);
 	}
 
-	DEBUGOUT("Issuing a global reset to 82541/82547 MAC\n");
+	DBG("Issuing a global reset to 82541/82547 MAC\n");
 	switch (hw->mac.type) {
 	case e1000_82541:
 	case e1000_82541_rev_2:
@@ -346,7 +346,7 @@ static s32 e1000_reset_hw_82541(struct e1000_hw *hw)
 	}
 
 	/* Wait for NVM reload */
-	msec_delay(20);
+	mdelay(20);
 
 	/* Disable HW ARPs on ASF enabled adapters */
 	manc = E1000_READ_REG(hw, E1000_MANC);
@@ -364,7 +364,7 @@ static s32 e1000_reset_hw_82541(struct e1000_hw *hw)
 	}
 
 	/* Once again, mask the interrupts */
-	DEBUGOUT("Masking off all interrupts\n");
+	DBG("Masking off all interrupts\n");
 	E1000_WRITE_REG(hw, E1000_IMC, 0xFFFFFFFF);
 
 	/* Clear any pending interrupt events. */
@@ -391,7 +391,7 @@ static s32 e1000_init_hw_82541(struct e1000_hw *hw)
 	/* Initialize identification LED */
 	ret_val = mac->ops.id_led_init(hw);
 	if (ret_val) {
-		DEBUGOUT("Error initializing identification LED\n");
+		DBG("Error initializing identification LED\n");
 		/* This is not fatal and we should not stop init due to this */
 	}
 
@@ -403,14 +403,14 @@ static s32 e1000_init_hw_82541(struct e1000_hw *hw)
 		goto out;
 
 	/* Disabling VLAN filtering */
-	DEBUGOUT("Initializing the IEEE VLAN\n");
+	DBG("Initializing the IEEE VLAN\n");
 	mac->ops.clear_vfta(hw);
 
 	/* Setup the receive address. */
 	e1000_init_rx_addrs_generic(hw, mac->rar_entry_count);
 
 	/* Zero out the Multicast HASH table */
-	DEBUGOUT("Zeroing the MTA\n");
+	DBG("Zeroing the MTA\n");
 	for (i = 0; i < mac->mta_reg_count; i++) {
 		E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);
 		/*
@@ -663,7 +663,7 @@ static s32 e1000_check_for_link_82541(struct e1000_hw *hw)
 	 */
 	ret_val = e1000_config_fc_after_link_up_generic(hw);
 	if (ret_val) {
-		DEBUGOUT("Error configuring flow control\n");
+		DBG("Error configuring flow control\n");
 	}
 
 out:
@@ -702,7 +702,7 @@ static s32 e1000_config_dsp_after_link_change_82541(struct e1000_hw *hw,
 	if (link_up) {
 		ret_val = hw->mac.ops.get_link_up_info(hw, &speed, &duplex);
 		if (ret_val) {
-			DEBUGOUT("Error getting link speed and duplex\n");
+			DBG("Error getting link speed and duplex\n");
 			goto out;
 		}
 
@@ -751,7 +751,7 @@ static s32 e1000_config_dsp_after_link_change_82541(struct e1000_hw *hw,
 			goto out;
 
 		for (i = 0; i < ffe_idle_err_timeout; i++) {
-			usec_delay(1000);
+			udelay(1000);
 			ret_val = phy->ops.read_reg(hw,
 			                            PHY_1000T_STATUS,
 			                            &phy_data);
@@ -791,7 +791,7 @@ static s32 e1000_config_dsp_after_link_change_82541(struct e1000_hw *hw,
 			if (ret_val)
 				goto out;
 
-			msec_delay_irq(20);
+			mdelay(20);
 
 			ret_val = phy->ops.write_reg(hw,
 			                             0x0000,
@@ -821,7 +821,7 @@ static s32 e1000_config_dsp_after_link_change_82541(struct e1000_hw *hw,
 			if (ret_val)
 				goto out;
 
-			msec_delay_irq(20);
+			mdelay(20);
 
 			/* Now enable the transmitter */
 			ret_val = phy->ops.write_reg(hw,
@@ -851,7 +851,7 @@ static s32 e1000_config_dsp_after_link_change_82541(struct e1000_hw *hw,
 		if (ret_val)
 			goto out;
 
-		msec_delay_irq(20);
+		mdelay(20);
 
 		ret_val = phy->ops.write_reg(hw,
 		                             0x0000,
@@ -871,7 +871,7 @@ static s32 e1000_config_dsp_after_link_change_82541(struct e1000_hw *hw,
 		if (ret_val)
 			goto out;
 
-		msec_delay_irq(20);
+		mdelay(20);
 
 		/* Now enable the transmitter */
 		ret_val = phy->ops.write_reg(hw, 0x2F5B, phy_saved_data);
@@ -1145,7 +1145,7 @@ static s32 e1000_phy_init_script_82541(struct e1000_hw *hw)
 	}
 
 	/* Delay after phy reset to enable NVM configuration to load */
-	msec_delay(20);
+	mdelay(20);
 
 	/*
 	 * Save off the current value of register 0x2F5B to be restored at
@@ -1156,11 +1156,11 @@ static s32 e1000_phy_init_script_82541(struct e1000_hw *hw)
 	/* Disabled the PHY transmitter */
 	hw->phy.ops.write_reg(hw, 0x2F5B, 0x0003);
 
-	msec_delay(20);
+	mdelay(20);
 
 	hw->phy.ops.write_reg(hw, 0x0000, 0x0140);
 
-	msec_delay(5);
+	mdelay(5);
 
 	switch (hw->mac.type) {
 	case e1000_82541:
@@ -1193,7 +1193,7 @@ static s32 e1000_phy_init_script_82541(struct e1000_hw *hw)
 
 	hw->phy.ops.write_reg(hw, 0x0000, 0x3300);
 
-	msec_delay(20);
+	mdelay(20);
 
 	/* Now enable the transmitter */
 	hw->phy.ops.write_reg(hw, 0x2F5B, phy_saved_data);
diff --git a/src/drivers/net/e1000/e1000_82542.c b/src/drivers/net/e1000/e1000_82542.c
index b6d5202c..cf9ed33f 100644
--- a/src/drivers/net/e1000/e1000_82542.c
+++ b/src/drivers/net/e1000/e1000_82542.c
@@ -191,11 +191,11 @@ static s32 e1000_reset_hw_82542(struct e1000_hw *hw)
 	DEBUGFUNC("e1000_reset_hw_82542");
 
 	if (hw->revision_id == E1000_REVISION_2) {
-		DEBUGOUT("Disabling MWI on 82542 rev 2\n");
+		DBG("Disabling MWI on 82542 rev 2\n");
 		e1000_pci_clear_mwi(hw);
 	}
 
-	DEBUGOUT("Masking off all interrupts\n");
+	DBG("Masking off all interrupts\n");
 	E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);
 
 	E1000_WRITE_REG(hw, E1000_RCTL, 0);
@@ -206,21 +206,21 @@ static s32 e1000_reset_hw_82542(struct e1000_hw *hw)
 	 * Delay to allow any outstanding PCI transactions to complete before
 	 * resetting the device
 	 */
-	msec_delay(10);
+	mdelay(10);
 
 	ctrl = E1000_READ_REG(hw, E1000_CTRL);
 
-	DEBUGOUT("Issuing a global reset to 82542/82543 MAC\n");
+	DBG("Issuing a global reset to 82542/82543 MAC\n");
 	E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_RST);
 
 	hw->nvm.ops.reload(hw);
-	msec_delay(2);
+	mdelay(2);
 
 	E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);
 	E1000_READ_REG(hw, E1000_ICR);
 
 	if (hw->revision_id == E1000_REVISION_2) {
-		if (bus->pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
+		if (bus->pci_cmd_word & PCI_COMMAND_INVALIDATE)
 			e1000_pci_set_mwi(hw);
 	}
 
@@ -249,11 +249,11 @@ static s32 e1000_init_hw_82542(struct e1000_hw *hw)
 
 	/* For 82542 (rev 2.0), disable MWI and put the receiver into reset */
 	if (hw->revision_id == E1000_REVISION_2) {
-		DEBUGOUT("Disabling MWI on 82542 rev 2.0\n");
+		DBG("Disabling MWI on 82542 rev 2.0\n");
 		e1000_pci_clear_mwi(hw);
 		E1000_WRITE_REG(hw, E1000_RCTL, E1000_RCTL_RST);
 		E1000_WRITE_FLUSH(hw);
-		msec_delay(5);
+		mdelay(5);
 	}
 
 	/* Setup the receive address. */
@@ -263,13 +263,13 @@ static s32 e1000_init_hw_82542(struct e1000_hw *hw)
 	if (hw->revision_id == E1000_REVISION_2) {
 		E1000_WRITE_REG(hw, E1000_RCTL, 0);
 		E1000_WRITE_FLUSH(hw);
-		msec_delay(1);
-		if (hw->bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
+		mdelay(1);
+		if (hw->bus.pci_cmd_word & PCI_COMMAND_INVALIDATE)
 			e1000_pci_set_mwi(hw);
 	}
 
 	/* Zero out the Multicast HASH table */
-	DEBUGOUT("Zeroing the MTA\n");
+	DBG("Zeroing the MTA\n");
 	for (i = 0; i < mac->mta_reg_count; i++)
 		E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);
 
@@ -329,7 +329,7 @@ static s32 e1000_setup_link_82542(struct e1000_hw *hw)
 	 */
 	hw->fc.current_mode = hw->fc.requested_mode;
 
-	DEBUGOUT1("After fix-ups FlowControl is now = %x\n",
+	DBG("After fix-ups FlowControl is now = %x\n",
 	                                             hw->fc.current_mode);
 
 	/* Call the necessary subroutine to configure the link. */
@@ -343,7 +343,7 @@ static s32 e1000_setup_link_82542(struct e1000_hw *hw)
 	 * control is disabled, because it does not hurt anything to
 	 * initialize these registers.
 	 */
-	DEBUGOUT("Initializing Flow Control address, type and timer regs\n");
+	DBG("Initializing Flow Control address, type and timer regs\n");
 
 	E1000_WRITE_REG(hw, E1000_FCAL, FLOW_CONTROL_ADDRESS_LOW);
 	E1000_WRITE_REG(hw, E1000_FCAH, FLOW_CONTROL_ADDRESS_HIGH);
diff --git a/src/drivers/net/e1000/e1000_82543.c b/src/drivers/net/e1000/e1000_82543.c
index 848c99e7..2b23aeac 100644
--- a/src/drivers/net/e1000/e1000_82543.c
+++ b/src/drivers/net/e1000/e1000_82543.c
@@ -128,10 +128,10 @@ static s32 e1000_init_phy_params_82543(struct e1000_hw *hw)
 	if (!e1000_init_phy_disabled_82543(hw)) {
 		ret_val = phy->ops.reset(hw);
 		if (ret_val) {
-			DEBUGOUT("Resetting PHY during init failed.\n");
+			DBG("Resetting PHY during init failed.\n");
 			goto out;
 		}
-		msec_delay(20);
+		mdelay(20);
 	}
 
 	ret_val = e1000_get_phy_id(hw);
@@ -293,7 +293,7 @@ static bool e1000_tbi_compatibility_enabled_82543(struct e1000_hw *hw)
 	DEBUGFUNC("e1000_tbi_compatibility_enabled_82543");
 
 	if (hw->mac.type != e1000_82543) {
-		DEBUGOUT("TBI compatibility workaround for 82543 only.\n");
+		DBG("TBI compatibility workaround for 82543 only.\n");
 		goto out;
 	}
 
@@ -318,7 +318,7 @@ static void e1000_set_tbi_compatibility_82543(struct e1000_hw *hw, bool state)
 	DEBUGFUNC("e1000_set_tbi_compatibility_82543");
 
 	if (hw->mac.type != e1000_82543) {
-		DEBUGOUT("TBI compatibility workaround for 82543 only.\n");
+		DBG("TBI compatibility workaround for 82543 only.\n");
 		goto out;
 	}
 
@@ -346,7 +346,7 @@ bool e1000_tbi_sbp_enabled_82543(struct e1000_hw *hw)
 	DEBUGFUNC("e1000_tbi_sbp_enabled_82543");
 
 	if (hw->mac.type != e1000_82543) {
-		DEBUGOUT("TBI compatibility workaround for 82543 only.\n");
+		DBG("TBI compatibility workaround for 82543 only.\n");
 		goto out;
 	}
 
@@ -499,7 +499,7 @@ static s32 e1000_read_phy_reg_82543(struct e1000_hw *hw, u32 offset, u16 *data)
 	DEBUGFUNC("e1000_read_phy_reg_82543");
 
 	if (offset > MAX_PHY_REG_ADDRESS) {
-		DEBUGOUT1("PHY Address %d is out of range\n", offset);
+		DBG("PHY Address %d is out of range\n", offset);
 		ret_val = -E1000_ERR_PARAM;
 		goto out;
 	}
@@ -555,7 +555,7 @@ static s32 e1000_write_phy_reg_82543(struct e1000_hw *hw, u32 offset, u16 data)
 	DEBUGFUNC("e1000_write_phy_reg_82543");
 
 	if (offset > MAX_PHY_REG_ADDRESS) {
-		DEBUGOUT1("PHY Address %d is out of range\n", offset);
+		DBG("PHY Address %d is out of range\n", offset);
 		ret_val = -E1000_ERR_PARAM;
 		goto out;
 	}
@@ -602,7 +602,7 @@ static void e1000_raise_mdi_clk_82543(struct e1000_hw *hw, u32 *ctrl)
 	 */
 	E1000_WRITE_REG(hw, E1000_CTRL, (*ctrl | E1000_CTRL_MDC));
 	E1000_WRITE_FLUSH(hw);
-	usec_delay(10);
+	udelay(10);
 }
 
 /**
@@ -621,7 +621,7 @@ static void e1000_lower_mdi_clk_82543(struct e1000_hw *hw, u32 *ctrl)
 	 */
 	E1000_WRITE_REG(hw, E1000_CTRL, (*ctrl & ~E1000_CTRL_MDC));
 	E1000_WRITE_FLUSH(hw);
-	usec_delay(10);
+	udelay(10);
 }
 
 /**
@@ -666,7 +666,7 @@ static void e1000_shift_out_mdi_bits_82543(struct e1000_hw *hw, u32 data,
 		E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
 		E1000_WRITE_FLUSH(hw);
 
-		usec_delay(10);
+		udelay(10);
 
 		e1000_raise_mdi_clk_82543(hw, &ctrl);
 		e1000_lower_mdi_clk_82543(hw, &ctrl);
@@ -816,26 +816,26 @@ static s32 e1000_polarity_reversal_workaround_82543(struct e1000_hw *hw)
 
 		if ((mii_status_reg & ~MII_SR_LINK_STATUS) == 0)
 			break;
-		msec_delay_irq(100);
+		mdelay(100);
 	}
 
 	/* Recommended delay time after link has been lost */
-	msec_delay_irq(1000);
+	mdelay(1000);
 
 	/* Now we will re-enable the transmitter on the PHY */
 
 	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0019);
 	if (ret_val)
 		goto out;
-	msec_delay_irq(50);
+	mdelay(50);
 	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFFF0);
 	if (ret_val)
 		goto out;
-	msec_delay_irq(50);
+	mdelay(50);
 	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFF00);
 	if (ret_val)
 		goto out;
-	msec_delay_irq(50);
+	mdelay(50);
 	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0x0000);
 	if (ret_val)
 		goto out;
@@ -882,14 +882,14 @@ static s32 e1000_phy_hw_reset_82543(struct e1000_hw *hw)
 	E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
 	E1000_WRITE_FLUSH(hw);
 
-	msec_delay(10);
+	mdelay(10);
 
 	/* ...then take it out of reset. */
 	ctrl_ext |= E1000_CTRL_EXT_SDP4_DATA;
 	E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
 	E1000_WRITE_FLUSH(hw);
 
-	usec_delay(150);
+	udelay(150);
 
 	if (!(hw->phy.ops.get_cfg_done))
 		return E1000_SUCCESS;
@@ -912,7 +912,7 @@ static s32 e1000_reset_hw_82543(struct e1000_hw *hw)
 
 	DEBUGFUNC("e1000_reset_hw_82543");
 
-	DEBUGOUT("Masking off all interrupts\n");
+	DBG("Masking off all interrupts\n");
 	E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);
 
 	E1000_WRITE_REG(hw, E1000_RCTL, 0);
@@ -925,11 +925,11 @@ static s32 e1000_reset_hw_82543(struct e1000_hw *hw)
 	 * Delay to allow any outstanding PCI transactions to complete before
 	 * resetting the device
 	 */
-	msec_delay(10);
+	mdelay(10);
 
 	ctrl = E1000_READ_REG(hw, E1000_CTRL);
 
-	DEBUGOUT("Issuing a global reset to 82543/82544 MAC\n");
+	DBG("Issuing a global reset to 82543/82544 MAC\n");
 	if (hw->mac.type == e1000_82543) {
 		E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_RST);
 	} else {
@@ -945,7 +945,7 @@ static s32 e1000_reset_hw_82543(struct e1000_hw *hw)
 	 * settings to device.
 	 */
 	hw->nvm.ops.reload(hw);
-	msec_delay(2);
+	mdelay(2);
 
 	/* Masking off and clearing any pending interrupts */
 	E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);
@@ -978,7 +978,7 @@ static s32 e1000_init_hw_82543(struct e1000_hw *hw)
 	e1000_init_rx_addrs_generic(hw, mac->rar_entry_count);
 
 	/* Zero out the Multicast HASH table */
-	DEBUGOUT("Zeroing the MTA\n");
+	DBG("Zeroing the MTA\n");
 	for (i = 0; i < mac->mta_reg_count; i++) {
 		E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);
 		E1000_WRITE_FLUSH(hw);
@@ -1041,7 +1041,7 @@ static s32 e1000_setup_link_82543(struct e1000_hw *hw)
 	if (hw->mac.type == e1000_82543) {
 		ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL2_REG, 1, &data);
 		if (ret_val) {
-			DEBUGOUT("NVM Read Error\n");
+			DBG("NVM Read Error\n");
 			ret_val = -E1000_ERR_NVM;
 			goto out;
 		}
@@ -1110,10 +1110,10 @@ static s32 e1000_setup_copper_link_82543(struct e1000_hw *hw)
 		 * depending on user settings.
 		 */
 #if 0
-		DEBUGOUT("Forcing Speed and Duplex\n");
+		DBG("Forcing Speed and Duplex\n");
 		ret_val = e1000_phy_force_speed_duplex_82543(hw);
 		if (ret_val) {
-			DEBUGOUT("Error Forcing Speed and Duplex\n");
+			DBG("Error Forcing Speed and Duplex\n");
 			goto out;
 		}
 #endif
@@ -1132,7 +1132,7 @@ static s32 e1000_setup_copper_link_82543(struct e1000_hw *hw)
 
 
 	if (link) {
-		DEBUGOUT("Valid link established!!!\n");
+		DBG("Valid link established!!!\n");
 		/* Config the MAC and PHY after link is up */
 		if (hw->mac.type == e1000_82544) {
 			e1000_config_collision_dist_generic(hw);
@@ -1143,7 +1143,7 @@ static s32 e1000_setup_copper_link_82543(struct e1000_hw *hw)
 		}
 		ret_val = e1000_config_fc_after_link_up_generic(hw);
 	} else {
-		DEBUGOUT("Unable to establish link!!!\n");
+		DBG("Unable to establish link!!!\n");
 	}
 
 out:
@@ -1175,11 +1175,11 @@ static s32 e1000_setup_fiber_link_82543(struct e1000_hw *hw)
 	if (ret_val)
 		goto out;
 
-	DEBUGOUT("Auto-negotiation enabled\n");
+	DBG("Auto-negotiation enabled\n");
 
 	E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
 	E1000_WRITE_FLUSH(hw);
-	msec_delay(1);
+	mdelay(1);
 
 	/*
 	 * For these adapters, the SW definable pin 1 is cleared when the
@@ -1189,7 +1189,7 @@ static s32 e1000_setup_fiber_link_82543(struct e1000_hw *hw)
 	if (!(E1000_READ_REG(hw, E1000_CTRL) & E1000_CTRL_SWDPIN1)) {
 		ret_val = e1000_poll_fiber_serdes_link_generic(hw);
 	} else {
-		DEBUGOUT("No signal detected\n");
+		DBG("No signal detected\n");
 	}
 
 out:
@@ -1272,7 +1272,7 @@ static s32 e1000_check_for_copper_link_82543(struct e1000_hw *hw)
 	else {
 		ret_val = e1000_config_mac_to_phy_82543(hw);
 		if (ret_val) {
-			DEBUGOUT("Error configuring MAC to PHY settings\n");
+			DBG("Error configuring MAC to PHY settings\n");
 			goto out;
 		}
 	}
@@ -1285,7 +1285,7 @@ static s32 e1000_check_for_copper_link_82543(struct e1000_hw *hw)
 	 */
 	ret_val = e1000_config_fc_after_link_up_generic(hw);
 	if (ret_val) {
-		DEBUGOUT("Error configuring flow control\n");
+		DBG("Error configuring flow control\n");
 	}
 
 	/*
@@ -1299,7 +1299,7 @@ static s32 e1000_check_for_copper_link_82543(struct e1000_hw *hw)
 	if (e1000_tbi_compatibility_enabled_82543(hw)) {
 		ret_val = mac->ops.get_link_up_info(hw, &speed, &duplex);
 		if (ret_val) {
-			DEBUGOUT("Error getting link speed and duplex\n");
+			DBG("Error getting link speed and duplex\n");
 			return ret_val;
 		}
 		if (speed != SPEED_1000) {
@@ -1373,7 +1373,7 @@ static s32 e1000_check_for_fiber_link_82543(struct e1000_hw *hw)
 			ret_val = 0;
 			goto out;
 		}
-		DEBUGOUT("NOT RXing /C/, disable AutoNeg and force link.\n");
+		DBG("NOT RXing /C/, disable AutoNeg and force link.\n");
 
 		/* Disable auto-negotiation in the TXCW register */
 		E1000_WRITE_REG(hw, E1000_TXCW, (mac->txcw & ~E1000_TXCW_ANE));
@@ -1386,7 +1386,7 @@ static s32 e1000_check_for_fiber_link_82543(struct e1000_hw *hw)
 		/* Configure Flow Control after forcing link up. */
 		ret_val = e1000_config_fc_after_link_up_generic(hw);
 		if (ret_val) {
-			DEBUGOUT("Error configuring flow control\n");
+			DBG("Error configuring flow control\n");
 			goto out;
 		}
 	} else if ((ctrl & E1000_CTRL_SLU) && (rxcw & E1000_RXCW_C)) {
@@ -1396,7 +1396,7 @@ static s32 e1000_check_for_fiber_link_82543(struct e1000_hw *hw)
 		 * and disable forced link in the Device Control register
 		 * in an attempt to auto-negotiate with our link partner.
 		 */
-		DEBUGOUT("RXing /C/, enable AutoNeg and stop forcing link.\n");
+		DBG("RXing /C/, enable AutoNeg and stop forcing link.\n");
 		E1000_WRITE_REG(hw, E1000_TXCW, mac->txcw);
 		E1000_WRITE_REG(hw, E1000_CTRL, (ctrl & ~E1000_CTRL_SLU));
 
diff --git a/src/drivers/net/e1000/e1000_api.c b/src/drivers/net/e1000/e1000_api.c
index 72aac4c4..d887aded 100644
--- a/src/drivers/net/e1000/e1000_api.c
+++ b/src/drivers/net/e1000/e1000_api.c
@@ -44,11 +44,11 @@ s32 e1000_init_mac_params(struct e1000_hw *hw)
 	if (hw->mac.ops.init_params) {
 		ret_val = hw->mac.ops.init_params(hw);
 		if (ret_val) {
-			DEBUGOUT("MAC Initialization Error\n");
+			DBG("MAC Initialization Error\n");
 			goto out;
 		}
 	} else {
-		DEBUGOUT("mac.init_mac_params was NULL\n");
+		DBG("mac.init_mac_params was NULL\n");
 		ret_val = -E1000_ERR_CONFIG;
 	}
 
@@ -70,11 +70,11 @@ s32 e1000_init_nvm_params(struct e1000_hw *hw)
 	if (hw->nvm.ops.init_params) {
 		ret_val = hw->nvm.ops.init_params(hw);
 		if (ret_val) {
-			DEBUGOUT("NVM Initialization Error\n");
+			DBG("NVM Initialization Error\n");
 			goto out;
 		}
 	} else {
-		DEBUGOUT("nvm.init_nvm_params was NULL\n");
+		DBG("nvm.init_nvm_params was NULL\n");
 		ret_val = -E1000_ERR_CONFIG;
 	}
 
@@ -96,11 +96,11 @@ s32 e1000_init_phy_params(struct e1000_hw *hw)
 	if (hw->phy.ops.init_params) {
 		ret_val = hw->phy.ops.init_params(hw);
 		if (ret_val) {
-			DEBUGOUT("PHY Initialization Error\n");
+			DBG("PHY Initialization Error\n");
 			goto out;
 		}
 	} else {
-		DEBUGOUT("phy.init_phy_params was NULL\n");
+		DBG("phy.init_phy_params was NULL\n");
 		ret_val =  -E1000_ERR_CONFIG;
 	}
 
@@ -213,12 +213,12 @@ s32 e1000_setup_init_funcs(struct e1000_hw *hw, bool init_device)
 	/* Can't do much good without knowing the MAC type. */
 	ret_val = e1000_set_mac_type(hw);
 	if (ret_val) {
-		DEBUGOUT("ERROR: MAC type could not be set properly.\n");
+		DBG("ERROR: MAC type could not be set properly.\n");
 		goto out;
 	}
 
 	if (!hw->hw_addr) {
-		DEBUGOUT("ERROR: Registers not mapped\n");
+		DBG("ERROR: Registers not mapped\n");
 		ret_val = -E1000_ERR_CONFIG;
 		goto out;
 	}
@@ -258,7 +258,7 @@ s32 e1000_setup_init_funcs(struct e1000_hw *hw, bool init_device)
 		e1000_init_function_pointers_82541(hw);
 		break;
 	default:
-		DEBUGOUT("Hardware not supported\n");
+		DBG("Hardware not supported\n");
 		ret_val = -E1000_ERR_CONFIG;
 		break;
 	}
diff --git a/src/drivers/net/e1000/e1000_defines.h b/src/drivers/net/e1000/e1000_defines.h
index c585f09b..06e4c86c 100644
--- a/src/drivers/net/e1000/e1000_defines.h
+++ b/src/drivers/net/e1000/e1000_defines.h
@@ -1190,10 +1190,6 @@ FILE_LICENCE ( GPL2_OR_LATER );
 #define PCIE_LINK_WIDTH_SHIFT        4
 #define PCIE_DEVICE_CONTROL2_16ms    0x0005
 
-#ifndef ETH_ADDR_LEN
-#define ETH_ADDR_LEN                 6
-#endif
-
 #define PHY_REVISION_MASK      0xFFFFFFF0
 #define MAX_PHY_REG_ADDRESS    0x1F  /* 5 bit address bus (0-0x1F) */
 #define MAX_PHY_MULTI_PAGE_REG 0xF
diff --git a/src/drivers/net/e1000/e1000_mac.c b/src/drivers/net/e1000/e1000_mac.c
index 23513879..ce2fe756 100644
--- a/src/drivers/net/e1000/e1000_mac.c
+++ b/src/drivers/net/e1000/e1000_mac.c
@@ -366,17 +366,17 @@ void e1000_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value)
 void e1000_init_rx_addrs_generic(struct e1000_hw *hw, u16 rar_count)
 {
 	u32 i;
-	u8 mac_addr[ETH_ADDR_LEN] = {0};
+	u8 mac_addr[ETH_ALEN] = {0};
 
 	DEBUGFUNC("e1000_init_rx_addrs_generic");
 
 	/* Setup the receive address */
-	DEBUGOUT("Programming MAC Address into RAR[0]\n");
+	DBG("Programming MAC Address into RAR[0]\n");
 
 	hw->mac.ops.rar_set(hw, hw->mac.addr, 0);
 
 	/* Zero out the other (rar_entry_count - 1) receive addresses */
-	DEBUGOUT1("Clearing RAR[1-%u]\n", rar_count-1);
+	DBG("Clearing RAR[1-%u]\n", rar_count-1);
 	for (i = 1; i < rar_count; i++)
 		hw->mac.ops.rar_set(hw, mac_addr, i);
 }
@@ -398,14 +398,14 @@ s32 e1000_check_alt_mac_addr_generic(struct e1000_hw *hw)
 	u32 i;
 	s32 ret_val = E1000_SUCCESS;
 	u16 offset, nvm_alt_mac_addr_offset, nvm_data;
-	u8 alt_mac_addr[ETH_ADDR_LEN];
+	u8 alt_mac_addr[ETH_ALEN];
 
 	DEBUGFUNC("e1000_check_alt_mac_addr_generic");
 
 	ret_val = hw->nvm.ops.read(hw, NVM_ALT_MAC_ADDR_PTR, 1,
 	                         &nvm_alt_mac_addr_offset);
 	if (ret_val) {
-		DEBUGOUT("NVM Read Error\n");
+		DBG("NVM Read Error\n");
 		goto out;
 	}
 
@@ -416,11 +416,11 @@ s32 e1000_check_alt_mac_addr_generic(struct e1000_hw *hw)
 
 	if (hw->bus.func == E1000_FUNC_1)
 		nvm_alt_mac_addr_offset += E1000_ALT_MAC_ADDRESS_OFFSET_LAN1;
-	for (i = 0; i < ETH_ADDR_LEN; i += 2) {
+	for (i = 0; i < ETH_ALEN; i += 2) {
 		offset = nvm_alt_mac_addr_offset + (i >> 1);
 		ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data);
 		if (ret_val) {
-			DEBUGOUT("NVM Read Error\n");
+			DBG("NVM Read Error\n");
 			goto out;
 		}
 
@@ -430,7 +430,7 @@ s32 e1000_check_alt_mac_addr_generic(struct e1000_hw *hw)
 
 	/* if multicast bit is set, the alternate address will not be used */
 	if (alt_mac_addr[0] & 0x01) {
-		DEBUGOUT("Ignoring Alternate Mac Address with MC bit set\n");
+		DBG("Ignoring Alternate Mac Address with MC bit set\n");
 		goto out;
 	}
 
@@ -549,7 +549,7 @@ void e1000_update_mc_addr_list_generic(struct e1000_hw *hw,
 		hash_bit = hash_value & 0x1F;
 
 		hw->mac.mta_shadow[hash_reg] |= (1 << hash_bit);
-		mc_addr_list += (ETH_ADDR_LEN);
+		mc_addr_list += (ETH_ALEN);
 	}
 
 	/* replace the entire MTA table */
@@ -790,7 +790,7 @@ s32 e1000_check_for_copper_link_generic(struct e1000_hw *hw)
 	 */
 	ret_val = e1000_config_fc_after_link_up_generic(hw);
 	if (ret_val)
-		DEBUGOUT("Error configuring flow control\n");
+		DBG("Error configuring flow control\n");
 
 out:
 	return ret_val;
@@ -832,7 +832,7 @@ s32 e1000_check_for_fiber_link_generic(struct e1000_hw *hw)
 			mac->autoneg_failed = 1;
 			goto out;
 		}
-		DEBUGOUT("NOT RXing /C/, disable AutoNeg and force link.\n");
+		DBG("NOT RXing /C/, disable AutoNeg and force link.\n");
 
 		/* Disable auto-negotiation in the TXCW register */
 		E1000_WRITE_REG(hw, E1000_TXCW, (mac->txcw & ~E1000_TXCW_ANE));
@@ -845,7 +845,7 @@ s32 e1000_check_for_fiber_link_generic(struct e1000_hw *hw)
 		/* Configure Flow Control after forcing link up. */
 		ret_val = e1000_config_fc_after_link_up_generic(hw);
 		if (ret_val) {
-			DEBUGOUT("Error configuring flow control\n");
+			DBG("Error configuring flow control\n");
 			goto out;
 		}
 	} else if ((ctrl & E1000_CTRL_SLU) && (rxcw & E1000_RXCW_C)) {
@@ -855,7 +855,7 @@ s32 e1000_check_for_fiber_link_generic(struct e1000_hw *hw)
 		 * and disable forced link in the Device Control register
 		 * in an attempt to auto-negotiate with our link partner.
 		 */
-		DEBUGOUT("RXing /C/, enable AutoNeg and stop forcing link.\n");
+		DBG("RXing /C/, enable AutoNeg and stop forcing link.\n");
 		E1000_WRITE_REG(hw, E1000_TXCW, mac->txcw);
 		E1000_WRITE_REG(hw, E1000_CTRL, (ctrl & ~E1000_CTRL_SLU));
 
@@ -900,7 +900,7 @@ s32 e1000_check_for_serdes_link_generic(struct e1000_hw *hw)
 			mac->autoneg_failed = 1;
 			goto out;
 		}
-		DEBUGOUT("NOT RXing /C/, disable AutoNeg and force link.\n");
+		DBG("NOT RXing /C/, disable AutoNeg and force link.\n");
 
 		/* Disable auto-negotiation in the TXCW register */
 		E1000_WRITE_REG(hw, E1000_TXCW, (mac->txcw & ~E1000_TXCW_ANE));
@@ -913,7 +913,7 @@ s32 e1000_check_for_serdes_link_generic(struct e1000_hw *hw)
 		/* Configure Flow Control after forcing link up. */
 		ret_val = e1000_config_fc_after_link_up_generic(hw);
 		if (ret_val) {
-			DEBUGOUT("Error configuring flow control\n");
+			DBG("Error configuring flow control\n");
 			goto out;
 		}
 	} else if ((ctrl & E1000_CTRL_SLU) && (rxcw & E1000_RXCW_C)) {
@@ -923,7 +923,7 @@ s32 e1000_check_for_serdes_link_generic(struct e1000_hw *hw)
 		 * and disable forced link in the Device Control register
 		 * in an attempt to auto-negotiate with our link partner.
 		 */
-		DEBUGOUT("RXing /C/, enable AutoNeg and stop forcing link.\n");
+		DBG("RXing /C/, enable AutoNeg and stop forcing link.\n");
 		E1000_WRITE_REG(hw, E1000_TXCW, mac->txcw);
 		E1000_WRITE_REG(hw, E1000_CTRL, (ctrl & ~E1000_CTRL_SLU));
 
@@ -935,16 +935,16 @@ s32 e1000_check_for_serdes_link_generic(struct e1000_hw *hw)
 		 * serdes media type.
 		 */
 		/* SYNCH bit and IV bit are sticky. */
-		usec_delay(10);
+		udelay(10);
 		rxcw = E1000_READ_REG(hw, E1000_RXCW);
 		if (rxcw & E1000_RXCW_SYNCH) {
 			if (!(rxcw & E1000_RXCW_IV)) {
 				mac->serdes_has_link = true;
-				DEBUGOUT("SERDES: Link up - forced.\n");
+				DBG("SERDES: Link up - forced.\n");
 			}
 		} else {
 			mac->serdes_has_link = false;
-			DEBUGOUT("SERDES: Link down - force failed.\n");
+			DBG("SERDES: Link down - force failed.\n");
 		}
 	}
 
@@ -952,25 +952,25 @@ s32 e1000_check_for_serdes_link_generic(struct e1000_hw *hw)
 		status = E1000_READ_REG(hw, E1000_STATUS);
 		if (status & E1000_STATUS_LU) {
 			/* SYNCH bit and IV bit are sticky, so reread rxcw. */
-			usec_delay(10);
+			udelay(10);
 			rxcw = E1000_READ_REG(hw, E1000_RXCW);
 			if (rxcw & E1000_RXCW_SYNCH) {
 				if (!(rxcw & E1000_RXCW_IV)) {
 					mac->serdes_has_link = true;
-					DEBUGOUT("SERDES: Link up - autoneg "
+					DBG("SERDES: Link up - autoneg "
 					   "completed sucessfully.\n");
 				} else {
 					mac->serdes_has_link = false;
-					DEBUGOUT("SERDES: Link down - invalid"
+					DBG("SERDES: Link down - invalid"
 					   "codewords detected in autoneg.\n");
 				}
 			} else {
 				mac->serdes_has_link = false;
-				DEBUGOUT("SERDES: Link down - no sync.\n");
+				DBG("SERDES: Link down - no sync.\n");
 			}
 		} else {
 			mac->serdes_has_link = false;
-			DEBUGOUT("SERDES: Link down - autoneg failed\n");
+			DBG("SERDES: Link down - autoneg failed\n");
 		}
 	}
 
@@ -1018,7 +1018,7 @@ s32 e1000_setup_link_generic(struct e1000_hw *hw)
 	 */
 	hw->fc.current_mode = hw->fc.requested_mode;
 
-	DEBUGOUT1("After fix-ups FlowControl is now = %x\n",
+	DBG("After fix-ups FlowControl is now = %x\n",
 		hw->fc.current_mode);
 
 	/* Call the necessary media_type subroutine to configure the link. */
@@ -1032,7 +1032,7 @@ s32 e1000_setup_link_generic(struct e1000_hw *hw)
 	 * control is disabled, because it does not hurt anything to
 	 * initialize these registers.
 	 */
-	DEBUGOUT("Initializing the Flow Control address, type and timer regs\n");
+	DBG("Initializing the Flow Control address, type and timer regs\n");
 	E1000_WRITE_REG(hw, E1000_FCT, FLOW_CONTROL_TYPE);
 	E1000_WRITE_REG(hw, E1000_FCAH, FLOW_CONTROL_ADDRESS_HIGH);
 	E1000_WRITE_REG(hw, E1000_FCAL, FLOW_CONTROL_ADDRESS_LOW);
@@ -1077,11 +1077,11 @@ s32 e1000_setup_fiber_serdes_link_generic(struct e1000_hw *hw)
 	 * then the link-up status bit will be set and the flow control enable
 	 * bits (RFCE and TFCE) will be set according to their negotiated value.
 	 */
-	DEBUGOUT("Auto-negotiation enabled\n");
+	DBG("Auto-negotiation enabled\n");
 
 	E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
 	E1000_WRITE_FLUSH(hw);
-	msec_delay(1);
+	mdelay(1);
 
 	/*
 	 * For these adapters, the SW definable pin 1 is set when the optics
@@ -1092,7 +1092,7 @@ s32 e1000_setup_fiber_serdes_link_generic(struct e1000_hw *hw)
 	    (E1000_READ_REG(hw, E1000_CTRL) & E1000_CTRL_SWDPIN1)) {
 		ret_val = e1000_poll_fiber_serdes_link_generic(hw);
 	} else {
-		DEBUGOUT("No signal detected\n");
+		DBG("No signal detected\n");
 	}
 
 out:
@@ -1145,13 +1145,13 @@ s32 e1000_poll_fiber_serdes_link_generic(struct e1000_hw *hw)
 	 * milliseconds even if the other end is doing it in SW).
 	 */
 	for (i = 0; i < FIBER_LINK_UP_LIMIT; i++) {
-		msec_delay(10);
+		mdelay(10);
 		status = E1000_READ_REG(hw, E1000_STATUS);
 		if (status & E1000_STATUS_LU)
 			break;
 	}
 	if (i == FIBER_LINK_UP_LIMIT) {
-		DEBUGOUT("Never got a valid link from auto-neg!!!\n");
+		DBG("Never got a valid link from auto-neg!!!\n");
 		mac->autoneg_failed = 1;
 		/*
 		 * AutoNeg failed to achieve a link, so we'll call
@@ -1161,13 +1161,13 @@ s32 e1000_poll_fiber_serdes_link_generic(struct e1000_hw *hw)
 		 */
 		ret_val = hw->mac.ops.check_for_link(hw);
 		if (ret_val) {
-			DEBUGOUT("Error while checking for link\n");
+			DBG("Error while checking for link\n");
 			goto out;
 		}
 		mac->autoneg_failed = 0;
 	} else {
 		mac->autoneg_failed = 0;
-		DEBUGOUT("Valid Link Found\n");
+		DBG("Valid Link Found\n");
 	}
 
 out:
@@ -1237,7 +1237,7 @@ s32 e1000_commit_fc_settings_generic(struct e1000_hw *hw)
 		txcw = (E1000_TXCW_ANE | E1000_TXCW_FD | E1000_TXCW_PAUSE_MASK);
 		break;
 	default:
-		DEBUGOUT("Flow control param set incorrectly\n");
+		DBG("Flow control param set incorrectly\n");
 		ret_val = -E1000_ERR_CONFIG;
 		goto out;
 		break;
@@ -1316,7 +1316,7 @@ s32 e1000_set_default_fc_generic(struct e1000_hw *hw)
 	ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL2_REG, 1, &nvm_data);
 
 	if (ret_val) {
-		DEBUGOUT("NVM Read Error\n");
+		DBG("NVM Read Error\n");
 		goto out;
 	}
 
@@ -1369,7 +1369,7 @@ s32 e1000_force_mac_fc_generic(struct e1000_hw *hw)
 	 *      3:  Both Rx and Tx flow control (symmetric) is enabled.
 	 *  other:  No other values should be possible at this point.
 	 */
-	DEBUGOUT1("hw->fc.current_mode = %u\n", hw->fc.current_mode);
+	DBG("hw->fc.current_mode = %u\n", hw->fc.current_mode);
 
 	switch (hw->fc.current_mode) {
 	case e1000_fc_none:
@@ -1387,7 +1387,7 @@ s32 e1000_force_mac_fc_generic(struct e1000_hw *hw)
 		ctrl |= (E1000_CTRL_TFCE | E1000_CTRL_RFCE);
 		break;
 	default:
-		DEBUGOUT("Flow control param set incorrectly\n");
+		DBG("Flow control param set incorrectly\n");
 		ret_val = -E1000_ERR_CONFIG;
 		goto out;
 	}
@@ -1432,7 +1432,7 @@ s32 e1000_config_fc_after_link_up_generic(struct e1000_hw *hw)
 	}
 
 	if (ret_val) {
-		DEBUGOUT("Error forcing flow control settings\n");
+		DBG("Error forcing flow control settings\n");
 		goto out;
 	}
 
@@ -1456,7 +1456,7 @@ s32 e1000_config_fc_after_link_up_generic(struct e1000_hw *hw)
 			goto out;
 
 		if (!(mii_status_reg & MII_SR_AUTONEG_COMPLETE)) {
-			DEBUGOUT("Copper PHY and Auto Neg "
+			DBG("Copper PHY and Auto Neg "
 			         "has not completed.\n");
 			goto out;
 		}
@@ -1522,10 +1522,10 @@ s32 e1000_config_fc_after_link_up_generic(struct e1000_hw *hw)
 			 */
 			if (hw->fc.requested_mode == e1000_fc_full) {
 				hw->fc.current_mode = e1000_fc_full;
-				DEBUGOUT("Flow Control = FULL.\r\n");
+				DBG("Flow Control = FULL.\r\n");
 			} else {
 				hw->fc.current_mode = e1000_fc_rx_pause;
-				DEBUGOUT("Flow Control = "
+				DBG("Flow Control = "
 				         "RX PAUSE frames only.\r\n");
 			}
 		}
@@ -1542,7 +1542,7 @@ s32 e1000_config_fc_after_link_up_generic(struct e1000_hw *hw)
 		          (mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) &&
 		          (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) {
 			hw->fc.current_mode = e1000_fc_tx_pause;
-			DEBUGOUT("Flow Control = TX PAUSE frames only.\r\n");
+			DBG("Flow Control = TX PAUSE frames only.\r\n");
 		}
 		/*
 		 * For transmitting PAUSE frames ONLY.
@@ -1557,14 +1557,14 @@ s32 e1000_config_fc_after_link_up_generic(struct e1000_hw *hw)
 		         !(mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) &&
 		         (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) {
 			hw->fc.current_mode = e1000_fc_rx_pause;
-			DEBUGOUT("Flow Control = RX PAUSE frames only.\r\n");
+			DBG("Flow Control = RX PAUSE frames only.\r\n");
 		} else {
 			/*
 			 * Per the IEEE spec, at this point flow control
 			 * should be disabled.
 			 */
 			hw->fc.current_mode = e1000_fc_none;
-			DEBUGOUT("Flow Control = NONE.\r\n");
+			DBG("Flow Control = NONE.\r\n");
 		}
 
 		/*
@@ -1574,7 +1574,7 @@ s32 e1000_config_fc_after_link_up_generic(struct e1000_hw *hw)
 		 */
 		ret_val = mac->ops.get_link_up_info(hw, &speed, &duplex);
 		if (ret_val) {
-			DEBUGOUT("Error getting link speed and duplex\n");
+			DBG("Error getting link speed and duplex\n");
 			goto out;
 		}
 
@@ -1587,7 +1587,7 @@ s32 e1000_config_fc_after_link_up_generic(struct e1000_hw *hw)
 		 */
 		ret_val = e1000_force_mac_fc_generic(hw);
 		if (ret_val) {
-			DEBUGOUT("Error forcing flow control settings\n");
+			DBG("Error forcing flow control settings\n");
 			goto out;
 		}
 	}
@@ -1615,21 +1615,21 @@ s32 e1000_get_speed_and_duplex_copper_generic(struct e1000_hw *hw, u16 *speed,
 	status = E1000_READ_REG(hw, E1000_STATUS);
 	if (status & E1000_STATUS_SPEED_1000) {
 		*speed = SPEED_1000;
-		DEBUGOUT("1000 Mbs, ");
+		DBG("1000 Mbs, ");
 	} else if (status & E1000_STATUS_SPEED_100) {
 		*speed = SPEED_100;
-		DEBUGOUT("100 Mbs, ");
+		DBG("100 Mbs, ");
 	} else {
 		*speed = SPEED_10;
-		DEBUGOUT("10 Mbs, ");
+		DBG("10 Mbs, ");
 	}
 
 	if (status & E1000_STATUS_FD) {
 		*duplex = FULL_DUPLEX;
-		DEBUGOUT("Full Duplex\n");
+		DBG("Full Duplex\n");
 	} else {
 		*duplex = HALF_DUPLEX;
-		DEBUGOUT("Half Duplex\n");
+		DBG("Half Duplex\n");
 	}
 
 	return E1000_SUCCESS;
@@ -1677,12 +1677,12 @@ s32 e1000_get_hw_semaphore_generic(struct e1000_hw *hw __unused)
 		if (!(swsm & E1000_SWSM_SMBI))
 			break;
 
-		usec_delay(50);
+		udelay(50);
 		i++;
 	}
 
 	if (i == timeout) {
-		DEBUGOUT("Driver can't access device - SMBI bit is set.\n");
+		DBG("Driver can't access device - SMBI bit is set.\n");
 		ret_val = -E1000_ERR_NVM;
 		goto out;
 	}
@@ -1696,13 +1696,13 @@ s32 e1000_get_hw_semaphore_generic(struct e1000_hw *hw __unused)
 		if (E1000_READ_REG(hw, E1000_SWSM) & E1000_SWSM_SWESMBI)
 			break;
 
-		usec_delay(50);
+		udelay(50);
 	}
 
 	if (i == timeout) {
 		/* Release semaphores */
 		e1000_put_hw_semaphore_generic(hw);
-		DEBUGOUT("Driver can't access the NVM\n");
+		DBG("Driver can't access the NVM\n");
 		ret_val = -E1000_ERR_NVM;
 		goto out;
 	}
@@ -1750,12 +1750,12 @@ s32 e1000_get_auto_rd_done_generic(struct e1000_hw *hw)
 	while (i < AUTO_READ_DONE_TIMEOUT) {
 		if (E1000_READ_REG(hw, E1000_EECD) & E1000_EECD_AUTO_RD)
 			break;
-		msec_delay(1);
+		mdelay(1);
 		i++;
 	}
 
 	if (i == AUTO_READ_DONE_TIMEOUT) {
-		DEBUGOUT("Auto read by HW from NVM has not completed.\n");
+		DBG("Auto read by HW from NVM has not completed.\n");
 		ret_val = -E1000_ERR_RESET;
 		goto out;
 	}
@@ -1780,7 +1780,7 @@ s32 e1000_valid_led_default_generic(struct e1000_hw *hw, u16 *data)
 
 	ret_val = hw->nvm.ops.read(hw, NVM_ID_LED_SETTINGS, 1, data);
 	if (ret_val) {
-		DEBUGOUT("NVM Read Error\n");
+		DBG("NVM Read Error\n");
 		goto out;
 	}
 
@@ -2086,12 +2086,12 @@ s32 e1000_disable_pcie_master_generic(struct e1000_hw *hw)
 		if (!(E1000_READ_REG(hw, E1000_STATUS) &
 		      E1000_STATUS_GIO_MASTER_ENABLE))
 			break;
-		usec_delay(100);
+		udelay(100);
 		timeout--;
 	}
 
 	if (!timeout) {
-		DEBUGOUT("Master requests are pending.\n");
+		DBG("Master requests are pending.\n");
 		ret_val = -E1000_ERR_MASTER_REQUESTS_PENDING;
 		goto out;
 	}
@@ -2113,7 +2113,7 @@ void e1000_reset_adaptive_generic(struct e1000_hw *hw)
 	DEBUGFUNC("e1000_reset_adaptive_generic");
 
 	if (!mac->adaptive_ifs) {
-		DEBUGOUT("Not in Adaptive IFS mode!\n");
+		DBG("Not in Adaptive IFS mode!\n");
 		goto out;
 	}
 
@@ -2143,7 +2143,7 @@ void e1000_update_adaptive_generic(struct e1000_hw *hw)
 	DEBUGFUNC("e1000_update_adaptive_generic");
 
 	if (!mac->adaptive_ifs) {
-		DEBUGOUT("Not in Adaptive IFS mode!\n");
+		DBG("Not in Adaptive IFS mode!\n");
 		goto out;
 	}
 
@@ -2185,7 +2185,7 @@ static s32 e1000_validate_mdi_setting_generic(struct e1000_hw *hw)
 	DEBUGFUNC("e1000_validate_mdi_setting_generic");
 
 	if (!hw->mac.autoneg && (hw->phy.mdix == 0 || hw->phy.mdix == 3)) {
-		DEBUGOUT("Invalid MDI setting detected\n");
+		DBG("Invalid MDI setting detected\n");
 		hw->phy.mdix = 1;
 		ret_val = -E1000_ERR_CONFIG;
 		goto out;
diff --git a/src/drivers/net/e1000/e1000_main.c b/src/drivers/net/e1000/e1000_main.c
index bc2aa968..d8f9fb8d 100644
--- a/src/drivers/net/e1000/e1000_main.c
+++ b/src/drivers/net/e1000/e1000_main.c
@@ -330,7 +330,7 @@ static int e1000_refill_rx_ring ( struct e1000_adapter *adapter )
 		if ( adapter->rx_iobuf[rx_curr] != NULL )
 			continue;
 
-		DBG2 ( "Refilling rx desc %d\n", rx_curr );
+		DBG ( "Refilling rx desc %d\n", rx_curr );
 
 		iob = alloc_iob ( MAXIMUM_ETHERNET_VLAN_SIZE );
 		adapter->rx_iobuf[rx_curr] = iob;
@@ -452,7 +452,7 @@ static void e1000_process_rx_packets ( struct net_device *netdev )
 			          ( i * sizeof ( *adapter->rx_base ) );
 		rx_status = rx_curr_desc->status;
 
-		DBG2 ( "Before DD Check RX_status: %#08x\n", rx_status );
+		DBG ( "Before DD Check RX_status: %#08x\n", rx_status );
 
 		if ( ! ( rx_status & E1000_RXD_STAT_DD ) )
 			break;
diff --git a/src/drivers/net/e1000/e1000_manage.c b/src/drivers/net/e1000/e1000_manage.c
index 3362942e..0432d1b1 100644
--- a/src/drivers/net/e1000/e1000_manage.c
+++ b/src/drivers/net/e1000/e1000_manage.c
@@ -79,7 +79,7 @@ s32 e1000_mng_enable_host_if_generic(struct e1000_hw *hw)
 	/* Check that the host interface is enabled. */
 	hicr = E1000_READ_REG(hw, E1000_HICR);
 	if ((hicr & E1000_HICR_EN) == 0) {
-		DEBUGOUT("E1000_HOST_EN bit disabled.\n");
+		DBG("E1000_HOST_EN bit disabled.\n");
 		ret_val = -E1000_ERR_HOST_INTERFACE_COMMAND;
 		goto out;
 	}
@@ -88,11 +88,11 @@ s32 e1000_mng_enable_host_if_generic(struct e1000_hw *hw)
 		hicr = E1000_READ_REG(hw, E1000_HICR);
 		if (!(hicr & E1000_HICR_C))
 			break;
-		msec_delay_irq(1);
+		mdelay(1);
 	}
 
 	if (i == E1000_MNG_DHCP_COMMAND_TIMEOUT) {
-		DEBUGOUT("Previous command timeout failed .\n");
+		DBG("Previous command timeout failed .\n");
 		ret_val = -E1000_ERR_HOST_INTERFACE_COMMAND;
 		goto out;
 	}
diff --git a/src/drivers/net/e1000/e1000_nvm.c b/src/drivers/net/e1000/e1000_nvm.c
index 488252f4..59a5ead2 100644
--- a/src/drivers/net/e1000/e1000_nvm.c
+++ b/src/drivers/net/e1000/e1000_nvm.c
@@ -110,7 +110,7 @@ static void e1000_raise_eec_clk(struct e1000_hw *hw, u32 *eecd)
 	*eecd = *eecd | E1000_EECD_SK;
 	E1000_WRITE_REG(hw, E1000_EECD, *eecd);
 	E1000_WRITE_FLUSH(hw);
-	usec_delay(hw->nvm.delay_usec);
+	udelay(hw->nvm.delay_usec);
 }
 
 /**
@@ -125,7 +125,7 @@ static void e1000_lower_eec_clk(struct e1000_hw *hw, u32 *eecd)
 	*eecd = *eecd & ~E1000_EECD_SK;
 	E1000_WRITE_REG(hw, E1000_EECD, *eecd);
 	E1000_WRITE_FLUSH(hw);
-	usec_delay(hw->nvm.delay_usec);
+	udelay(hw->nvm.delay_usec);
 }
 
 /**
@@ -162,7 +162,7 @@ static void e1000_shift_out_eec_bits(struct e1000_hw *hw, u16 data, u16 count)
 		E1000_WRITE_REG(hw, E1000_EECD, eecd);
 		E1000_WRITE_FLUSH(hw);
 
-		usec_delay(nvm->delay_usec);
+		udelay(nvm->delay_usec);
 
 		e1000_raise_eec_clk(hw, &eecd);
 		e1000_lower_eec_clk(hw, &eecd);
@@ -241,7 +241,7 @@ s32 e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg)
 			break;
 		}
 
-		usec_delay(5);
+		udelay(5);
 	}
 
 	return ret_val;
@@ -269,7 +269,7 @@ s32 e1000_acquire_nvm_generic(struct e1000_hw *hw)
 	while (timeout) {
 		if (eecd & E1000_EECD_GNT)
 			break;
-		usec_delay(5);
+		udelay(5);
 		eecd = E1000_READ_REG(hw, E1000_EECD);
 		timeout--;
 	}
@@ -277,7 +277,7 @@ s32 e1000_acquire_nvm_generic(struct e1000_hw *hw)
 	if (!timeout) {
 		eecd &= ~E1000_EECD_REQ;
 		E1000_WRITE_REG(hw, E1000_EECD, eecd);
-		DEBUGOUT("Could not acquire NVM grant\n");
+		DBG("Could not acquire NVM grant\n");
 		ret_val = -E1000_ERR_NVM;
 	}
 
@@ -301,7 +301,7 @@ static void e1000_standby_nvm(struct e1000_hw *hw)
 		eecd &= ~(E1000_EECD_CS | E1000_EECD_SK);
 		E1000_WRITE_REG(hw, E1000_EECD, eecd);
 		E1000_WRITE_FLUSH(hw);
-		usec_delay(nvm->delay_usec);
+		udelay(nvm->delay_usec);
 
 		e1000_raise_eec_clk(hw, &eecd);
 
@@ -309,7 +309,7 @@ static void e1000_standby_nvm(struct e1000_hw *hw)
 		eecd |= E1000_EECD_CS;
 		E1000_WRITE_REG(hw, E1000_EECD, eecd);
 		E1000_WRITE_FLUSH(hw);
-		usec_delay(nvm->delay_usec);
+		udelay(nvm->delay_usec);
 
 		e1000_lower_eec_clk(hw, &eecd);
 	} else
@@ -318,11 +318,11 @@ static void e1000_standby_nvm(struct e1000_hw *hw)
 		eecd |= E1000_EECD_CS;
 		E1000_WRITE_REG(hw, E1000_EECD, eecd);
 		E1000_WRITE_FLUSH(hw);
-		usec_delay(nvm->delay_usec);
+		udelay(nvm->delay_usec);
 		eecd &= ~E1000_EECD_CS;
 		E1000_WRITE_REG(hw, E1000_EECD, eecd);
 		E1000_WRITE_FLUSH(hw);
-		usec_delay(nvm->delay_usec);
+		udelay(nvm->delay_usec);
 	}
 }
 
@@ -399,7 +399,7 @@ static s32 e1000_ready_nvm_eeprom(struct e1000_hw *hw)
 		/* Clear SK and CS */
 		eecd &= ~(E1000_EECD_CS | E1000_EECD_SK);
 		E1000_WRITE_REG(hw, E1000_EECD, eecd);
-		usec_delay(1);
+		udelay(1);
 		timeout = NVM_MAX_RETRY_SPI;
 
 		/*
@@ -415,13 +415,13 @@ static s32 e1000_ready_nvm_eeprom(struct e1000_hw *hw)
 			if (!(spi_stat_reg & NVM_STATUS_RDY_SPI))
 				break;
 
-			usec_delay(5);
+			udelay(5);
 			e1000_standby_nvm(hw);
 			timeout--;
 		}
 
 		if (!timeout) {
-			DEBUGOUT("SPI NVM Status error\n");
+			DBG("SPI NVM Status error\n");
 			ret_val = -E1000_ERR_NVM;
 			goto out;
 		}
@@ -456,7 +456,7 @@ s32 e1000_read_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
 	 */
 	if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
 	    (words == 0)) {
-		DEBUGOUT("nvm parameter(s) out of bounds\n");
+		DBG("nvm parameter(s) out of bounds\n");
 		ret_val = -E1000_ERR_NVM;
 		goto out;
 	}
@@ -520,7 +520,7 @@ s32 e1000_read_nvm_microwire(struct e1000_hw *hw, u16 offset, u16 words,
 	 */
 	if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
 	    (words == 0)) {
-		DEBUGOUT("nvm parameter(s) out of bounds\n");
+		DBG("nvm parameter(s) out of bounds\n");
 		ret_val = -E1000_ERR_NVM;
 		goto out;
 	}
@@ -577,7 +577,7 @@ s32 e1000_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
 	 */
 	if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
 	    (words == 0)) {
-		DEBUGOUT("nvm parameter(s) out of bounds\n");
+		DBG("nvm parameter(s) out of bounds\n");
 		ret_val = -E1000_ERR_NVM;
 		goto out;
 	}
@@ -625,7 +625,7 @@ s32 e1000_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
 	 */
 	if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
 	    (words == 0)) {
-		DEBUGOUT("nvm parameter(s) out of bounds\n");
+		DBG("nvm parameter(s) out of bounds\n");
 		ret_val = -E1000_ERR_NVM;
 		goto out;
 	}
@@ -675,7 +675,7 @@ s32 e1000_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
 		}
 	}
 
-	msec_delay(10);
+	mdelay(10);
 release:
 	nvm->ops.release(hw);
 
@@ -712,7 +712,7 @@ s32 e1000_write_nvm_microwire(struct e1000_hw *hw, u16 offset, u16 words,
 	 */
 	if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
 	    (words == 0)) {
-		DEBUGOUT("nvm parameter(s) out of bounds\n");
+		DBG("nvm parameter(s) out of bounds\n");
 		ret_val = -E1000_ERR_NVM;
 		goto out;
 	}
@@ -747,11 +747,11 @@ s32 e1000_write_nvm_microwire(struct e1000_hw *hw, u16 offset, u16 words,
 			eecd = E1000_READ_REG(hw, E1000_EECD);
 			if (eecd & E1000_EECD_DO)
 				break;
-			usec_delay(50);
+			udelay(50);
 		}
 
 		if (widx == 200) {
-			DEBUGOUT("NVM Write did not complete\n");
+			DBG("NVM Write did not complete\n");
 			ret_val = -E1000_ERR_NVM;
 			goto release;
 		}
@@ -790,14 +790,14 @@ s32 e1000_read_pba_num_generic(struct e1000_hw *hw, u32 *pba_num)
 
 	ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_0, 1, &nvm_data);
 	if (ret_val) {
-		DEBUGOUT("NVM Read Error\n");
+		DBG("NVM Read Error\n");
 		goto out;
 	}
 	*pba_num = (u32)(nvm_data << 16);
 
 	ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_1, 1, &nvm_data);
 	if (ret_val) {
-		DEBUGOUT("NVM Read Error\n");
+		DBG("NVM Read Error\n");
 		goto out;
 	}
 	*pba_num |= nvm_data;
@@ -829,7 +829,7 @@ s32 e1000_read_mac_addr_generic(struct e1000_hw *hw)
 	for (i = 0; i < E1000_RAH_MAC_ADDR_LEN; i++)
 		hw->mac.perm_addr[i+4] = (u8)(rar_high >> (i*8));
 
-	for (i = 0; i < ETH_ADDR_LEN; i++)
+	for (i = 0; i < ETH_ALEN; i++)
 		hw->mac.addr[i] = hw->mac.perm_addr[i];
 
 	return E1000_SUCCESS;
@@ -853,14 +853,14 @@ s32 e1000_validate_nvm_checksum_generic(struct e1000_hw *hw)
 	for (i = 0; i < (NVM_CHECKSUM_REG + 1); i++) {
 		ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);
 		if (ret_val) {
-			DEBUGOUT("NVM Read Error\n");
+			DBG("NVM Read Error\n");
 			goto out;
 		}
 		checksum += nvm_data;
 	}
 
 	if (checksum != (u16) NVM_SUM) {
-		DEBUGOUT("NVM Checksum Invalid\n");
+		DBG("NVM Checksum Invalid\n");
 		ret_val = -E1000_ERR_NVM;
 		goto out;
 	}
@@ -888,7 +888,7 @@ s32 e1000_update_nvm_checksum_generic(struct e1000_hw *hw)
 	for (i = 0; i < NVM_CHECKSUM_REG; i++) {
 		ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);
 		if (ret_val) {
-			DEBUGOUT("NVM Read Error while updating checksum.\n");
+			DBG("NVM Read Error while updating checksum.\n");
 			goto out;
 		}
 		checksum += nvm_data;
@@ -896,7 +896,7 @@ s32 e1000_update_nvm_checksum_generic(struct e1000_hw *hw)
 	checksum = (u16) NVM_SUM - checksum;
 	ret_val = hw->nvm.ops.write(hw, NVM_CHECKSUM_REG, 1, &checksum);
 	if (ret_val)
-		DEBUGOUT("NVM Write Error while updating checksum.\n");
+		DBG("NVM Write Error while updating checksum.\n");
 
 out:
 	return ret_val;
@@ -915,7 +915,7 @@ static void e1000_reload_nvm_generic(struct e1000_hw *hw)
 
 	DEBUGFUNC("e1000_reload_nvm_generic");
 
-	usec_delay(10);
+	udelay(10);
 	ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
 	ctrl_ext |= E1000_CTRL_EXT_EE_RST;
 	E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
diff --git a/src/drivers/net/e1000/e1000_phy.c b/src/drivers/net/e1000/e1000_phy.c
index b3cad480..db80eb28 100644
--- a/src/drivers/net/e1000/e1000_phy.c
+++ b/src/drivers/net/e1000/e1000_phy.c
@@ -243,18 +243,18 @@ s32 e1000_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data)
 	 * the lower time out
 	 */
 	for (i = 0; i < (E1000_GEN_POLL_TIMEOUT * 3); i++) {
-		usec_delay(50);
+		udelay(50);
 		mdic = E1000_READ_REG(hw, E1000_MDIC);
 		if (mdic & E1000_MDIC_READY)
 			break;
 	}
 	if (!(mdic & E1000_MDIC_READY)) {
-		DEBUGOUT("MDI Read did not complete\n");
+		DBG("MDI Read did not complete\n");
 		ret_val = -E1000_ERR_PHY;
 		goto out;
 	}
 	if (mdic & E1000_MDIC_ERROR) {
-		DEBUGOUT("MDI Error\n");
+		DBG("MDI Error\n");
 		ret_val = -E1000_ERR_PHY;
 		goto out;
 	}
@@ -298,18 +298,18 @@ s32 e1000_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data)
 	 * the lower time out
 	 */
 	for (i = 0; i < (E1000_GEN_POLL_TIMEOUT * 3); i++) {
-		usec_delay(50);
+		udelay(50);
 		mdic = E1000_READ_REG(hw, E1000_MDIC);
 		if (mdic & E1000_MDIC_READY)
 			break;
 	}
 	if (!(mdic & E1000_MDIC_READY)) {
-		DEBUGOUT("MDI Write did not complete\n");
+		DBG("MDI Write did not complete\n");
 		ret_val = -E1000_ERR_PHY;
 		goto out;
 	}
 	if (mdic & E1000_MDIC_ERROR) {
-		DEBUGOUT("MDI Error\n");
+		DBG("MDI Error\n");
 		ret_val = -E1000_ERR_PHY;
 		goto out;
 	}
@@ -492,7 +492,7 @@ s32 e1000_read_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 *data)
 	               E1000_KMRNCTRLSTA_OFFSET) | E1000_KMRNCTRLSTA_REN;
 	E1000_WRITE_REG(hw, E1000_KMRNCTRLSTA, kmrnctrlsta);
 
-	usec_delay(2);
+	udelay(2);
 
 	kmrnctrlsta = E1000_READ_REG(hw, E1000_KMRNCTRLSTA);
 	*data = (u16)kmrnctrlsta;
@@ -531,7 +531,7 @@ s32 e1000_write_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 data)
 	               E1000_KMRNCTRLSTA_OFFSET) | data;
 	E1000_WRITE_REG(hw, E1000_KMRNCTRLSTA, kmrnctrlsta);
 
-	usec_delay(2);
+	udelay(2);
 	hw->phy.ops.release(hw);
 
 out:
@@ -639,7 +639,7 @@ s32 e1000_copper_link_setup_m88(struct e1000_hw *hw)
 	/* Commit the changes. */
 	ret_val = phy->ops.commit(hw);
 	if (ret_val) {
-		DEBUGOUT("Error committing the PHY changes\n");
+		DBG("Error committing the PHY changes\n");
 		goto out;
 	}
 
@@ -669,7 +669,7 @@ s32 e1000_copper_link_setup_igp(struct e1000_hw *hw)
 
 	ret_val = hw->phy.ops.reset(hw);
 	if (ret_val) {
-		DEBUGOUT("Error resetting the PHY.\n");
+		DBG("Error resetting the PHY.\n");
 		goto out;
 	}
 
@@ -677,7 +677,7 @@ s32 e1000_copper_link_setup_igp(struct e1000_hw *hw)
 	 * Wait 100ms for MAC to configure PHY from NVM settings, to avoid
 	 * timeout issues when LFS is enabled.
 	 */
-	msec_delay(100);
+	mdelay(100);
 
 	/*
 	 * The NVM settings will configure LPLU in D3 for
@@ -687,7 +687,7 @@ s32 e1000_copper_link_setup_igp(struct e1000_hw *hw)
 		/* disable lplu d3 during driver init */
 		ret_val = hw->phy.ops.set_d3_lplu_state(hw, false);
 		if (ret_val) {
-			DEBUGOUT("Error Disabling LPLU D3\n");
+			DBG("Error Disabling LPLU D3\n");
 			goto out;
 		}
 	}
@@ -696,7 +696,7 @@ s32 e1000_copper_link_setup_igp(struct e1000_hw *hw)
 	if (hw->phy.ops.set_d0_lplu_state) {
 		ret_val = hw->phy.ops.set_d0_lplu_state(hw, false);
 		if (ret_val) {
-			DEBUGOUT("Error Disabling LPLU D0\n");
+			DBG("Error Disabling LPLU D0\n");
 			goto out;
 		}
 	}
@@ -819,13 +819,13 @@ s32 e1000_copper_link_autoneg(struct e1000_hw *hw)
 	if (phy->autoneg_advertised == 0)
 		phy->autoneg_advertised = phy->autoneg_mask;
 
-	DEBUGOUT("Reconfiguring auto-neg advertisement params\n");
+	DBG("Reconfiguring auto-neg advertisement params\n");
 	ret_val = e1000_phy_setup_autoneg(hw);
 	if (ret_val) {
-		DEBUGOUT("Error Setting up Auto-Negotiation\n");
+		DBG("Error Setting up Auto-Negotiation\n");
 		goto out;
 	}
-	DEBUGOUT("Restarting Auto-Neg\n");
+	DBG("Restarting Auto-Neg\n");
 
 	/*
 	 * Restart auto-negotiation by setting the Auto Neg Enable bit and
@@ -847,8 +847,7 @@ s32 e1000_copper_link_autoneg(struct e1000_hw *hw)
 	if (phy->autoneg_wait_to_complete) {
 		ret_val = hw->mac.ops.wait_autoneg(hw);
 		if (ret_val) {
-			DEBUGOUT("Error while waiting for "
-			         "autoneg to complete\n");
+			DBG("Error while waiting for autoneg to complete\n");
 			goto out;
 		}
 	}
@@ -911,39 +910,39 @@ s32 e1000_phy_setup_autoneg(struct e1000_hw *hw)
 	                         NWAY_AR_10T_HD_CAPS);
 	mii_1000t_ctrl_reg &= ~(CR_1000T_HD_CAPS | CR_1000T_FD_CAPS);
 
-	DEBUGOUT1("autoneg_advertised %x\n", phy->autoneg_advertised);
+	DBG("autoneg_advertised %x\n", phy->autoneg_advertised);
 
 	/* Do we want to advertise 10 Mb Half Duplex? */
 	if (phy->autoneg_advertised & ADVERTISE_10_HALF) {
-		DEBUGOUT("Advertise 10mb Half duplex\n");
+		DBG("Advertise 10mb Half duplex\n");
 		mii_autoneg_adv_reg |= NWAY_AR_10T_HD_CAPS;
 	}
 
 	/* Do we want to advertise 10 Mb Full Duplex? */
 	if (phy->autoneg_advertised & ADVERTISE_10_FULL) {
-		DEBUGOUT("Advertise 10mb Full duplex\n");
+		DBG("Advertise 10mb Full duplex\n");
 		mii_autoneg_adv_reg |= NWAY_AR_10T_FD_CAPS;
 	}
 
 	/* Do we want to advertise 100 Mb Half Duplex? */
 	if (phy->autoneg_advertised & ADVERTISE_100_HALF) {
-		DEBUGOUT("Advertise 100mb Half duplex\n");
+		DBG("Advertise 100mb Half duplex\n");
 		mii_autoneg_adv_reg |= NWAY_AR_100TX_HD_CAPS;
 	}
 
 	/* Do we want to advertise 100 Mb Full Duplex? */
 	if (phy->autoneg_advertised & ADVERTISE_100_FULL) {
-		DEBUGOUT("Advertise 100mb Full duplex\n");
+		DBG("Advertise 100mb Full duplex\n");
 		mii_autoneg_adv_reg |= NWAY_AR_100TX_FD_CAPS;
 	}
 
 	/* We do not allow the Phy to advertise 1000 Mb Half Duplex */
 	if (phy->autoneg_advertised & ADVERTISE_1000_HALF)
-		DEBUGOUT("Advertise 1000mb Half duplex request denied!\n");
+		DBG("Advertise 1000mb Half duplex request denied!\n");
 
 	/* Do we want to advertise 1000 Mb Full Duplex? */
 	if (phy->autoneg_advertised & ADVERTISE_1000_FULL) {
-		DEBUGOUT("Advertise 1000mb Full duplex\n");
+		DBG("Advertise 1000mb Full duplex\n");
 		mii_1000t_ctrl_reg |= CR_1000T_FD_CAPS;
 	}
 
@@ -1002,7 +1001,7 @@ s32 e1000_phy_setup_autoneg(struct e1000_hw *hw)
 		mii_autoneg_adv_reg |= (NWAY_AR_ASM_DIR | NWAY_AR_PAUSE);
 		break;
 	default:
-		DEBUGOUT("Flow control param set incorrectly\n");
+		DBG("Flow control param set incorrectly\n");
 		ret_val = -E1000_ERR_CONFIG;
 		goto out;
 	}
@@ -1011,7 +1010,7 @@ s32 e1000_phy_setup_autoneg(struct e1000_hw *hw)
 	if (ret_val)
 		goto out;
 
-	DEBUGOUT1("Auto-Neg Advertising %x\n", mii_autoneg_adv_reg);
+	DBG("Auto-Neg Advertising %x\n", mii_autoneg_adv_reg);
 
 	if (phy->autoneg_mask & ADVERTISE_1000_FULL) {
 		ret_val = phy->ops.write_reg(hw,
@@ -1055,10 +1054,10 @@ s32 e1000_setup_copper_link_generic(struct e1000_hw *hw)
 		 * PHY will be set to 10H, 10F, 100H or 100F
 		 * depending on user settings.
 		 */
-		DEBUGOUT("Forcing Speed and Duplex\n");
+		DBG("Forcing Speed and Duplex\n");
 		ret_val = hw->phy.ops.force_speed_duplex(hw);
 		if (ret_val) {
-			DEBUGOUT("Error Forcing Speed and Duplex\n");
+			DBG("Error Forcing Speed and Duplex\n");
 			goto out;
 		}
 #endif
@@ -1076,11 +1075,11 @@ s32 e1000_setup_copper_link_generic(struct e1000_hw *hw)
 		goto out;
 
 	if (link) {
-		DEBUGOUT("Valid link established!!!\n");
+		DBG("Valid link established!!!\n");
 		e1000_config_collision_dist_generic(hw);
 		ret_val = e1000_config_fc_after_link_up_generic(hw);
 	} else {
-		DEBUGOUT("Unable to establish link!!!\n");
+		DBG("Unable to establish link!!!\n");
 	}
 
 out:
@@ -1130,12 +1129,12 @@ s32 e1000_phy_force_speed_duplex_igp(struct e1000_hw *hw)
 	if (ret_val)
 		goto out;
 
-	DEBUGOUT1("IGP PSCR: %X\n", phy_data);
+	DBG("IGP PSCR: %X\n", phy_data);
 
-	usec_delay(1);
+	udelay(1);
 
 	if (phy->autoneg_wait_to_complete) {
-		DEBUGOUT("Waiting for forced speed/duplex link on IGP phy.\n");
+		DBG("Waiting for forced speed/duplex link on IGP phy.\n");
 
 		ret_val = e1000_phy_has_link_generic(hw,
 		                                     PHY_FORCE_LIMIT,
@@ -1145,7 +1144,7 @@ s32 e1000_phy_force_speed_duplex_igp(struct e1000_hw *hw)
 			goto out;
 
 		if (!link)
-			DEBUGOUT("Link taking longer than expected.\n");
+			DBG("Link taking longer than expected.\n");
 
 		/* Try once more */
 		ret_val = e1000_phy_has_link_generic(hw,
@@ -1192,7 +1191,7 @@ s32 e1000_phy_force_speed_duplex_m88(struct e1000_hw *hw)
 	if (ret_val)
 		goto out;
 
-	DEBUGOUT1("M88E1000 PSCR: %X\n", phy_data);
+	DBG("M88E1000 PSCR: %X\n", phy_data);
 
 	ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_data);
 	if (ret_val)
@@ -1210,7 +1209,7 @@ s32 e1000_phy_force_speed_duplex_m88(struct e1000_hw *hw)
 		goto out;
 
 	if (phy->autoneg_wait_to_complete) {
-		DEBUGOUT("Waiting for forced speed/duplex link on M88 phy.\n");
+		DBG("Waiting for forced speed/duplex link on M88 phy.\n");
 
 		ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_LIMIT,
 		                                     100000, &link);
@@ -1312,12 +1311,12 @@ s32 e1000_phy_force_speed_duplex_ife(struct e1000_hw *hw)
 	if (ret_val)
 		goto out;
 
-	DEBUGOUT1("IFE PMC: %X\n", data);
+	DBG("IFE PMC: %X\n", data);
 
-	usec_delay(1);
+	udelay(1);
 
 	if (phy->autoneg_wait_to_complete) {
-		DEBUGOUT("Waiting for forced speed/duplex link on IFE phy.\n");
+		DBG("Waiting for forced speed/duplex link on IFE phy.\n");
 
 		ret_val = e1000_phy_has_link_generic(hw,
 		                                     PHY_FORCE_LIMIT,
@@ -1327,7 +1326,7 @@ s32 e1000_phy_force_speed_duplex_ife(struct e1000_hw *hw)
 			goto out;
 
 		if (!link)
-			DEBUGOUT("Link taking longer than expected.\n");
+			DBG("Link taking longer than expected.\n");
 
 		/* Try once more */
 		ret_val = e1000_phy_has_link_generic(hw,
@@ -1379,11 +1378,11 @@ void e1000_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl)
 	if (mac->forced_speed_duplex & E1000_ALL_HALF_DUPLEX) {
 		ctrl &= ~E1000_CTRL_FD;
 		*phy_ctrl &= ~MII_CR_FULL_DUPLEX;
-		DEBUGOUT("Half Duplex\n");
+		DBG("Half Duplex\n");
 	} else {
 		ctrl |= E1000_CTRL_FD;
 		*phy_ctrl |= MII_CR_FULL_DUPLEX;
-		DEBUGOUT("Full Duplex\n");
+		DBG("Full Duplex\n");
 	}
 
 	/* Forcing 10mb or 100mb? */
@@ -1391,12 +1390,12 @@ void e1000_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl)
 		ctrl |= E1000_CTRL_SPD_100;
 		*phy_ctrl |= MII_CR_SPEED_100;
 		*phy_ctrl &= ~(MII_CR_SPEED_1000 | MII_CR_SPEED_10);
-		DEBUGOUT("Forcing 100mb\n");
+		DBG("Forcing 100mb\n");
 	} else {
 		ctrl &= ~(E1000_CTRL_SPD_1000 | E1000_CTRL_SPD_100);
 		*phy_ctrl |= MII_CR_SPEED_10;
 		*phy_ctrl &= ~(MII_CR_SPEED_1000 | MII_CR_SPEED_100);
-		DEBUGOUT("Forcing 10mb\n");
+		DBG("Forcing 10mb\n");
 	}
 
 	e1000_config_collision_dist_generic(hw);
@@ -1678,7 +1677,7 @@ s32 e1000_wait_autoneg_generic(struct e1000_hw *hw)
 			break;
 		if (phy_status & MII_SR_AUTONEG_COMPLETE)
 			break;
-		msec_delay(100);
+		mdelay(100);
 	}
 
 	/*
@@ -1721,17 +1720,14 @@ s32 e1000_phy_has_link_generic(struct e1000_hw *hw, u32 iterations,
 			 * ownership of the resources, wait and try again to
 			 * see if they have relinquished the resources yet.
 			 */
-			usec_delay(usec_interval);
+			udelay(usec_interval);
 		}
 		ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status);
 		if (ret_val)
 			break;
 		if (phy_status & MII_SR_LINK_STATUS)
 			break;
-		if (usec_interval >= 1000)
-			msec_delay_irq(usec_interval/1000);
-		else
-			usec_delay(usec_interval);
+		udelay(usec_interval);
 	}
 
 	*success = (i < iterations) ? true : false;
@@ -1878,7 +1874,7 @@ s32 e1000_get_phy_info_m88(struct e1000_hw *hw)
 	DEBUGFUNC("e1000_get_phy_info_m88");
 
 	if (hw->phy.media_type != e1000_media_type_copper) {
-		DEBUGOUT("Phy info is only valid for copper media\n");
+		DBG("Phy info is only valid for copper media\n");
 		ret_val = -E1000_ERR_CONFIG;
 		goto out;
 	}
@@ -1888,7 +1884,7 @@ s32 e1000_get_phy_info_m88(struct e1000_hw *hw)
 		goto out;
 
 	if (!link) {
-		DEBUGOUT("Phy info is only valid if link is up\n");
+		DBG("Phy info is only valid if link is up\n");
 		ret_val = -E1000_ERR_CONFIG;
 		goto out;
 	}
@@ -1963,7 +1959,7 @@ s32 e1000_get_phy_info_igp(struct e1000_hw *hw)
 		goto out;
 
 	if (!link) {
-		DEBUGOUT("Phy info is only valid if link is up\n");
+		DBG("Phy info is only valid if link is up\n");
 		ret_val = -E1000_ERR_CONFIG;
 		goto out;
 	}
@@ -2037,7 +2033,7 @@ s32 e1000_phy_sw_reset_generic(struct e1000_hw *hw)
 	if (ret_val)
 		goto out;
 
-	usec_delay(1);
+	udelay(1);
 
 out:
 	return ret_val;
@@ -2074,12 +2070,12 @@ s32 e1000_phy_hw_reset_generic(struct e1000_hw *hw)
 	E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_PHY_RST);
 	E1000_WRITE_FLUSH(hw);
 
-	usec_delay(phy->reset_delay_us);
+	udelay(phy->reset_delay_us);
 
 	E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
 	E1000_WRITE_FLUSH(hw);
 
-	usec_delay(150);
+	udelay(150);
 
 	phy->ops.release(hw);
 
@@ -2100,7 +2096,7 @@ s32 e1000_get_cfg_done_generic(struct e1000_hw *hw __unused)
 {
 	DEBUGFUNC("e1000_get_cfg_done_generic");
 
-	msec_delay_irq(10);
+	mdelay(10);
 
 	return E1000_SUCCESS;
 }
@@ -2113,7 +2109,7 @@ s32 e1000_get_cfg_done_generic(struct e1000_hw *hw __unused)
  **/
 s32 e1000_phy_init_script_igp3(struct e1000_hw *hw)
 {
-	DEBUGOUT("Running IGP 3 PHY init script\n");
+	DBG("Running IGP 3 PHY init script\n");
 
 	/* PHY init IGP 3 */
 	/* Enable rise/fall, 10-mode work in class-A */
@@ -2261,7 +2257,7 @@ s32 e1000_determine_phy_address(struct e1000_hw *hw)
 				ret_val = E1000_SUCCESS;
 				goto out;
 			}
-			msec_delay(1);
+			mdelay(1);
 			i++;
 		} while (i < 10);
 	}
@@ -2304,5 +2300,5 @@ void e1000_power_down_phy_copper(struct e1000_hw *hw)
 	hw->phy.ops.read_reg(hw, PHY_CONTROL, &mii_reg);
 	mii_reg |= MII_CR_POWER_DOWN;
 	hw->phy.ops.write_reg(hw, PHY_CONTROL, mii_reg);
-	msec_delay(1);
+	mdelay(1);
 }