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Diffstat (limited to 'xhfc')
-rw-r--r--xhfc/base.c5
-rw-r--r--xhfc/xhfc_leb.c15
2 files changed, 18 insertions, 2 deletions
diff --git a/xhfc/base.c b/xhfc/base.c
index e37aef0..0a385ad 100644
--- a/xhfc/base.c
+++ b/xhfc/base.c
@@ -1079,6 +1079,7 @@ static int __devinit xhfc_init_one(struct pci_dev *pdev,
u8 **readchunk_ptrs[XIVO_TDM_TS_NUM] = { 0 };
u8 **writechunk_ptrs[XIVO_TDM_TS_NUM] = { 0 };
#endif
+ u8 __iomem *cs_n2;
pi = g_pi;
@@ -1119,6 +1120,7 @@ static int __devinit xhfc_init_one(struct pci_dev *pdev,
/* we have no LEB CS configured to 32MB, so CS are every 16MB
* see [Intel 320066] 42.4.1.1 Chip Select Address Allocation */
pi->cs_n1 = pi->cs_n0 + 16 * 1024 * 1024;
+ cs_n2 = pi->cs_n0 + 32 * 1024 * 1024;
/* WARNING: don't use cs_n0 / cs_n1 before leb_init() */
@@ -1188,7 +1190,8 @@ static int __devinit xhfc_init_one(struct pci_dev *pdev,
/* TDM started on the XHFC side, XHFC is MASTER */
/* Now it's possible to start the TDM bus on the EP80579 side, as SLAVE: */
if ((rc = xivo_tdm_config_port(pi->tdm_port,
- XHFC_MEGREZ_PROTO_XIVO_CONFIG)) < 0) {
+ XHFC_MEGREZ_PROTO_XIVO_CONFIG,
+ cs_n2)) < 0) {
printk(KERN_ERR "%s %s: xivo_tdm_config_port failed (err=%d)\n",
DRIVER_NAME, __func__, rc);
goto err_tdm_config_port;
diff --git a/xhfc/xhfc_leb.c b/xhfc/xhfc_leb.c
index 42e7b9d..c7e94d7 100644
--- a/xhfc/xhfc_leb.c
+++ b/xhfc/xhfc_leb.c
@@ -128,8 +128,21 @@ void leb_init(struct xhfc_pi *leb)
| LEB_TCS_BYTE_EN,
&regs->timing_cs[1]);
+ writel( LEB_TCS_CS_EN
+ | LEB_TCS_T1_ADDR_TM(3)
+ | LEB_TCS_T2_SU_CS_TM(3)
+ | LEB_TCS_T3_STRB_TM(3)
+ | LEB_TCS_T4_HOLD_TM(3)
+ | LEB_TCS_T5_RCVRY_TM(3)
+ | LEB_TCS_CYC_TYPE_INTEL
+ | LEB_TCS_CNFG_512_B
+ | LEB_TCS_SPLT_EN
+ | LEB_TCS_WR_EN
+ | LEB_TCS_BYTE_EN,
+ &regs->timing_cs[2]);
+
/* We are true paranoiacs: */
- (void)readl(&regs->timing_cs[1]);
+ (void)readl(&regs->timing_cs[2]);
/* That's it! :-) */
}