Start board and architecture specific infrastructure

10 files changed, 175 insertions, 57 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 4a108401..86b6478e 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -3,17 +3,32 @@ menu "Architecture-specific options"
 config ARM
 	def_bool y
 
+config ARMV7
+	bool
+
+config ARMV7A
+	bool
+	select ARMV7
+
+config ARM_ARCH
+	int
+	default 7 if ARMV7
+
+config SUBARCH
+	string
+	default "armv7a" if ARMV7A
+
 choice
 	prompt "Board"
-	default QEMU_VIRT_2_8
+	default BOARD_SELECT_QEMU_VIRT_2_8
 
-config QEMU_VIRT_2_8
+config BOARD_SELECT_QEMU_VIRT_2_8
 	bool "QEMU 2.8 virtual machine"
+	---help---
+	  This virtual board is used by the tools/qemu_arm.sh script.
 
 endchoice
 
-config SUBARCH
-	string
-	default "armv5tej" if X86_32
+source "arch/arm/board-qemu-virt28/Kconfig"
 
 endmenu
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 84214f0a..95a2e503 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -1,7 +1,6 @@
-KCONFIG_DEFCONFIG := qemu_virt_defconfig
+KCONFIG_DEFCONFIG := qemu_virt28_defconfig
 
-XBUILD_CFLAGS += -mcpu=cortex-a15
-XBUILD_CFLAGS += -fdelete-null-pointer-checks
+include arch/arm/board-qemu-virt28/Makefile
 
 x15_SOURCES-y += \
         arch/arm/machine/boot_asm.S \
diff --git a/arch/arm/board-qemu-virt28/Kconfig b/arch/arm/board-qemu-virt28/Kconfig
new file mode 100644
index 00000000..1ecb40b7
--- /dev/null
+++ b/arch/arm/board-qemu-virt28/Kconfig
@@ -0,0 +1,7 @@
+if BOARD_SELECT_QEMU_VIRT_2_8
+
+config BOARD_QEMU_VIRT_2_8
+	def_bool y
+	select ARMV7A
+
+endif
diff --git a/arch/arm/board-qemu-virt28/Makefile b/arch/arm/board-qemu-virt28/Makefile
new file mode 100644
index 00000000..194ee6ee
--- /dev/null
+++ b/arch/arm/board-qemu-virt28/Makefile
@@ -0,0 +1,5 @@
+ifeq ($(CONFIG_BOARD_QEMU_VIRT_2_8),y)
+
+XBUILD_CFLAGS += -mcpu=cortex-a15
+
+endif
diff --git a/arch/arm/configs/qemu_virt_defconfig b/arch/arm/configs/qemu_virt28_defconfig
index e69de29b..e69de29b 100644
--- a/arch/arm/configs/qemu_virt_defconfig
+++ b/arch/arm/configs/qemu_virt28_defconfig
diff --git a/arch/arm/machine/boot.c b/arch/arm/machine/boot.c
index b01dbc62..52882119 100644
--- a/arch/arm/machine/boot.c
+++ b/arch/arm/machine/boot.c
@@ -74,7 +74,9 @@ void __init
 boot_main(void)
 {
     boot_clear_bss();
-    for (;;);
+    kernel_main();
+
+    /* Never reached */
 }
 
 /*
diff --git a/arch/arm/machine/cpu.h b/arch/arm/machine/cpu.h
index d8b4c4d1..13af39c6 100644
--- a/arch/arm/machine/cpu.h
+++ b/arch/arm/machine/cpu.h
@@ -20,6 +20,8 @@
 
 #include <limits.h>
 
+#include <machine/cpu_armv6.h>
+
 /*
  * L1 cache line size.
  *
@@ -47,6 +49,11 @@
 #define CPU_TEXT_SHIFT 4
 #define CPU_TEXT_ALIGN (1 << CPU_TEXT_SHIFT)
 
+/*
+ * PSR flags.
+ */
+#define CPU_PSR_I       0x00000080
+
 #ifndef __ASSEMBLER__
 
 #include <stdbool.h>
@@ -57,48 +64,56 @@
 struct cpu {
 };
 
-static __always_inline void
-cpu_intr_enable(void)
+/*
+ * Return the content of the CPSR register.
+ *
+ * Implies a compiler barrier.
+ */
+static __always_inline unsigned long
+cpu_get_cpsr(void)
 {
-}
+    unsigned long cpsr;
 
-static __always_inline void
-cpu_intr_disable(void)
-{
+    asm volatile("mrs %0, cpsr"
+                 : "=r" (cpsr)
+                 : : "memory");
+
+    return cpsr;
 }
 
+/*
+ * Restore the content of the CPSR register, possibly enabling interrupts.
+ *
+ * Implies a compiler barrier.
+ */
 static __always_inline void
 cpu_intr_restore(unsigned long flags)
 {
-    (void)flags;
+    asm volatile("msr cpsr_c, %0"
+                 : : "r" (flags)
+                 : "memory");
 }
 
+/*
+ * Disable local interrupts, returning the previous content of the CPSR
+ * register.
+ *
+ * Implies a compiler barrier.
+ */
 static __always_inline void
 cpu_intr_save(unsigned long *flags)
 {
-    (void)flags;
+    *flags = cpu_get_cpsr();
+    cpu_intr_disable();
 }
 
 static __always_inline bool
 cpu_intr_enabled(void)
 {
-    return false;
-}
-
-static __always_inline void
-cpu_pause(void)
-{
-}
+    unsigned long cpsr;
 
-static __always_inline void
-cpu_idle(void)
-{
-}
-
-noreturn static __always_inline void
-cpu_halt(void)
-{
-    for (;;);
+    cpsr = cpu_get_cpsr();
+    return cpsr & CPU_PSR_I;
 }
 
 void cpu_halt_broadcast(void);
diff --git a/arch/arm/machine/cpu_armv6.h b/arch/arm/machine/cpu_armv6.h
new file mode 100644
index 00000000..7520f4b1
--- /dev/null
+++ b/arch/arm/machine/cpu_armv6.h
@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2017 Richard Braun.
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _ARM_CPU_ARMV6_H
+#define _ARM_CPU_ARMV6_H
+
+#if CONFIG_ARM_ARCH >= 6
+
+#ifndef __ASSEMBLER__
+
+#include <stdbool.h>
+#include <stdnoreturn.h>
+
+#include <kern/macros.h>
+
+/*
+ * Enable local interrupts.
+ *
+ * Implies a compiler barrier.
+ */
+static __always_inline void
+cpu_intr_enable(void)
+{
+    asm volatile("cpsie i" : : : "memory", "cc");
+}
+
+/*
+ * Disable local interrupts.
+ *
+ * Implies a compiler barrier.
+ */
+static __always_inline void
+cpu_intr_disable(void)
+{
+    asm volatile("cpsid i" : : : "memory", "cc");
+}
+
+static __always_inline void
+cpu_pause(void)
+{
+    for (;;);
+}
+
+/*
+ * Make the CPU idle until the next interrupt.
+ *
+ * Implies a compiler barrier.
+ */
+static __always_inline void
+cpu_idle(void)
+{
+    asm volatile("wfi" : : : "memory");
+}
+
+noreturn static __always_inline void
+cpu_halt(void)
+{
+    cpu_intr_disable();
+
+    for (;;) {
+        cpu_idle();
+    }
+}
+
+#endif /* __ASSEMBLER__ */
+
+#endif /* ARM_ARCH >= 6 */
+
+#endif /* _ARM_CPU_ARMV6_H */
diff --git a/arch/arm/machine/tcb.c b/arch/arm/machine/tcb.c
index 074e5172..dea2a1db 100644
--- a/arch/arm/machine/tcb.c
+++ b/arch/arm/machine/tcb.c
@@ -17,6 +17,7 @@
 
 #include <kern/error.h>
 #include <kern/init.h>
+#include <machine/cpu.h>
 #include <machine/tcb.h>
 
 int
@@ -38,6 +39,7 @@ tcb_cleanup(struct tcb *tcb)
 static int __init
 tcb_setup(void)
 {
+    cpu_halt();
     return 0;
 }
 
diff --git a/tools/qemu_arm.sh b/tools/qemu_arm.sh
index d73e7131..93cada10 100755
--- a/tools/qemu_arm.sh
+++ b/tools/qemu_arm.sh
@@ -1,24 +1,12 @@
 #!/bin/sh
 
-# Amount of physical memory
-# XXX The kernel configuration must use the same value or less.
-RAM=64
-
-# Number of processors. Keep this below the number of physical processors
-# because the kernel doesn't replace spinning with sleeping from within
-# a virtual machine, which causes performance to collapse.
-NR_CPUS=4
+# XXX These parameters are currently hardcoded in the board configuration.
+# XXX The script assumes an x86 host with an arm-none-eabi toolchain.
 
-# QEMU system emulator
 QEMU_EXE=qemu-system-arm
 
-# KVM options
-KVM="-enable-kvm -cpu host"
-KVM=
-
-
-# Don't change from here unless you know what you're doing
-
+NR_CPUS=4
+RAM=64
 
 X15=$PWD/x15
 TMPDIR=$(mktemp -d)
@@ -29,13 +17,15 @@ arm-none-eabi-objcopy -O binary x15 $BIN
 dd if=/dev/zero of=$IMG bs=1M seek=64 count=0
 dd if=$BIN of=$IMG conv=notrunc
 
-$QEMU_EXE $KVM \
-          -M virt-2.8 \
-          -ctrl-grab \
-          -gdb tcp::1234 \
-          -m $RAM \
-          -smp $NR_CPUS \
-          -monitor stdio \
-          -drive file=$IMG,if=pflash,format=raw
+$QEMU_EXE \
+-d int \
+-D debug.log \
+        -M virt-2.8 \
+        -ctrl-grab \
+        -gdb tcp::1234 \
+        -m $RAM \
+        -smp $NR_CPUS \
+        -monitor stdio \
+        -drive file=$IMG,if=pflash,format=raw
 
 rm -rf $TMPDIR