diff options
| author | Richard Braun <rbraun@sceen.net> | 2018-02-04 21:54:27 +0100 |
|---|---|---|
| committer | Richard Braun <rbraun@sceen.net> | 2018-02-04 21:54:27 +0100 |
| commit | e66869001f1258b9ccb24ee70fa4980fd839c7f5 (patch) | |
| tree | c9d1d11a80bc8c018815b649cdad7be4feb32d95 | |
| parent | fe159704128341b9a46c60cc14f80162f9d6d4dc (diff) | |
flash: enable prefetching and caches
| -rw-r--r-- | src/flash.c | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/src/flash.c b/src/flash.c index eaff0b2..91d03ee 100644 --- a/src/flash.c +++ b/src/flash.c @@ -24,7 +24,11 @@ #include "flash.h" -#define FLASH_BASE_ADDR 0x40023c00 +#define FLASH_BASE_ADDR 0x40023c00 + +#define FLASH_ACR_PRFTEN 0x00000100 +#define FLASH_ACR_ICEN 0x00000200 +#define FLASH_ACR_DCEN 0x00000400 struct flash_regs { uint32_t acr; @@ -43,8 +47,9 @@ flash_setup(void) /* * See 3.5.1 Relation between CPU clock frequency * and Flash memory read time. - * - * TODO Prefect and caches. */ - flash_regs->acr |= 5; + flash_regs->acr |= FLASH_ACR_DCEN + | FLASH_ACR_ICEN + | FLASH_ACR_PRFTEN + | 5; } |