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authorRichard Braun <rbraun@sceen.net>2018-01-06 18:48:55 +0100
committerRichard Braun <rbraun@sceen.net>2018-01-06 18:48:55 +0100
commita56a2183e428ef806225482eff5b44da9b79e306 (patch)
tree332aa4ff455f92fa6b96d8b8f8a569bcf2260795 /arch/x86/machine
parentbd78d997204e22179bddf5500008bc1e534420f2 (diff)
x86/tcb: minor context switch optimization
Interrupts are always disabled on context switch/load. As a result, there is no need to make the processor flags part of the context.
Diffstat (limited to 'arch/x86/machine')
-rw-r--r--arch/x86/machine/tcb.c2
-rw-r--r--arch/x86/machine/tcb.h2
-rw-r--r--arch/x86/machine/tcb_asm.S11
3 files changed, 6 insertions, 9 deletions
diff --git a/arch/x86/machine/tcb.c b/arch/x86/machine/tcb.c
index 6978811..10bbac6 100644
--- a/arch/x86/machine/tcb.c
+++ b/arch/x86/machine/tcb.c
@@ -49,7 +49,6 @@ tcb_stack_forge(struct tcb *tcb, void (*fn)(void *), void *arg)
tcb_stack_push(tcb, (uintptr_t)arg);
tcb_stack_push(tcb, (uintptr_t)fn);
tcb_stack_push(tcb, (uintptr_t)tcb_start); /* Return address */
- tcb_stack_push(tcb, CPU_EFL_ONE); /* RFLAGS */
tcb_stack_push(tcb, 0); /* RBX */
tcb_stack_push(tcb, 0); /* R12 */
tcb_stack_push(tcb, 0); /* R13 */
@@ -65,7 +64,6 @@ tcb_stack_forge(struct tcb *tcb, void (*fn)(void *), void *arg)
tcb_stack_push(tcb, (uintptr_t)arg);
tcb_stack_push(tcb, (uintptr_t)fn);
tcb_stack_push(tcb, (uintptr_t)tcb_start); /* Return address */
- tcb_stack_push(tcb, CPU_EFL_ONE); /* EFLAGS */
tcb_stack_push(tcb, 0); /* EBX */
tcb_stack_push(tcb, 0); /* EDI */
tcb_stack_push(tcb, 0); /* ESI */
diff --git a/arch/x86/machine/tcb.h b/arch/x86/machine/tcb.h
index 004cf92..2e9493d 100644
--- a/arch/x86/machine/tcb.h
+++ b/arch/x86/machine/tcb.h
@@ -52,7 +52,7 @@ struct tcb {
* Build a TCB.
*
* Prepare the given stack for execution. The context is defined so that it
- * will call thread_main(fn, arg) with interrupts disabled when loaded.
+ * will call thread_main(fn, arg) when loaded.
*
* In addition, initialize any thread-local machine-specific data.
*/
diff --git a/arch/x86/machine/tcb_asm.S b/arch/x86/machine/tcb_asm.S
index a6e31da..2d2bcd5 100644
--- a/arch/x86/machine/tcb_asm.S
+++ b/arch/x86/machine/tcb_asm.S
@@ -64,12 +64,12 @@ ASM_ENTRY(tcb_start)
ASM_END(tcb_start)
ASM_ENTRY(tcb_context_switch)
- pushfq /* store registers as required by ABI */
- pushq %rbx
+ pushq %rbx /* store registers as required by ABI */
pushq %r12
pushq %r13
pushq %r14
pushq %r15
+
movq %rbp, (%rdi) /* store frame pointer into prev TCB */
movq %rsp, 8(%rdi) /* store stack pointer into prev TCB */
movq (%rsi), %rbp /* load frame pointer from next TCB */
@@ -82,7 +82,6 @@ tcb_context_restore:
popq %r13
popq %r12
popq %rbx
- popfq
ret
ASM_END(tcb_context_switch)
@@ -101,10 +100,11 @@ ASM_END(tcb_start)
ASM_ENTRY(tcb_context_switch)
movl 4(%esp), %eax /* load prev TCB address */
movl 8(%esp), %ecx /* load next TCB address */
- pushfl /* store registers as required by ABI */
- pushl %ebx
+
+ pushl %ebx /* store registers as required by ABI */
pushl %edi
pushl %esi
+
movl %ebp, (%eax) /* store frame pointer into prev TCB */
movl %esp, 4(%eax) /* store stack pointer into prev TCB */
movl (%ecx), %ebp /* load frame pointer from next TCB */
@@ -120,7 +120,6 @@ tcb_context_restore:
popl %esi
popl %edi
popl %ebx
- popfl
ret
ASM_END(tcb_context_switch)