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author | Richard Braun <rbraun@sceen.net> | 2018-02-10 11:27:24 +0100 |
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committer | Richard Braun <rbraun@sceen.net> | 2018-02-12 21:09:42 +0100 |
commit | 68e95635b39a755a0a6282f42ce91b2e676348c6 (patch) | |
tree | ef738d758195cdf50a19129cc9b9a8f37d2adef0 /arch/x86/machine | |
parent | 0215812c408cdfe879363759290d522573c565e7 (diff) |
Add TODO entries
Diffstat (limited to 'arch/x86/machine')
-rw-r--r-- | arch/x86/machine/cpu.h | 3 | ||||
-rw-r--r-- | arch/x86/machine/strace.h | 2 |
2 files changed, 5 insertions, 0 deletions
diff --git a/arch/x86/machine/cpu.h b/arch/x86/machine/cpu.h index b9f8c0d..3025846 100644 --- a/arch/x86/machine/cpu.h +++ b/arch/x86/machine/cpu.h @@ -24,6 +24,9 @@ * L1 cache line size. * * XXX Use this value until processor selection is available. + * + * TODO Add macros to specifically align to the cache line size, and to + * do so only in SMP configurations. */ #define CPU_L1_SIZE 64 diff --git a/arch/x86/machine/strace.h b/arch/x86/machine/strace.h index 2f686a0..b55f6b8 100644 --- a/arch/x86/machine/strace.h +++ b/arch/x86/machine/strace.h @@ -16,6 +16,8 @@ * * * Stack tracing. + * + * TODO Make it possible to debug without the frame pointer. */ #ifndef _X86_STRACE_H |