// SPDX-License-Identifier: GPL-2.0 use kernel::{device, devres::Devres, error::code::*, fmt, pci, prelude::*, sync::Arc}; use crate::driver::Bar0; use crate::falcon::{gsp::Gsp as GspFalcon, sec2::Sec2 as Sec2Falcon, Falcon}; use crate::fb::SysmemFlush; use crate::gfw; use crate::gsp::Gsp; use crate::regs; macro_rules! define_chipset { ({ $($variant:ident = $value:expr),* $(,)* }) => { /// Enum representation of the GPU chipset. #[derive(fmt::Debug, Copy, Clone, PartialOrd, Ord, PartialEq, Eq)] pub(crate) enum Chipset { $($variant = $value),*, } impl Chipset { pub(crate) const ALL: &'static [Chipset] = &[ $( Chipset::$variant, )* ]; ::kernel::macros::paste!( /// Returns the name of this chipset, in lowercase. /// /// # Examples /// /// ``` /// let chipset = Chipset::GA102; /// assert_eq!(chipset.name(), "ga102"); /// ``` pub(crate) const fn name(&self) -> &'static str { match *self { $( Chipset::$variant => stringify!([<$variant:lower>]), )* } } ); } // TODO[FPRI]: replace with something like derive(FromPrimitive) impl TryFrom for Chipset { type Error = kernel::error::Error; fn try_from(value: u32) -> Result { match value { $( $value => Ok(Chipset::$variant), )* _ => Err(ENODEV), } } } } } define_chipset!({ // Turing TU102 = 0x162, TU104 = 0x164, TU106 = 0x166, TU117 = 0x167, TU116 = 0x168, // Ampere GA100 = 0x170, GA102 = 0x172, GA103 = 0x173, GA104 = 0x174, GA106 = 0x176, GA107 = 0x177, // Ada AD102 = 0x192, AD103 = 0x193, AD104 = 0x194, AD106 = 0x196, AD107 = 0x197, }); impl Chipset { pub(crate) fn arch(&self) -> Architecture { match self { Self::TU102 | Self::TU104 | Self::TU106 | Self::TU117 | Self::TU116 => { Architecture::Turing } Self::GA100 | Self::GA102 | Self::GA103 | Self::GA104 | Self::GA106 | Self::GA107 => { Architecture::Ampere } Self::AD102 | Self::AD103 | Self::AD104 | Self::AD106 | Self::AD107 => { Architecture::Ada } } } } // TODO // // The resulting strings are used to generate firmware paths, hence the // generated strings have to be stable. // // Hence, replace with something like strum_macros derive(Display). // // For now, redirect to fmt::Debug for convenience. impl fmt::Display for Chipset { fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { write!(f, "{self:?}") } } /// Enum representation of the GPU generation. #[derive(fmt::Debug)] pub(crate) enum Architecture { Turing = 0x16, Ampere = 0x17, Ada = 0x19, } impl TryFrom for Architecture { type Error = Error; fn try_from(value: u8) -> Result { match value { 0x16 => Ok(Self::Turing), 0x17 => Ok(Self::Ampere), 0x19 => Ok(Self::Ada), _ => Err(ENODEV), } } } pub(crate) struct Revision { major: u8, minor: u8, } impl Revision { fn from_boot0(boot0: regs::NV_PMC_BOOT_0) -> Self { Self { major: boot0.major_revision(), minor: boot0.minor_revision(), } } } impl fmt::Display for Revision { fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { write!(f, "{:x}.{:x}", self.major, self.minor) } } /// Structure holding the metadata of the GPU. pub(crate) struct Spec { chipset: Chipset, /// The revision of the chipset. revision: Revision, } impl Spec { fn new(bar: &Bar0) -> Result { let boot0 = regs::NV_PMC_BOOT_0::read(bar); Ok(Self { chipset: boot0.chipset()?, revision: Revision::from_boot0(boot0), }) } } /// Structure holding the resources required to operate the GPU. #[pin_data] pub(crate) struct Gpu { spec: Spec, /// MMIO mapping of PCI BAR 0 bar: Arc>, /// System memory page required for flushing all pending GPU-side memory writes done through /// PCIE into system memory, via sysmembar (A GPU-initiated HW memory-barrier operation). sysmem_flush: SysmemFlush, /// GSP falcon instance, used for GSP boot up and cleanup. gsp_falcon: Falcon, /// SEC2 falcon instance, used for GSP boot up and cleanup. sec2_falcon: Falcon, /// GSP runtime data. Temporarily an empty placeholder. #[pin] gsp: Gsp, } impl Gpu { pub(crate) fn new<'a>( pdev: &'a pci::Device, devres_bar: Arc>, bar: &'a Bar0, ) -> impl PinInit + 'a { try_pin_init!(Self { spec: Spec::new(bar).inspect(|spec| { dev_info!( pdev.as_ref(), "NVIDIA (Chipset: {}, Architecture: {:?}, Revision: {})\n", spec.chipset, spec.chipset.arch(), spec.revision ); })?, // We must wait for GFW_BOOT completion before doing any significant setup on the GPU. _: { gfw::wait_gfw_boot_completion(bar) .inspect_err(|_| dev_err!(pdev.as_ref(), "GFW boot did not complete"))?; }, sysmem_flush: SysmemFlush::register(pdev.as_ref(), bar, spec.chipset)?, gsp_falcon: Falcon::new( pdev.as_ref(), spec.chipset, bar, spec.chipset > Chipset::GA100, ) .inspect(|falcon| falcon.clear_swgen0_intr(bar))?, sec2_falcon: Falcon::new(pdev.as_ref(), spec.chipset, bar, true)?, gsp <- Gsp::new(), _: { gsp.boot(pdev, bar, spec.chipset, gsp_falcon, sec2_falcon)? }, bar: devres_bar, }) } /// Called when the corresponding [`Device`](device::Device) is unbound. /// /// Note: This method must only be called from `Driver::unbind`. pub(crate) fn unbind(&self, dev: &device::Device) { kernel::warn_on!(self .bar .access(dev) .inspect(|bar| self.sysmem_flush.unregister(bar)) .is_err()); } }