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authorPaul Burton <paul.burton@imgtec.com>2016-11-07 11:14:08 +0000
committerRalf Baechle <ralf@linux-mips.org>2017-01-03 16:34:49 +0100
commit2c0e57eaef3c2b233e42faf4e9db18ee8fd37734 (patch)
tree3f5a424f6d023e9f95a50f3393a1265fedcc1825 /tools/perf/scripts/python
parent858e2b2310cac0dff1df8eea7d16b6ad7ef2c2b5 (diff)
MIPS: tlbex: Clear ISA bit when writing to handle_tlb{l,m,s}
When generating TLB exception handling code we write to memory reserved at the handle_tlbl, handle_tlbm & handle_tlbs symbols. Up until now the ISA bit has always been clear simply because the assembly code reserving the space for those functions places no instructions in them. In preparation for marking all LEAF functions as containing code, explicitly clear the ISA bit when calculating the addresses at which to write TLB exception handling code. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/14507/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'tools/perf/scripts/python')
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